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StrongIRFET™ IRF7480MTRPbF
Application Brushed Motor drive applications BLDC Motor drive applications Battery powered circuits Half-bridge and full-bridge topologies Synchronous rectifier applications Resonant mode power supplies OR-ing and redundant power switches DC/DC and AC/DC converters DC/AC Inverters
Benefits Improved Gate, Avalanche and Dynamic dv/dt Ruggedness Fully Characterized Capacitance and Avalanche SOA Enhanced body diode dv/dt and di/dt Capability Lead-Free, RoHS Compliant
Base part number Package Type Standard Pack
Form Quantity
IRF7480MPbF DirectFET® ME Tape and Reel 4800 IRF7480MTRPbF
Orderable Part Number
VDSS 40V
RDS(on) typ. 0.95m max 1.20m
ID (Silicon Limited) 217A
ID (double-sided cooling) 330A
Fig 1. Typical On-Resistance vs. Gate Voltage Fig 2. Maximum Drain Current vs. Case Temperature
DirectFET® ISOMETRIC
ME
DirectFET® N-Channel Power MOSFET
1 2016-5-4
D DS
GS S
S S
S
4 6 8 10 12 14 16 18 20
VGS, Gate -to -Source Voltage (V)
0.5
1.0
1.5
2.0
2.5
3.0
RD
S(o
n),
Dra
in-t
o -S
ourc
e O
n R
esis
tanc
e (m
)
ID = 132A
TJ = 25°C
TJ = 125°C
25 50 75 100 125 150
TC , Case Temperature (°C)
0
25
50
75
100
125
150
175
200
225
I D,
Dra
in C
urre
nt (
A)
IRF7480MTRPbF
2 2016-5-4
Notes: Mounted on minimum footprint full size board with metalized back and with small clip heatsink. Used double sided cooling , mounting pad with large heatsink.
Absolute Maximum Ratings
Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 217
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 137 A IDM Pulsed Drain Current 868
PD @TC = 25°C Maximum Power Dissipation 96 W Linear Derating Factor 0.77 W/°C VGS Gate-to-Source Voltage ± 20 V TJ Operating Junction and -55 to + 150
°C TSTG Storage Temperature Range
Avalanche Characteristics EAS (Thermally limited) Single Pulse Avalanche Energy 81 EAS (Thermally limited) Single Pulse Avalanche Energy 206 IAR Avalanche Current
See Fig.15,16, 23a, 23b A
EAR Repetitive Avalanche Energy mJ Thermal Resistance
Symbol Parameter Typ. Max. Units RJA Junction-to-Ambient ––– 45
°C/W RJA Junction-to-Ambient 12.5 –––
RJA Junction-to-Ambient 20 –––
RJC Junction-to-Case ––– 1.3
RJ-PCB Junction-to-PCB Mounted 0.75 –––
mJ
ID @ TC (top)= 25°C TC (bottom)= 25°C
Continuous Drain Current, VGS @ 10V (double-sided cooling) 330
Static @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions V(BR)DSS Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250µA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 30 ––– mV/°C Reference to 25°C, ID = 1.0mA RDS(on) Static Drain-to-Source On-Resistance ––– 0.95 1.20
m VGS = 10V, ID = 132A
––– 1.60 ––– VGS = 6.0V, ID = 66A VGS(th) Gate Threshold Voltage 2.1 3.0 3.9 V VDS = VGS, ID = 150µA
IDSS Drain-to-Source Leakage Current ––– ––– 1.0
µA VDS = 40V, VGS = 0V
––– ––– 150 VDS = 40V, VGS = 0V, TJ = 125°C IGSS Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V RG Internal Gate Resistance ––– 0.81 –––
nA
TC measured with thermocouple mounted to top (Drain) of part.
Surface mounted on 1 in. square Cu board (still air).
Mounted to a PCB with small clip heatsink (still air)
Mounted on minimum footprint full size board with metalized back and with small clip heatsink (still air)
IRF7480MTRPbF
3 2016-5-4
D
S
G
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions gfs Forward Transconductance 370 ––– ––– S VDS = 10V, ID = 132A Qg Total Gate Charge ––– 123 185
nC
ID = 132A Qgs Gate-to-Source Charge ––– 31 ––– VDS =20V Qgd Gate-to-Drain ("Miller") Charge ––– 44 ––– VGS = 10V Qsync Total Gate Charge Sync. (Qg - Qgd) ––– 79 ––– ID = 132A, VDS =0V, VGS = 10V td(on) Turn-On Delay Time ––– 21 –––
ns
VDD = 20V tr Rise Time ––– 70 ––– ID = 30A td(off) Turn-Off Delay Time ––– 68 ––– RG = 2.7 tf Fall Time ––– 58 ––– VGS = 10V Ciss Input Capacitance ––– 6680 –––
pF
VGS = 0V Coss Output Capacitance ––– 1035 ––– VDS = 25V Crss Reverse Transfer Capacitance ––– 700 ––– ƒ = 1.0MHz Coss eff. (ER) Effective Output Capacitance (Energy Related) ––– 1240 ––– VGS = 0V, VDS = 0V to 32V Coss eff. (TR) Effective Output Capacitance (Time Related) ––– 1515 ––– VGS = 0V, VDS = 0V to 32V
Diode Characteristics
Symbol Parameter Min. Typ. Max. Units Conditions IS Continuous Source Current
––– ––– 87 A
MOSFET symbol (Body Diode) showing the ISM Pulsed Source Current
––– ––– 868 integral reverse
(Body Diode) p-n junction diode. VSD Diode Forward Voltage ––– ––– 1.2 V TJ= 25°C,IS =132A, VGS = 0V
dv/dt Peak Diode Recovery ––– 2.4 ––– V/ns
TJ =150°C,IS =132A, VDS = 40V
trr Reverse Recovery Time ––– 44 ––– ns
TJ = 25° C VR = 34V, ––– 46 ––– TJ = 125°C IF = 132A Qrr Reverse Recovery Charge ––– 56 ––– TJ = 25°C di/dt = 100A/µs ––– 63 ––– TJ = 125°C IRRM Reverse Recovery Current ––– 2.1 ––– A TJ = 25°C
nC
Notes: Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.009mH, RG = 50, IAS = 132A, VGS =10V. ISD ≤ 132A, di/dt ≤ 920A/µs, VDD ≤ V(BR)DSS, TJ ≤ 150°C. Pulse width ≤ 400µs; duty cycle ≤ 2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note # AN-994. http://www.irf.com/technical-info/appnotes/an-994.pdf
R is measured at TJ approximately 90°C.
Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 20A, VGS =10V.
IRF7480MTRPbF
4 2016-5-4
Fig 6. Normalized On-Resistance vs. Temperature Fig 5. Typical Transfer Characteristics
Fig 4. Typical Output Characteristics Fig 3. Typical Output Characteristics
Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage
1 10 100
VDS, Drain-to-Source Voltage (V)
100
1000
10000
100000
C, C
apac
itanc
e (p
F)
VGS = 0V, f = 1 MHZCiss = Cgs + Cgd, Cds SHORTED
Crss = Cgd Coss = Cds + Cgd
CossCrss
Ciss
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
0 20 40 60 80 100 120 140 160
QG, Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
VG
S, G
ate-
to-S
ourc
e V
olta
ge (
V)
VDS= 32V
VDS= 20V
ID= 132A
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000I D
, Dra
in-t
o-S
our
ce C
urre
nt (
A)
VGSTOP 15V
10V8.0V7.0V6.0V5.5V5.0V
BOTTOM 4.5V
60µs PULSE WIDTHTj = 25°C
4.5V
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
10
100
1000
I D, D
rain
-to-
So
urce
Cur
ren
t (A
)
VGSTOP 15V
10V8.0V7.0V6.0V5.5V5.0V
BOTTOM 4.5V
60µs PULSE WIDTHTj = 150°C
4.5V
2 3 4 5 6 7 8
VGS, Gate-to-Source Voltage (V)
1.0
10
100
1000
I D, D
rain
-to-
Sou
rce
Cur
rent
(A)
TJ = 25°C
TJ = 150°C
VDS = 10V
60µs PULSE WIDTH
-60 -40 -20 0 20 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
0.6
0.80.8
1.01.0
1.21.2
1.41.4
1.61.6
1.8
0.6
0.8
1.0
1.2
1.4
1.6
RD
S(o
n) ,
Dra
in-t
o-S
ourc
e O
n R
esis
tanc
e
(
Nor
mal
ized
)
ID = 132A
VGS = 10V
IRF7480MTRPbF
5 2016-5-4
Fig 10. Maximum Safe Operating Area
Fig 11. Drain-to-Source Breakdown Voltage
Fig 9. Typical Source-Drain Diode Forward Voltage
-5 0 5 10 15 20 25 30 35 40
VDS, Drain-to-Source Voltage (V)
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
Ene
rgy
(µJ)
Fig 12. Typical Coss Stored Energy
Fig 13. Typical On-Resistance vs. Drain Current
0 20 40 60 80 100 120 140 160 180 200
ID, Drain Current (A)
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
RD
S(o
n),
Dra
in-t
o -S
ourc
e O
n R
esis
tanc
e ( m
)
Vgs = 5.5VVgs = 6.0VVgs = 7.0VVgs = 8.0VVgs = 10V
0.2 0.4 0.6 0.8 1.0
VSD, Source-to-Drain Voltage (V)
0.1
1
10
100
1000I S
D, R
ever
se D
rain
Cur
rent
(A
)
TJ = 25°C
TJ = 150°C
VGS = 0V
-60 -40 -20 0 20 40 60 80 100 120 140 160
TJ , Temperature ( °C )
40
41
42
43
44
45
46
47
48
V(B
R)D
SS
, D
rain
-to-
Sou
rce
Bre
akdo
wn
Vol
tage
(V
)
Id = 1.0mA
0.1 1 10
VDS, Drain-to-Source Voltage (V)
0.01
0.1
1
10
100
1000
I D,
Dra
in-t
o-S
ourc
e C
urre
nt (
A)
Tc = 25°CTj = 150°CSingle Pulse
10msec
1msec
OPERATION IN THIS AREA LIMITED BY R
DS(on)
100µsec
DC
IRF7480MTRPbF
6 2016-5-4
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 16. Maximum Avalanche Energy vs. Temperature
Fig 15. Avalanche Current vs. Pulse Width
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1.Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 23a, 23b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC Iav = 2T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
10
The
rmal
Res
pons
e (
Z th
JC )
°C
/W
0.20
0.10
D = 0.50
0.020.01
0.05
SINGLE PULSE( THERMAL RESPONSE )
Notes:1. Duty Factor D = t1/t22. Peak Tj = P dm x Zthjc + Tc
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
0.1
1
10
100
1000
Ava
lanc
he C
urre
nt (
A)
Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25°C and Tstart = 125°C.
Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 125°C and Tstart =25°C (Single Pulse)
25 50 75 100 125 150
Starting TJ , Junction Temperature (°C)
0
20
40
60
80
100
EA
R ,
Ava
lanc
he E
nerg
y (m
J)
TOP Single Pulse BOTTOM 1.0% Duty CycleID = 132A
IRF7480MTRPbF
7 2016-5-4
Fig 17. Threshold Voltage vs. Temperature
Fig 21. Typical Stored Charge vs. dif/dt
Fig 18. Typical Recovery Current vs. dif/dt
100 200 300 400 500 600 700
diF /dt (A/µs)
2
3
4
5
6
7
8
9
I RR
M (
A)
IF = 88A
VR = 34V
TJ = 25°C
TJ = 125°C
100 200 300 400 500 600 700
diF /dt (A/µs)
2
3
4
5
6
7
8
9
I RR
M (
A)
IF = 132A
VR = 34V
TJ = 25°C
TJ = 125°C
100 200 300 400 500 600 700
diF /dt (A/µs)
80
100
120
140
160
180
200
QR
R (
nC)
IF = 88A
VR = 34V
TJ = 25°C
TJ = 125°C
100 200 300 400 500 600 700
diF /dt (A/µs)
40
80
120
160
200
QR
R (
nC)
IF = 132A
VR = 34V
TJ = 25°C
TJ = 125°C
Fig 20. Typical Stored Charge vs. dif/dt Fig 19. Typical Recovery Current vs. dif/dt
-75 -50 -25 0 25 50 75 100 125 150
TJ , Temperature ( °C )
1.5
2.0
2.5
3.0
3.5
4.0V
GS
(th)
, G
ate
thre
shol
d V
olta
ge (
V)
ID = 150µA
ID = 250µA
ID = 1.0mA
ID = 1.0A
IRF7480MTRPbF
8 2016-5-4
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
Fig 23a. Unclamped Inductive Test Circuit
RG
IAS
0.01tp
D.U.T
LVDS
+- VDD
DRIVER
A
15V
20V
Fig 25a. Gate Charge Test Circuit
tp
V(BR)DSS
IAS
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit Fig 24b. Switching Time Waveforms
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
Fig 25b. Gate Charge Waveform
VDD
IRF7480MTRPbF
9 2016-5-4
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
DirectFET® Board Footprint, ME Outline (Medium Size Can, E-Designation) Please see DirectFET® application note AN-1035 for all details regarding the assembly of DirectFET®. This includes all recommendations for stencil and substrate designs.
G = GATED = DRAINS = SOURCE
G
DS
D D
DS
SS
S
IRF7480MTRPbF
10 2016-5-4
DirectFET® Outline Dimension, ME Outline (Medium Size Can, E-Designation) Please see DirectFET® application note AN-1035 for all details regarding the assembly of DirectFET®. This includes all recommendations for stencil and substrate designs.
DirectFET® Part Marking
Dimensions are shown inmillimeters (inches)
CODE
A
B
C
D
E
F
G
H
J
L
0.017
0.083
0.156
0.044
0.018
0.024
MAX
0.250
0.38
2.08
3.85
1.08
0.35
0.58
MIN
6.25
4.80
0.42
2.12
3.95
1.12
0.45
0.62
MAX
6.35
5.05
0.015
0.082
0.152
0.043
0.023
0.014
MIN
0.189
0.246
METRIC IMPERIALDIMENSIONS
0.93 0.97
1.28 1.32
0.0380.037
0.0520.050
J1 0.0230.620.58 0.024
0.0350.920.88 0.036K
0.199
L1 0.1443.63 3.67 0.143
M
P
0.028
0.007
0.59
0.08
0.70
0.17
0.023
0.003
N 0.02 0.08 0.0008 0.003
PART NUMBER
BATCH NUMBER
DATE CODELine above the last character ofthe date code indicates "Lead-Free"
GATE MARKING
LOGO
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
IRF7480MTRPbF
11 2016-5-4
DirectFET® Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mmStd reel quantity is 4800 parts. (ordered as IRF7480MTRPBF). For 1000 parts on 7"reel, order IRF7480MTR1PBF
REEL DIMENSIONS
MAX
N.C
N.C
0.520
N.C
N.C
0.724
0.567
0.606
IMPERIAL
MIN
330.0
20.2
12.8
1.5
100.0
N.C
12.4
11.9
STANDARD OPTION (QTY 4800)
CODE
A
B
C
D
E
F
G
H
MAX
N.C
N.C
13.2
N.C
N.C
18.4
14.4
15.4
MIN
12.992
0.795
0.504
0.059
3.937
N.C
0.488
0.469
METRIC
MIN
6.9
0.75
0.53
0.059
2.31
N.C
0.47
0.47
TR1 OPTION (QTY 1000)
MAX
N.C
N.C
12.8
N.C
N.C
13.50
12.01
12.01
MIN
177.77
19.06
13.5
1.5
58.72
N.C
11.9
11.9
METRIC
MAX
N.C
N.C
0.50
N.C
N.C
0.53
N.C
N.C
IMPERIAL
LOADED TAPE FEED DIRECTION
NOTE: CONTROLLINGDIMENSIONS IN MM
CODE
A
B
C
D
E
F
G
H
IMPERIAL
MIN
0.311
0.154
0.469
0.215
0.201
0.256
0.059
0.059
MAX
8.10
4.10
12.30
5.55
5.30
6.70
N.C
1.60
MIN
7.90
3.90
11.90
5.45
5.10
6.50
1.50
1.50
METRIC
DIMENSIONS
MAX
0.319
0.161
0.484
0.219
0.209
0.264
N.C
0.063
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
IRF7480MTRPbF
12 2016-5-4
Qualification Information†
Qualification Level Industrial *
(per JEDEC JESD47F†† guidelines)
Moisture Sensitivity Level DFET 1.5 MSL1
(per JEDEC J-STD-020D††)
RoHS Compliant Yes
† Qualification standards can be found at International Rectifier’s web site http://www.irf.com/product-info/reliability †† Applicable version of JEDEC standard at the time of product release. * Industrial qualification standards except autoclave test conditions.
Revision History
Date Comments
11/07/2014 Updated EAS (L =1mH) = 206mJ on page 2 Updated note 9 “Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 20A, VGS =10V” on page 3 Updated RJA from “60°C/W” to “45°C/W” on page 2.
05/14/2015 Updated registered trademark from DirectFETTM to DirectFET® on page 1,9 and 10.
05/04/2016 Updated datasheet with corporate template. Added ID (double- sided cooling) = 300A on pages1 and 2.
Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2015 All Rights Reserved.
IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.