Md5project

Implementationof Crypto-grahicHash

Functionon FPGAbased

EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami

EmbeddedSystemOverview

FPGAs

EmbeddedDesignusingFPGA

Handshakingwith FPGA

MD5 HashAlgorithm

Flowchart

Hardwareimplemen-tation

Output

ParallelProgramm-ing

parallelisationof MD5

Implementation of Cryptograhic Hash Function on FPGA basedEmbedded System

Anupam Pandit, Kumaresh ChattopadhyayProma Goswami

University Of Calcutta

8-April-2013

Anupam Pandit, Kumaresh Chattopadhyay Proma Goswami Implementation of Cryptograhic Hash Function on FPGA based Embedded System



EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Contents

• Introduction

• Overview of FPGA based Embedded System• FPGA• FPGA processors

• Handshaking with FPGA-based Embedded Design• EDK overview• Xilkernel• Thread management

• MD5 Algorithm

• Hardware implementation of MD5

• Scope of parallelization of MD5

• Future scope

• Conlcusion

• References




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



FPGA based Embedded system overview

Embedded System- An embedded system is a computing system that is incorporated within anelectronic device carries out a particular function, extending thefunctionality of that device.[4]

Some of the digital controller of embedded system hardware includes thefollowing:

• Real-time update rate

• Power

• Cost

• Single chip solution

• Ease of programming

• Portability




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Current Technologies

Several technologies used for implementing Embedded System:

• General-purpose Microprocessor

• Microcontroller-based systems

• DSP processor-based systems

• ASIC technology

• FPGA technology




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output








• ASIC technology

• FPGA technology




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output








• ASIC technology

• FPGA technology




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output








• ASIC technology

• FPGA technology




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output








• ASIC technology

• FPGA technology




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output








• ASIC technology

• FPGA technology




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



What are FPGAs

• FPGAs are programmable digital logicchip

• We can program them to do almostany digital function

• Here’s the general flow of working withFPGAs:

• We use a computer to describe a ”logicfunction”that we want.We might drawa schematic

• We compile the ”logic function”, usinga software provided by the FPGAvendor

• That creates a binary file that can bedownloaded into the FPGA

• Binary file can be downloaded to theFPGA by connecting cable

• That’s it! our FPGA behavesaccording to our ”logic function”

Figur : Xilinx Spartan 3e StarterFPGA Board

Figur : Altera Cyclone FPGABoard




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



What are FPGAs














EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



What are FPGAs














EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

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Output



What are FPGAs














EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



What are FPGAs














EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



What are FPGAs














EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



What are FPGAs














EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

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Output



What are FPGAs














EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Processor core

In FPGA based Embedded System design two processor cores are mostlyused:

• MicroBlaze: 32 bit RISC, Softcore processor

• PowerPc: 32 bit RISC, Hardcore processor




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



EDK overview

Xilinx EDK - collection of tools and IP coresEDK package includes:

• XPS - a graphical IDE

• IP cores for a large number of peripherals

• Device drivers and libraries to develop software applications

• GNU compiler, linker and debugger




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Xilinx Embedded processor’s kernel

XilkernelA small, robust and modular kernel. Highly integrated with the Platform

Studio framework.[3] It upports the core features required in a lightweightembedded kernel, with a POSIX API




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Features of Xilkernel

Key Features

• A POSIX API targeting embedded kernels

• Core kernel features such as:• POSIX threads with round-robin or strict priority scheduling• POSIX synchronization services - semaphores and mutex locks• POSIX IPC services - message queues and shared memory

• Statically creating threads that startup with the kernel

• System call interface to the kernel

• Support for creating processes out of separate executable ExecutableLink Files (ELF)




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output




Key Features









EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output




Key Features









EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Xilkernel API

Thread Management

• Xilkernel supports the basic POSIX threads API

• Threads are identified by a unique thread identifier (is of typepthread t)

• Thread stack is allocated automatically

• A specific exit function is not required at the end of the threads code




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Xilkernel API

Thread Management








EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Xilkernel API

Thread Management








EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Xilkernel API

Thread Management








EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Serial communication: RS232

Serial communication implies sending data bit by bit over a single wire




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



MD5 Hash Algorithm

Hash FunctionA hash function is any algorithm or subroutine that maps data sets ofvariable length to data sets of a fixed length.[2] Several hash functions are:MD2, MD4, MD5, SHA

MD5A widely used cryptographic hash function that produces 128-bit hashvalue. It is used to check data integrity

Why MD5 ?

• quick hash value generation

• adaptability

• widely used secure hash algorithm particularly in Internet-standardmessage authentication.[1]




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Flowchart of MD5

• A, B, C, D are the Initial Vectors(IV)

• a, b, c ,d are the Chaining Variables(CV)




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Hardware implementation of MD5

Implementation on SPARTAN 3E starter board

• Program resides on SDRAMdue to larger size

• Linker script linksthe compiler to the exactlocation of program

• Input coming from terminalthrough UART

• executing on processor

• Result resides on SDRAM

• Output on terminal




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Hardware implementation of MD5

Output

Analysis

Tabel : Resource Utilization

Resource used available utilization

Number of Slice Flip Flops 2,707 9,312 29%Number of 4 input LUTs 2,921 9,312 31%Number of bonded IOBs 51 232 21%




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Output cont.

Power Analysis: Power Analysis is described through the table

Tabel : Resource Utilization

Name Value

Total Quiescent Power 0.43051(w)Total Dynamic Power 0.05029(w)

Total Power 0.48081(W)Junction Temp 37.5(degrees C)

Throughput Calculation: In our experiment throghput=142.83 Kbps.




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



File Encryption

In the next phase we verify the limitation of finding the hash value of alarge string. Here we take a file of 6000 character as input and we get thehash value.This is shown in following the figure

Figur : Input and output text on Hyperterminal of a file




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Parallel Programming

Where can we find Independent task?

• Is there is a large data set involved?

• Are there portions of code that can execute in a different order?

• Is the computation set of stages that don’t interact except for usingthe output of one as the input of next?

A more formal method for discovering parallelism uses dependence graphs




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Dependence Graph

Example 1

• Domain decompositionfor(i=0;i<3;i++)a[i]=b[i]/3;




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Dependence Graph cont.

Example 2for(i=1;i<4;i++)a[i]=a[i-1]/b[i];

The lines cross some dependency




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Dependence Graph cont.

Example 3

• Task Decomposition

a= f(x, y, z);b=g(w, x);t= a + b;c=h(z);s=t/c;




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Shared memory model for Parallel programming

In shared memory model communication and synchronization of processesare accomplished through shared variables

• Communication: buffer

• Synchronization: semaphore

MethodologyStudy problem, sequential program, or code segmentLook for opportunity for parallelismUse thread to express parallelism




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output











EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output











EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output











EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Scope of parallelization of MD5

Task Dependency of MD5




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Parallelization of MD5 possible?

• Thread implementation: Not possible

• Pipelineing : Possible (of several large blocks of message [3])

This is not the parallelization of MD5, rather parallelization of severalmessage blocks




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Future Scope

Project direction will be implement our design on Zynq a new 28 nmFPGA kit with Dual Cortex ARM hardcore processor, we will relativelyanalysis our design on linux running on zynq with presepective Posixprogramming and we also look into the activity by implementing Androidon zynq and measure the relative security isseues, if possible, we would liketo expand the security measurement from Hashing to digital signaturescheme to serve the purpose of authentication




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Conclusion

Message integrity is also has the same importance than that ofCryptographic algorithms as we can remain sure just by encrypting themessage we need to also sure about with the fact that, we are receivingmessage form authenticated person and the data is also remain unchanged.MD5 is widely used algorithm and its also very popular due to it small sizeand also secured though some attacks on MD5 has been reported but itsuse is not reduces and it still has its use on SSL and IPSEC. Using our

design we tried to give an modern approach of executing such algorithmon thread level by suing RTOS and its also be used by future researcherwho wants to execute in similar fashion. Though this application is in needof large occupation of program memory and for that SDRAM has beenused but for complete FPGA embedded device this program works fineand capable of hashing of large size data up to 7000 bits at present instantand could be make it larger.




EmbeddedSystem

AnupamPandit,

KumareshChattopad-

hyayProma

Goswami


FPGAs



MD5 HashAlgorithm

Flowchart


Output



Bibliography

[1] Janaka Deepakumara,Haward M. Heys and R.Venkatesan, ”FPGAImplementation of MD5 Hash Algorithm”: Electrical and ComputerEngineering, 2001.

[2] www.wikipedia.org/wiki/Hash function

[3] Guang HU, Jinahua Ma, Benxiong Huang: High ThroughputImplementation of MD5 Algorithm on GPU

[4] www.xilinx.com/univ


Technology

Md5project