SPICE MODEL of 2SK4012 (Standard+BDS Model) in SPICE PARK

All Rights Reserved Copyright (c) Bee Technologies Inc. 2007

Device Modeling Report

Bee Technologies Inc.

COMPONENTS: Power MOSFET (Model Parameters) PART NUMBER: 2SK4012 MANUFACTURER: TOSHIBA REMARK: N Channel Model Body Diode (Model Parameters) / ESD Protection Diode


Circuit Configuration

2

3

1


MOSFET MODEL

Pspice model parameter

Model description

LEVEL

L Channel Length

W Channel Width

KP Transconductance

RS Source Ohmic Resistance

RD Ohmic Drain Resistance

VTO Zero-bias Threshold Voltage

RDS Drain-Source Shunt Resistance

TOX Gate Oxide Thickness

CGSO Zero-bias Gate-Source Capacitance

CGDO Zero-bias Gate-Drain Capacitance

CBD Zero-bias Bulk-Drain Junction Capacitance

MJ Bulk Junction Grading Coefficient

PB Bulk Junction Potential

FC Bulk Junction Forward-bias Capacitance Coefficient

RG Gate Ohmic Resistance

IS Bulk Junction Saturation Current

N Bulk Junction Emission Coefficient

RB Bulk Series Resistance

PHI Surface Inversion Potential

GAMMA Body-effect Parameter

DELTA Width effect on Threshold Voltage

ETA Static Feedback on Threshold Voltage

THETA Modility Modulation

KAPPA Saturation Field Factor

VMAX Maximum Drift Velocity of Carriers

XJ Metallurgical Junction Depth

UO Surface Mobility


0

2

4

6

8

10

12

14

0 2 4 6 8 10

DRIAN CURRENT ID (A)

TR

AN

SC

ON

DU

CT

AN

CE

GF

S(s

)

Measurement

Simulation

Transconductance Characteristic

Circuit Simulation Result

Comparison table

Id(A) gfs

Error(%) Measurement Simulation

1 3.236 3.271 1.060

2 4.515 4.557 0.929

5 6.984 6.944 -0.573

10 9.730 9.515 -2.212


V_VGS

0V 2V 4V 6V 8V 10V

I(V2)

0A

5A

10A

15A

20A

Vgs-Id Characteristic

Circuit Simulation result

Evaluation circuit

VDS10Vdc

V2

VGS0Vdc

0

U1 2SK4012


0

2

4

6

8

10

12

14

16

18

20

4 5 6 7

Gate - Source Voltage VGS (V)

Dra

in C

urr

en

t I

D

(A)

Measurement

Simulation

Comparison Graph Circuit Simulation Result

Simulation Result

ID(A) VGS(V)

Error (%) Measurement Simulation

1 4.500 4.475 -0.553

2 4.760 4.739 -0.441

5 5.290 5.273 -0.314

10 5.900 5.893 -0.119

20 6.720 6.801 1.205


V_VDS

0V 0.429V 0.858V 1.287V 1.716V 2.145V

I(Vsense)

0A

1.3A

2.6A

3.9A

5.2A

6.5A

Rds(on) Characteristic


Evaluation circuit

Simulation Result

ID=6.5A, VGS=10V Measurement Simulation Error (%)

RDS (on) 0.33 0.33 0.00

VGS10Vdc

Vsense

0

U1 2SK4012

VDS0Vdc


Time*1mA

0 10n 20n 30n 40n 50n 60n 70n 80n 90n

V(W1:3)

0V

2V

4V

6V

8V

10V

12V

14V

16V

18V

20V

Gate Charge Characteristic


Evaluation circuit

Simulation Result

VDD=400V,ID=13A, VGS=10V Measurement Simulation Error (%)

Qgs nc 15.00 14.952 -0.320

Qgd nc 16.00 16.108 0.675

Qg nc 48.00 40.557 -15.506

U1 2SK4012

I1

13Adc

-

+W1

ION = 0AIOFF = 1mA

WI2TD = 0

Vsense

DbreakD1

0

VD400Vdc


Capacitance Characteristic

Simulation Result

VDS(V) Cbd(pF)

Error(%) Measurement Simulation

0.1 2950 2900 -1.695

0.2 2750 2700 -1.818

0.5 2350 2400 2.128

1 1900 1890 -0.526

2 1410 1400 -0.709

5 900 890 -1.111

10 630 620 -1.587

Simulation

Measurement


Time

0.6us 0.8us 1.0us 1.2us 1.4us 1.6us

V(3)/20 V(L3:1)*1

-4V

-2V

0V

2V

4V

6V

8V

10V

12V

14V

16V

18V

20V

Switching Time Characteristic


Evaluation circuit

Simulation Result\

ID=6.5A, VDD=200V VGS=0/10V

Measurement Simulation Error(%)

ton ns 70.00 69.90 -0.143

R1

15

3

2

Vsense

0

U1 2SK4012

RL

31

V1TD = 1u

TF = 10nPW = 10uPER = 10m

V1 = 0

TR = 10n

V2 = 20VD

200Vdc

L3

30nH

R2

15


V_VDS

0V 10V 20V 30V 40V 50V

I(Vsense)

0A

2A

4A

6A

8A

10A

12A

14A

16A

18A

20A

Output Characteristic


Evaluation circuit

10V 8V

5.5V

5.25V

5V

4.75V

4.5V VGS=4V

5.75V

6V

0

U1 2SK4012

Vsense

VGS0Vdc

VDS10Vdc


V_V1

0V 0.1V 0.3V 0.5V 0.7V 0.9V 1.1V 1.3V 1.5V

I(R1)

100mA

1.0A

10A

100A

BODY DIODE Forward Current Characteristic


Evaluation Circuit

U12SK4012

0

R1

0.01m

V1

0Vdc


0.1

1

10

100

0 0.2 0.4 0.6 0.8 1 1.2

Drain - Source Voltage VDS (V)

Revers

e D

rain

Cu

rren

t- I

DR

(A

)

Measurement

Simulation

Comparison Graph Circuit Simulation Result

Simulation Result

IDR(A) VDS(V)

%Error Measurement Simulation

0.1 0.620 0.618 -0.339

0.2 0.640 0.640 0.000

0.5 0.670 0.672 0.254

1 0.700 0.706 0.857

2 0.740 0.738 -0.324

5 0.800 0.807 0.812

10 0.890 0.884 -0.708

20 1.000 1.000 0.000

30 1.100 1.101 0.091


Time

4us 6us 8us 10us 12us 14us 16us 18us 20us 22us

I(R1)

-400mA

-300mA

-200mA

-100mA

-0mA

100mA

200mA

300mA

400mA

Reverse Recovery Characteristic Circuit Simulation Result

Evaluation Circuit

Compare Measurement vs. Simulation

Measurement Simulation Error (%)

trr us 2.520 2.518 -0.079

R1 50

V1

TD = 7.8u

TF = 10ns

PW = 10us

PER = 50us

V1 = -9.3V

TR = 10ns

V2 = 10.8VU12SK4012

0


Reverse Recovery Characteristic Reference

Trj=1.56(us) Trb=0.96(us) Conditions:Ifwd=lrev=0.2(A),Rl=50

Relation between trj and trb

Example

Measurement


V_V1

0V 20V 40V 60V 80V 100V

I(R1)

0A

1mA

2mA

3mA

4mA

5mA

6mA

7mA

8mA

9mA

10mA

ESD PROTECTION DIODE Zener Voltage Characteristic


Evaluation Circuit

U1 2SK4012

R1

0.01m

0

open

V1

0Vdc

Ropen

100MEG

open

0


Zener Voltage Characteristic Reference

Measurement

Technology

SPICE MODEL of 2SK4012 (Standard+BDS Model) in SPICE PARK