Computer Organization Lecture 6

Fall 2006

Lillevik 333f06-l6 1University of Portland School of Engineering

EE 333

Computer OrganizationLecture 6

J-type machine instructionsALU design

Project 2 overview

Fall 2006


EE 333

Want to run MIPS programs?

• Go to my CS374 website, Reference page

• Download the MIPS simulator to

p:\mips directory, important step!

• Create your program with Notepad

• Drag file.asm to mips.batch icon

Fall 2006


EE 333

Last time

• MIPS loops

• Assembly vs. machine instructions

• Machine instruction formats– R-type– I-type– J-type

Fall 2006


EE 333

Machine Instructions

• Definition: numeric (hex) versions of instruction

• Memory: contains binary number or machine instruction, it’s what the hardware executes

• Formats– R, register– I, immediate– J, jump

NOTE: Result of assembly is a machine instruction

Fall 2006


EE 333

Instruction Formats

Name FieldsSize 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits

R type op rs rt rd shamt funct

I type op rs rt address/immediate

J type op target address

All instructions are 32-bits long

32-bits

Fall 2006


EE 333

J-format

• Op code examples: PC gets new valuej = 0x02, jal = 0x03

• Target address (what’s embedded in instruction)– Bits [25-0] = target address, word aligned, two

ending zeros not saved but implied– Upper 4 bits of PC not changed

• Effective address: concatenation of PC[31-28] and target [25-0] and [00]; always word aligned

Fall 2006


EE 333

Addresses reviewed

• Immediate: lower 16 bits from I-type instruction, sign extended

• Target: lower 26 bits from J-type instruction

• Word aligned: bits 0 & 1 are zero

• Effective: actual CPU memory address, 32-bitsI-type ea = c(rx), sum of $rx +

constant/immed

J-type ea = [pc31:pc28] [target25:target0] [00]

Fall 2006


EE 333

Range of jump instruction

0

1

x

F

PC

Memory026 2531

jumps limited to this area in memory

Fall 2006


EE 333

Jump effective address (ea)

• Assume: PC = 0x 1040 0000

• Target address = 0x 065 4321

ea = [pc31:pc28] [target25:target0] [00]

[0001] [00 0110 0101 0100 0011 0010 0001] [00]

ea = 0x 1195 0c84From PC ImpliedInstruction target field

Fall 2006


EE 333

J-format example

Name FieldsSize 6 bits 26 bits

J type 00 0010 00 0001 0000 1000 0100 0000 0000

j loop # loop = 0x 42 1000

ea = 0x 42 1000 = [0100 0010 0001 0000 0000 00]00

target = 0000 0100 0010 0001 0000 0000 00

implied

add in leading zeros for 26 bits

Assume: pc31:pc28=0

Fall 2006


EE 333

Find machine instruction?


J type 00 0010 00 0001 0011 1101 1000 0100 1011

j end # end = 0x 4f 612c

Assume: pc31:pc28=0

0x 4f 612c = 0100 1111 0110 0001 0010 1100

target =[00000100111101100001001011]

inst = 0x 0813 d84b

Fall 2006


EE 333

Major Computer Components

Five classic computer components

Fall 2006


EE 333

Computer Components

• Input: receives information from external world

• Output: transmits information to external world

• Memory: holds programs and data

• Data path: physical route that carries info

• Control: coordinates overall flow of infoDenoted Processor

Fall 2006


EE 333

MIPS datapath overview

• Instruction read from memory• Registers selected for operation• ALU performs function• Result written to register

Fall 2006


EE 333

ALU overview

• ALU: arithmetic and logic unit• Inputs

– Two operands: a, b– Control: operation to perform

• Outputs– Result: c = a <op> b– Misc.: zero, overflow, etc.

32

32

32

Fall 2006


EE 333

ALU design

• Each bit requires a separate circuit

• Entirely combinational logic: sop or pos

• Often many gate delays

Fall 2006


EE 333

74LS181 4-bit ALU

Data sheet on web site

Fall 2006


EE 333

Pin names

NAME Type Function CommentA[3:0] I First operand 4-bit number

B[3:0] I Second operand 4-bit number

S[3:0] I Select Defines function

M I Mode Logic or arithmetic

Cn I Carry in For cascading ALU’s

F[3:0] O Function Result of operation

A=B O Comparator output For equal test

G O Carry generate For fast addition

Cn+4 O Carry output For fast addition

Fall 2006


EE 333

Example functions

• Logic

and = 0xb

or = 0xe

• Arithmetic

add = 0x9

sub = 0x6 (minus 1)

Table is difficult to read

Fall 2006


EE 333

What is Mode, Select?

Function Mode Selectadd 0 1001

xor 1 0110

(A – 1) 0 1111

and 1 1011

or 1 1110

nand 1 0100

nor 1 0001

(A + 1) 0

sub 0???

Fall 2006


EE 333

ALU design with LS181’s

• Assume– 12-bit computer– Active high operands

• Must cascade three devices– Carry out must drive next carry in– Mode and select bused to all devices

Fall 2006


EE 333

One device

NOTE: Active low symbol

provided

Fall 2006


EE 333

Design a 12-bit ALU?

Fall 2006


EE 333

Add operations

What is the propagation time?

Is it the same for all numbers?

NOTE: S = 9, M = 0

Fall 2006


EE 333

Or operations

What is (0x555) or’d (0xaaa)?

NOTE: S = e, M = 1

Fall 2006


EE 333

Project 2 overview

• Sixteen-bit ALU

• Use four LS181 plus some other logic

• Arithmetic: +, -

• Logical:– and, or– shift left, shift right

Fall 2006


EE 333

Fall 2006


EE 333

Find machine instruction?


J type 00 0010 0000 0100 1111 0110 0001 0010 11

Assume: pc31:pc28=0

0x 4f 612c = [0100 1111 0110 0001 0010 11]00

target = 0000 0100 1111 0110 0001 0010 11

inst = 0x 0813 d84b

j end # end = 0x 4f 612c

Fall 2006


EE 333

What is Mode, Select?

Function Mode Selectadd 0 9

xor 1 6

(A – 1) 0 f

and 1 b

or 1 e

nand 1 4

nor 1 1

(A + 1) 0 9, B=1

sub 0 6, Cn = 0

Fall 2006


EE 333

Design a 12-bit ALU?

Documents

Computer Organization Lecture 6