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Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Breakout Session: Controls
Physics Requirements
and Technology Choices for
LCLS Instrumentation & Controls
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Accelerator Physics Driving Controls Design
Precision beams• Low emittance• Short bunch
Single passEvery shot different
SimultaneousSingle shot
Read all devices
PS controlProcess/respond in
< 1/120th sec.
Feedback•Trajectory
•Bunch length •Energy
• Timing distribution• RF Phase control
Applications• Machine tuning
Compatibility• Other programs
• Old controls
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Critical design choices for instrumentation
Power supply control and regulationStability and latency time for fast feedback control
Beam position monitor signal processingResolution, drift, calibration
Timing distributionPrecision, stability, synchronization, SLC compatibility
RF stabilizationBeam based feedback
Single-shot CSR bunch length monitors
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Power supply system requirements
Stability requirements10 ppm in the chicane bends
Response timeLow control-system latency for feedback
<1 ms
Commercial components
Reliability
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Digital PS controller developed by SLSPWM digital regulation loop controls AC converter power module
PWM is a digital process alreadyAvoids unnecessary digital => analog => digital conversion
Only source of drift in an all digital system is ADC reference voltage
High-speed links, minimal latency
Fully developed at SLS with proven performance
Fully integrated into EPICS controls
Now adopted by several large accelerator projects, including Diamond Light Source
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Power supply controller system layout
IOC
EPICS
Power SupplyDSP Controller
ADCCard
PWMAC Converter
load
DCCT
8 chVME card
ACline
5MHzOptical fiber
PWMsignal
Monitorsignals
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
PSI Digital Power Supplies
ADC/DACCard
DSPController
DCCT
0..6Slaves
Magnet
PWMSignal
Fast Optical Link(5 MHz)
DIO
U1..4
I
PowerConverter
Master
Optical Trigger
Courtesy A. Luedeke, PSI
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Enhancements to the SLS PS Design
Diamond Light Source exploits the following capabilities of the SLS system
Works with any PWM power converter
so use commercial units (OCEM, Bruker)
One controller can drive multiple, load-sharing AC converter power modules
So use multiples of standard units to customize, e.g. 4 x 25 A modules for one 100 A supply
Add an extra module to take up load if one fails
Modules are hot-swappable
Reliability, with minimal downtime from PS
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Beam Position Monitoring requirements
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Beam Position MonitorsStripline BPMs in the injector and linac (existing) and in the LTU
Differencing large numbersMechanical precision
Fabrication by printing electrodes on ceramic tubes
Drift in electronicsDigital signal processing
Cavity BPMs in the undulator, LTU launchSignal inherently zero at geometric centerC-band (inexpensive) signal needs to be mixed down in the tunnel
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Stripline versus Cavity BPM SignalsP
f700 MHz
500 MHzBP filter
ADCx4
119 MHzClock
24th harmonic
DigitalprocessingRF in
Controlsystem
/4
Stripline
Mixer
LO sync’ed to RF
IF
• noise (resolution) minimized by removing analog devices in front of ADC that cause attenuation• drift minimized by removing active devices in front of ADC
• noise (resolution) minimized by removing analog devices in front of ADC that cause attenuation• drift minimized by removing active devices in front of ADC
C-bandcavity
Dipole mode
coupler
~5 GHz
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Simplistic View of Digital BPMs
Is the purely digital approach the best way to go?Must always maximize signal to noise for best resolution
So minimize any cause of attenuation: couplers, hybrids, active devices etc.
This also eliminates drift which causes offsetsOther approaches also try to do this: e.g. AM to PM conversion with a hybrid and then digitizeMight as well digitize first, eliminate the middle men, and do the conversions digitallyUltimately left with calibrating the drift in the BPM cables, because ADCs are now very stable.
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Linac stripline BPMs• Need to replace old BPM electronicsNeed to replace old BPM electronics• Commercially available processing units look promisingCommercially available processing units look promising• Beam testing of module (on order) can begin soonBeam testing of module (on order) can begin soon
http://www.i-tech.si
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Analysis of Test Signals in the “Libera” module – S. Smith
Measured signal to noise ratio implies resolution of 7 m in a 10 mm radius BPM
Identified fixable artifacts in data processing
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Pros and Cons of the Libera concept
Complete, integrated commercial package which comes close to requirements
RF processing, digitization, calibration, control software and feedback DSP all in one box
Makes it hard for us get inside and tweak itAccess to fast signals for feedback systems
Difficult to provide timestamps and interrupts in their O/S
Might be better to separate out the functions into different modules
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Fabricating a Digital BPM processor out of commercially available modules – Till Straumann
RF filter, local oscillator and mixer stage
VME based ADC board e.g. Joerger, Echotek handle 8 channels
IOC Calculates signal amplitude & beam position, tmit.
interfaces to EPICS,
procedures for calibration,
process feedback algorithm
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Signal losses in long BPM cables versus placing electronics in the tunnel
We are choosing a high frequency component of the BPM signal to maximize amplitude
But this is rapidly attenuated in long cable runs
Can down-convert next to the BPM with a local oscillator and a mixerUnacceptable to put electronics in the linac tunnel,
pay for better cables
But may be acceptable to put down-converter electronics in the undulator and LTU tunnels
Highest resolution required there
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Timing system requirements
Synchronization of fiducials in low-level RF with distribution of triggers in the control system
1/360 sLinac 476 MHzMain Drive Line Sector feed
Fiducialdetector
MasterPattern
Generator
SLCControlSystem Event
Generator360 Hz Triggers8.4 ns±10 ps
128-bit wordbeam codes
119 MHz
360 Hz fiducials phase locked to low level RF
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Digital distribution of SLAC timing
10 GBit ethernet hardware
but not ethernet protocol. RF master oscillator
476 MHzMDL
Divide by 4
Fiducial detector
Event generator
EVG VME module
Fan out
8 ch
Event receiver
EVRVME module
fiber
fiber
8.4 ns
16 bit word
8.4 ns 8.4 ns
Clock119 MHz
FPGA
TriggersTriggers3 ps stability3 ps stabilityTriggersTriggers3 ps stability3 ps stability
Technology developed at SLSCommercialized, refined, adopted at Diamond
Optional vernier module
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
3 Levels in the Timing System
“coarse” triggers at 360 Hz with 8.4 ns delay step size and 10 ps jitter
Gated data acquisition (BPMs)Pulsed devices (klystrons)
Phase lock of the low-level RF0.05 S-band (50 fs) phase stability
Timing measurement of the pump-probe laser w.r.t. electron beam in the undulator10 fs resolution
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
LCLS Machine Stability Tolerance BudgetLCLS Machine Stability Tolerance Budget
X-bandX-band XX--
From P. Emma:
RMS tolerance budget for <12% rms peak-current jitter or <0.1% rms final e− energy jitter. All tolerances are rms levels and the voltage and phase tolerances per klystron for L2 and L3 are Nk larger, assuming uncorrelated errors, where Nk is the number of klystrons per linac.
125 fs tolerance on X-band system
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Beam based feedback will stabilize RF AAgainst drift and jitter up to ~10 Hz
But no diagnostic to distinguish drift of X-bandLinearization, higher-harmonic RF has the tightest tolerance
No unique beam measurement
Energy and Bunch Length Feedback Loops
L0 L1
DL1
DL1Spectr. BC1 BC2
L2 L3
BSY 50B1
DL2
Vrf(L0)
Φrf(L2)Vrf(L1) Φrf(L3)E E E
Φrf(L2) zΦrf(L1) zE
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
CSR Single-shot Bunch Length Detector
Off-axis synchrotron radiation
Reflected through a port to: Fixed BW detector
Autocorrelator
Prototype at SPPS
THz autocorrelator
THz power
detector
B4 Bend
Bunch Compressor Chicane
CSR
Vacuum port with reflecting foil
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
End of presentation!
Additional backup material follows
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Linac type stripline BPMs
LCLS range
Resolution achievable with existing processor
New BPM processor design challenges:
• large dynamic range• Low noise, high gain• 20 ps timing jitter limit
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Cavity beam position monitors for the undulator and LTU
Coordinate measuring machine verification of cavity interior
• X-band cavity shown
• Dipole-mode couplers
• X-band cavity shown
• Dipole-mode couplers
R&D at SLAC – S. Smith
• X-band cavity shown
• Dipole-mode couplers
• X-band cavity shown
• Dipole-mode couplers
NLC studies of cavity BPMs, S. Smith et al
NLC studies of cavity BPMs, S. Smith et al
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
C-band beam tests of the cavity BPM – S. Smith
25 m
200 nm
• Raw digitizer records from beam measurements at ATF
• Raw digitizer records from beam measurements at ATF
cavity BPM signal versus predicted position at bunch charge 1.6 nC
cavity BPM signal versus predicted position at bunch charge 1.6 nC
• plot of residual deviation from linear response• << 1 m LCLS resolution requirement
• plot of residual deviation from linear response• << 1 m LCLS resolution requirement
• C-band chosen for compatibility with wireless communications technology
• C-band chosen for compatibility with wireless communications technology
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Synchronization of the Laser timing
Jitter in the laser timing effects
Electro optic bunch timing measurement
Pump-probe timing for the users
Enhancement schemes using short pulse lasers
Jitter in the laser timing effects
Electro optic bunch timing measurement
Pump-probe timing for the users
Enhancement schemes using short pulse lasers
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
SPPS Laser Phase Noise Measurements – R. Akre 476 MHz
M.O.
x62856 MHz
to linac
MDL3 km
fiber~1 km
VCO
Ti:Salaser osc
diode
EO
scope
Phase detector
2856 MHz
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Electro-Optical Sampling at SPPS Electro-Optical Sampling at SPPS – A. Cavalieri et al.– A. Cavalieri et al.Single-ShotSingle-Shot
<300 fs<300 fs
170 fs rms170 fs rmsTiming JitterTiming Jitter
Er
Line image camera
polarizer
analyzer
Pol. Laser pulse
Electron bunch
EO crystal
Bunch length scan
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Antidamp
Damp
Gain bandwidth for different loop delays- L. Hendrickson
Closed Loop Response of Orbit Feedback
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Control of Digital Power Supplies
Andreas LüdekeSwiss Light Source / PSI
20 May 2003EPICS Collaboration Meeting
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
PSI Digital Power Supplies
ADC/DACCard
DSPController
DCCT
0..6Slaves
Magnet
PWMSignal
Fast Optical Link(5 MHz)
DIO U1..4
I
PowerConverter
Master
Optical Trigger
Andreas Lüdeke
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Why use Digital Power Supplies?
Single source of drifts: ADC voltage referenceAll PS at the SLS proved to have excellent stability
Flexibility of the power suppliesRegulation loop can be adapted to loadEasy to add new power supply features on DSP
Good reproducibility, reliabilityPWM is digital, modern DCCT will be digitalWhy not?
Andreas Lüdeke
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Hardware Overview
Linux PCConsoles
IOC EVRCarrier
IP IP IP IP OrbitDSP
Timing
Trans.Mod.VME T.Mod
Power SupplyController
Parallel fast access (10k frames per sec)
• IOC IP• DSP IP• …
Andreas Lüdeke
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Power Supply Hardware
DSP Controller CardEuro card sizeShark DSPShark links on backplane
ADC/DAC card2 ADC, 16 Bit, 50 kHz4 ADC, 12 Bit2 DAC for debugging
Andreas Lüdeke
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Fast and precise ADC
0 200 400 600 800 1000 1200 1400 1600 1800 20004.7888
4.7889
4.789
4.7891
4.7892
4.7893
4.7894
4.7895
- 10 µV
- 10 µV
+ 20 µV
- 40 µV
33 min t [s]
UADC
[V]
Umax
Umin
1 kHzFilter
10 µV 1 ppm 20th Bit
600
µV
Andreas Lüdeke
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
VME Hardware
Industry Pack Carrier VME64x 4 slot boards“off-the-shelf”:• Greenspring Vipc664• Hytec 8002
VME64x Transition modulefor 8 power supplies
Industry Pack Module for 2 power supplies
Andreas Lüdeke
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
DSP Software
Local intelligence:50 kHz pulse width modulation loop
Sophisticated alarms, like change in load resistance
Triggered current waveform (DSP ramp)Scaleable, arbitrary waveform
16000 times 80 µsec steps > 1 second waveform
The same DSP program for all PSLocally stored parameter settings for each PS
Andreas Lüdeke
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
EPICS device/driver
Carrier board independent by use of drvIpacRead and write 256 power supply registersDSP waveform and program downloadsSoftramps: synchronised current waveforms
Arbitrary clock rate (<1kHz) for 8000 setpointsSynchronised by timing system
Diagnostic recordsStatistics of optical fibre link and IP failures
Andreas Lüdeke
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
EPICS database
One template for 500 power suppliesEach power supply supports
Download and save of DSP programs, parameter sets, DSP IDcurrent waveform: download, scaling, offset, length, …reading max. and min. current from PSreading actual magnet resistance from controller...
Magnet cycling configurable for each PSDetailed fault diagnostic for PS, link and driver
Andreas Lüdeke
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Software Management
DSP software is documented by Excel sheets
Script transforms sheets into a C include file
Easy upgrade of the driver for new PS functions
Identical DSP and EPICS software for all PSConfiguration by parameter set
Andreas Lüdeke
Patrick Krejcik
LCLS FAC [email protected]
October 12-13, 2004
Outlook
PSI type digital PS are “en vogue”Each manufacturer can get a PSI licence
Diamond will use exclusively digital PS for magnets
Soleil is evaluating the PSI digital PSIndustry Pack module can be used on CPCI
Driver source can be reused for Tango
Customized DSP programs For specific application
To drive several PS with one DSP card
Andreas Lüdeke
