HW 3: Design a Booth’s multiplier Problem description: Design a Booth’s multiplier using Verilog This multiplier accepts two 8-bit inputs and produces a 16-bit output. First finish your design on paper, then converting your design into Verilog code at register transfer level. The above diagram has a data path and a control unit and can be used as a reference platform for your design. Other parts are needed for the Booth’s algorithm. Homework: (1) One sentence indicates whether your design is working or not. (2) Verilog source code for your design and Verilog code for testing (3) A simulation result, i.e., outputs, containing enough examples to show your design working properly.
HW 3: Design a Booths multiplier Problem description: Design a
Booths multiplier using Verilog This multiplier accepts two 8-bit
inputs and produces a 16-bit output. First finish your design on
paper, then converting your design into Verilog code at register
transfer level.
The above diagram has a data path and a control unit and can be
used as a reference platform for your design. Other parts are
needed for the Booths algorithm. Homework: (1) One sentence
indicates whether your design is working or not. (2) Verilog source
code for your design and Verilog code for testing (3) A simulation
result, i.e., outputs, containing enough examples to show your
design working properly.
