SPICE MODEL of 2SJ511 (Standard+BDS Model) in SPICE PARK

All Rights Reserved Copyright (c) Bee Technologies Inc. 2008

Device Modeling Report

Bee Technologies Inc.

COMPONENTS: Power MOSFET (Model Parameter) PART NUMBER: 2SJ511 MANUFACTURER: TOSHIBA Body Diode (Model Parameter) / ESD Protection Diode


MOSFET MODEL

Pspice model parameter

Model description

LEVEL

L Channel Length

W Channel Width

KP Transconductance

RS Source Ohmic Resistance

RD Ohmic Drain Resistance

VTO Zero-bias Threshold Voltage

RDS Drain-Source Shunt Resistance

TOX Gate Oxide Thickness

CGSO Zero-bias Gate-Source Capacitance

CGDO Zero-bias Gate-Drain Capacitance

CBD Zero-bias Bulk-Drain Junction Capacitance

MJ Bulk Junction Grading Coefficient

PB Bulk Junction Potential

FC Bulk Junction Forward-bias Capacitance Coefficient

RG Gate Ohmic Resistance

IS Bulk Junction Saturation Current

N Bulk Junction Emission Coefficient

RB Bulk Series Resistance

PHI Surface Inversion Potential

GAMMA Body-effect Parameter

DELTA Width effect on Threshold Voltage

ETA Static Feedback on Threshold Voltage

THETA Modility Modulation

KAPPA Saturation Field Factor

VMAX Maximum Drift Velocity of Carriers

XJ Metallurgical Junction Depth

UO Surface Mobility


0.0

0.4

0.8

1.2

1.6

2.0

0.0 0.2 0.4 0.6 0.8

- ID : Drain Current A

gfs

Measurement

Simulation

Transconductance Characteristic

Circuit Simulation Result

Comparison table

-Id(A) gfs

Error(%) Measurement Simulation

0.010 0.083 0.085 2.410

0.020 0.143 0.142 -0.699

0.050 0.250 0.248 -0.800

0.100 0.420 0.430 2.381

0.200 0.667 0.680 1.949

0.500 1.250 1.278 2.240

1.000 1.449 1.495 3.175


V_V1

0V -0.5V -1.0V -1.5V -2.0V -2.5V -3.0V -3.5V -4.0V -4.5V

I(V3)

0A

-0.4A

-0.8A

-1.2A

-1.6A

-2.0A

Vgs-Id Characteristic

Circuit Simulation result

Evaluation circuit

0

U12SJ511

V3

0Vdc

V2

-10V1

-3


0.0

0.4

0.8

1.2

1.6

2.0

0.0 1.0 2.0 3.0 4.0 5.0

- VGS : Gate to Source Voltage V

- ID

: D

rain

Cu

rren

t A

Measurement

Simulation

Comparison Graph Circuit Simulation Result

Simulation Result

-ID(A) -VGS(V)

Error (%) Measurement Simulation

0.010 1.800 1.887 4.833

0.020 1.900 1.938 2.000

0.050 2.000 2.041 2.050

0.100 2.100 2.175 3.571

0.200 2.300 2.351 2.217

0.500 2.700 2.703 0.111

1.000 3.050 3.099 1.607

2.000 3.650 3.666 0.438


0

U12SJ511

VD_Sense

0Vdc

VGS

-10Vdc

VDS10Vdc

V_VDS

0V -200mV -400mV -500mV

I(VD_Sense)

0A

-0.5A

-1.0A

Rds(on) Characteristic


Evaluation circuit

Simulation Result

ID=-1A, VGS=-10V Measurement Simulation Error (%)

RDS (on) () 0.320 0.320 0.000


I22

0

-

+

W1

ION = 0uAIOFF = 1mAW

U12SJ511

V1

-24

I1

TD = 0

TF = 10nPW = 600uPER = 1000u

I1 = 0I2 = 1m

TR = 10n

D2Dbreak

Time*1mA

0 2n 4n 6n 8n 10n

V(W1:4)

0V

-2V

-4V

-6V

-8V

-10V

Gate Charge Characteristic


Evaluation circuit

Simulation Result

VDD=-24V,ID=-2A ,VGS=-10V

Measurement Simulation Error (%)

Qgs(nc) 1.000 1.030 3.000

Qgd(nc) 1.200 1.203 0.250

Qg(nc) 10.000 7.792 -22.080


Capacitance Characteristic

Simulation Result

VDS(V) Cbd(pF)

Error(%) Measurement Simulation

0.100 110.000 109.500 -0.450

0.200 105.000 105.000 0.000

0.500 95.000 95.100 0.110

1.000 85.000 85.500 0.590

2.000 75.000 75.200 0.270

5.000 62.000 61.500 -0.810

10.000 53.000 52.800 -0.380

20.000 45.000 45.000 0.000

Simulation

Measurement


R1

50

V1-15Vdc

U12SJ511

R3

50

R215L2

50nH

V2TD = 2u

TF = 1nPW = 10uPER = 200u

V1 = 0

TR = 1n

V2 = 20

0

L1

30nH

Time

1.0us 1.5us 2.0us 2.5us 3.0us 3.5us

V(L1:2)*1.5 V(R2:2)

0V

-5V

-10V

-15V

-20V

Switching Time Characteristic


Evaluation circuit

Simulation Result

ID=-1A, VDD=-15V VGS=-10V

Measurement Simulation Error(%)

Ton(ns) 45.000 45.135 0.300


V1

-4

U12SJ511 V2

-0.5

V3

0Vdc

0

V_V2

0V -2V -4V -6V -8V -10V

I(V3)

0A

-0.4A

-0.8A

-1.2A

-1.6A

-2.0A

Output Characteristic


Evaluation circuit

VGS= -2.5V V

-3

-3.3

-3.5

-2.8 V

-8

-10

-5 -4

-3.8

-6


V_VDS

0V 0.2V 0.4V 0.6V 0.8V 1.0V 1.2V

I(VD_Sense)

10mA

100mA

1.0A

10A

BODY DIODE SPICE MODEL Forward Current Characteristic


Evaluation Circuit

0

VDS10Vdc

U12SJ511

VD_Sense

0Vdc


0.01

0.10

1.00

10.00

0 0.2 0.4 0.6 0.8 1 1.2

Drain - Source voltage VDS(V)

Dra

in r

evers

e c

urr

en

t ID

R(A

)Measurement

Simulation

Comparison Graph Circuit Simulation Result

Simulation Result

IDR(A) VDS(V)

Measurement VDS(V)

Simulation %Error

0.010 0.615 0.616 0.163

0.020 0.642 0.641 -0.156

0.050 0.675 0.672 -0.444

0.100 0.698 0.696 -0.287

0.200 0.725 0.724 -0.138

0.500 0.765 0.768 0.392

1.000 0.820 0.819 -0.122

2.000 0.895 0.894 -0.112


Time

0.84us 0.92us 1.00us 1.08us 1.16us 1.24us

I(R1)

-400mA

-200mA

0A

200mA

400mA

Reverse Recovery Characteristic Circuit Simulation Result

Evaluation Circuit

Compare Measurement vs. Simulation

Measurement Simulation Error (%)

Trj(ns) 15.200 15.476 1.816

V1

TD = 20n

TF = 10nsPW = 1usPER = 100us

V1 = -9.4v

TR = 1ns

V2 = 10.7v

R1

50

0

U12SJ511


Reverse Recovery Characteristic Reference

Trj= 15.2 (ns) Trb= 20.8 (ns) Conditions:Ifwd=lrev=0.2(A),Rl=50

Relation between trj and trb

Example


V_V1

0V 5V 10V 15V 20V 25V 30V 35V 40V 45V 50V

I(R1)

0A

1mA

2mA

3mA

4mA

5mA

6mA

7mA

8mA

9mA

10mA

ESD PROTECTION DIODE SPICE MODEL

Zener Voltage Characteristic


Evaluation Circuit

0

R1

0.01m U12SJ511

V1

0Vdc

R2

100MEG


Zener Voltage Characteristic Reference

Technology

SPICE MODEL of 2SJ511 (Standard+BDS Model) in SPICE PARK