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E.Pop, Stanford U. SRC SiNB Workshop, 2003 Thermal Challenges in Nanoscale Devices and Packaging http:nanoheat.stanford.edu Silicon Nanoelectronics and Beyond SRC/Intel/NNI Workshop, October 29-30, 2003 Eric Pop 1 Kenneth Goodson 2 and Robert Dutton 1 Dept. of Electrical 1 and Mechanical 2 Engineering Stanford University

Nanoscale Thermal Device Challenges

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Page 1: Nanoscale Thermal Device Challenges

E.Pop, Stanford U. SRC SiNB Workshop, 2003

Thermal Challenges in NanoscaleDevices and Packaging

http:nanoheat.stanford.edu

Silicon Nanoelectronics and BeyondSRC/Intel/NNI Workshop, October 29-30, 2003

Eric Pop1

Kenneth Goodson2 and Robert Dutton1

Dept. of Electrical1 and Mechanical2 EngineeringStanford University

Page 2: Nanoscale Thermal Device Challenges

E.Pop, Stanford U. SRC SiNB Workshop, 2003

Transistor Thermal Challenges

1

10

100

1000

1990 1994 1998 2002 2006 2010

AMDIntelPower PCTrend

1

10

100

1000

1990 1994 1998 2002 2006 2010

AMDIntelPowerPCTrend

Siemens

1 µm

Electrostatic Discharge (ESD)

IBM

Confined Geometries, Novel Materials

F.Labonte

Pow

er D

ensi

ty (W

/cm

2 )

Tran

sist

or C

ount

(mill

ions

)

Hot Plate

Rocket Nozzle

Nuclear Reactor

0.8 µm 0.35 µm 0.13 µm 0.05 µm

Page 3: Nanoscale Thermal Device Challenges

E.Pop, Stanford U. SRC SiNB Workshop, 2003

Packaging Work and ChallengesHeat sinks are 3000x larger & heavier than the chip

They crowd away power deliver componentsUnable to address local chip-level hotspotsMixed signal integration competes for I/O area

Grand Challenge – power delivery & heat removalMicrochannel cooling of chip-level hotspotsSolid-state electroosmotic pumpingThermofluidic CAD

conventional heat sinkMicroprocessor with Integrated Power Module:(Stanford - MARCO)

Photonic I/O RFIntegrated MEMS

Sensing

ElectricalConnections Microprocessor

Fluidic I/O

Fluidic Cooling

Page 4: Nanoscale Thermal Device Challenges

E.Pop, Stanford U. SRC SiNB Workshop, 2003

Sub-Continuum Heat Transport

Λ ~ 200 nm

Si

D

Si

Ox

Ox Me

tsi

Macroscale (D » Λ)

Nanoscale (D < Λ)

( ) QTktTC ss ′′′+∇⋅∇=

∂∂

Qee

evte

phon

eq ′′′+′′−′′

=′′∇⋅+∂

′′∂τ

r

Heat transfer issuesoptical-acousticsmall heat sourceimpurity scatteringboundary scatteringboundary thermal res.

BulkDevices

Thin BodyDevices

Page 5: Nanoscale Thermal Device Challenges

E.Pop, Stanford U. SRC SiNB Workshop, 2003

Nanodevice Thermal ProjectionsExtract device self-heating from comprehensive electron-phonon Monte Carlo

∆T

Incr

ease

(K)

Power Q

’ (µW/µm

)

Channel Length L (nm)

Pop, Banerjee, Dutton, Goodson, IEDM 2001

Bulk Devicesoptical-acoustic bottlenecksmall heat sourcepeak drain T estimate

Pop, Dutton, Goodson, IEDM 2003

Dra

in T

Ris

e (K

)

Channel Length L (nm)

Thin Body (FD-SOI)boundary scatteringthin, doped layersboundary thermal resistancerole of raised source & drain

Page 6: Nanoscale Thermal Device Challenges

E.Pop, Stanford U. SRC SiNB Workshop, 2003

URL: http://nanoheat.stanford.edu

Page 7: Nanoscale Thermal Device Challenges

E.Pop, Stanford U. SRC SiNB Workshop, 2003

SummaryDevice dimensions ↓↓ , kth ↓ , power (I.V) ↓

Result power density and T ↑

Fundamental aspects of nano-heatingComplex codes fast enough for device design

Side-effect compact, physical models

Nanoscale temperature rise is significantMust learn electro-thermal device scalingWe CAN improve thermal device designNeed research on thin film phonon dispersionNew materials & boundary thermal propertiesStrong ties with industry, information sharing

f

g

Page 8: Nanoscale Thermal Device Challenges

E.Pop, Stanford U. SRC SiNB Workshop, 2003

Computed Phonon Generation

Optical

Acoustic

optical

acoustic

Near-full band MC complexity for analytic-band MC speed – towards a device designer’s MC?

Page 9: Nanoscale Thermal Device Challenges

E.Pop, Stanford U. SRC SiNB Workshop, 2003

Confined Electrons and Phonons2-D Phonons2-D Electrons

tsi

Electro-thermal transport in ultra-thin silicon films (tsi ~ 5 nm): role of electron and phonon confinement

Page 10: Nanoscale Thermal Device Challenges

E.Pop, Stanford U. SRC SiNB Workshop, 2003

OverviewDevice dimensions scale quicker than power (I.V)

Result power density and T ↑

Work on fundamental aspects of nano-heatingElectron Monte Carlo heat generation ratesPhonon Molecular Dynamics scat./transport

Finite volume methods for BTEGoal: electro-thermal simulator

Compact, physical models for devicesGoal: trends, circuit simulation

Apply to bulk and SOI/FinFETsGoal: improve device design

f

g