Lucas van Grinsven

Head of Communications and Community Relations

SURFsara

Science Park Amsterdam

June 2013

Thinking faster, smaller, greener

Moore’s Law – what is it, really?

Moore’s Law – How is it done?

Some challenges for innovation

17 June 2013

Public

Slide 2

Moore’s Law – what is it, really?

17 June 2013

Publicl

Slide 3

Driving the semiconductor industry: Moore’s Law

Gordon Moore (1965):

Number of transistors per

chip doubles every year.

Later adjusted to two

years, the trend has held

for more than four

decades.

17 June 2013

Public

Key to Moore’s Law: Making smaller transistors 17 June 2013

The first integrated circuit on

silicon, on a wafer the size of

a fingernail (Fairchild Semiconductor, 1959)

Today: More than a

billion transistors on

the same area (Intel, 2012)

Transistor length has

shrunk by a million

Source: Gartner. High quality Flash

Lith

og

raph

y c

ost p

er

unit o

f m

em

ory

$/G

Byte

Moore’s Law makes chips cheaper…

10000

100

10

1

1000

17 June 2013

Public

$1,162 for 1 GB

$0.17 for 1 GB

Solid state

hard drives

Smartphones

1

10

100

1.000

1

10

2000 Total

2001 Total

2002 Total

2003 Total

2004 Total

2005 Total

2006 Total

2007 Total

2008 Total

2009 Total

2010 Total

2011 Total

Fla

sh

pri

ce p

er

GB

(in

do

lla

rs)

Fla

sh

un

its

(in

bil

lio

ns

)

Total flash units [B]

Flash price 1 GB [$]

Cheaper chips drive market growth 17 June 2013

Public

Slide 7

Digital

cameras

MP3

player

Solid state

hard drives

Smart

phones

More than 180 billion chips are made every year

Data: WSTS

In 2012, 185 billion chips

were produced — 27 for

every man, woman and

child on the planet.

This equals total IC sales of

$238 billion.

17 June 2013

Public

Slide 8

Moore’s Law helps to reduce energy usage Computations per Kilowatt hour double every 1.5 years

Source: Jonathan Koomey, Lawrence Berkeley National Laboratory and Stanford University, 2009

Dell Optiplex GXI

486/25 and 486/33 Desktops

IBM PC-AT IBM PC-XT

Commodore 64

DEC PDP-11/20

Cray 1 supercomputer

IBM PC

SDS 920

Univac I

Eniac EDVAC

Univac II

Univac III (transistors)

Regression results: N = 76 Adjusted R-squared = 0.983 Comps/kWh = exp(0.440243 x year – 849.259) Average doubling time (1946 to 2009) = 1.57 years

IBM PS/2E + Sun SS1000

Gateway P3. 733 MHz

Dell Dimension 2400

SiCortex SC5832

2008 + 2009 laptops 1.E+16

1.E+15

1.E+14

1.E+13

1.E+12

1.E+11

1.E+10

1.E+09

1.E+08

1.E+07

1.E+06

1.E+05

1.E+04

1.E+03

1.E+02

1.E+01

1.E+00

Co

mp

uta

tio

ns p

er

kW

h

1940 1950 1960 1970 1980 1990 2000 2010

April 2013

Public

Slide 9

Communication became ~ 1013 more energy efficient enabled by scaling of semiconductors

Frederic Remington, “The Smoke signal”, 1905, Amon Carter Museum, Forth Worth, USA

5 MJ/b 20 wood sticks of 2 cm diameter and 50 cm long equals ~3 dm³ Message size 10 characters or 10 ~15 MJ/dm³ energy from burning wood we use 45 MJ/message or 5 MJ/b

1 μJ/b High Speed Downlink Packet Access, HSDPA speed 3.65 Mb/s using 5.5 W resulting in ~1μJ/b (Siemens UR5 router)

April 2013

Public

Slide 10

Moore’s Law means doing more with less

Cray 1: The first supercomputer

• 8 megabytes of memory

• 5.5 tons

• 150 kilowatt power supply

• “Innovative Freon cooling

system”

• $8.8 million ($30 million in

today’s dollars)

1976

17 June 2013

Public

Moore’s Law means doing more with less

1976 2012

The supercomputer in your pocket:

a fraction of the

materials,

price,

power consumption

17 June 2013

Public

A virtuous cycle 17 June 2013

Public

Slide 13

Game changer of affordable advanced computing

Source: Morgan Stanley,

The Mobile Internet Report, Dec 2009

10

1000

100

10,000

100,000

1,000,000

0

1960 1970 1980 1990 2000 2010 2020

De

vic

es/U

sers

(M

M in

Lo

g S

ca

le)

1

Computing growth drivers over time, 1960 – 2020E

Minicomputers 10MM+ Units

PC 100MM+

Units

Desktop Internet

1B+ Units/ Users

Mobile Internet

10B+ Users???

Mainframes 1MM+ Units

More than Just phones

• Smartphone

• Kindle

• Tablet

• MP3

• Cell phone / PDA

• Car Electronics GPS,

ABS, A/V

• Mobile Video

• Home

entertainment

• Games

• Wireless home

appliances

April 2013

Public

Slide 14

Everyday objects get connected 17 June 2013

Public

Slide 15

GPS Fleet tracking

Cash registers

Wireless IP

camera Smart meters

New devices, new applications 17 June 2013

Public

Slide 16

Micromirrors for beamers

(TI)

Gyroscope

(UC Irvine)

Accelerometer

(IC Mechanics)

DNA analysis

(Affymetrix)

Lab on a Chip (LOC) for

counting red blood cells

Camera pill with

camera, transmitter

and computer

On-Chip DNA amplification and

detection (imec/Panasonic)

Wearable sensors

(Holst Centre)

Moore’s Law – how is it done?

July 2012

Public

Slide 17

ASML supports academic fundamental science Institute for Nanolithography at Science Park Amsterdam

ASML, FOM/NWO and UvA/VU

plan to set up the Institute for

Nanolithography (INL) at the

Science Park Amsterdam:

• 100 scientists and staff

• €100 mln / 10 yrs

• Conducting long-term,

fundamental research to

explore technology options

• Initial research program to focus

on EUV lithography

17 juni 2013

Public Slide 18

$ 6.5 B Semiconductor

Litho market in 2012

$8.2 B in 2011

$6.4 B in 2010

$297.6 B Semiconductor Chips

in 2012 $306.8 B in 2011, $301.5 B in 2010

$1,469 B Electronic Applications in 2012

$1,423 B in 2011, $1,343 B in 2010

Source: Gartner Q4/12 and ASML

Lithography enables affordable connected electronics,

improving quality of life and sustainability April 2013

Public

Slide 19

Lithography is critical for shrinking transistors 17 June 2013

Public

Slide 20

Like a photo enlarger of old,

lithography forms the image of

chip patterns on a wafer

The manufacturing loop

Exposure

Developing

Etching

Ion implantation Stripping

Deposition

Photoresist coating

17 June 2013

Public

Slide 21

Photolithography – how an ASML system works April 2013

Public

Slide 22

A chip has more than just one layer April 2013

Public

Slide 23

Making a transistor 17 June 2013

Public

Slide 24

Keeping up with Moore’s Law

PAS 2500

ASML’s first successful stepper, 1986

TWINSCAN NXT:1950i

The current industry workhorse

17 June 2013

Public

Slide 25

Keeping up with Moore’s Law

PAS 2500

ASML’s first successful stepper, 1986

TWINSCAN NXT:1950i

The current industry workhorse

Resolution:

900 nanometers

70 wafers per hour

(150mm wafers)

Overlay:

150 nanometers

17 June 2013

Public

Slide 26

Keeping up with Moore’s Law

PAS 2500

ASML’s first successful stepper, 1986

TWINSCAN NXT:1950i

The current industry workhorse

Resolution:

38 nanometers

230 wafers per hour

(300 mm wafers)

Overlay:

As little as 1 nanometer

17 June 2013

Public

Slide 27

Key innovation: Immersion lens

Lens

Air

Lens

Water

17 June 2013

Public

Slide 28

Key innovation: TWINSCAN 17 June 2013

Public

Slide 29

The future of lithography: EUV 17 June 2013

Public

Slide 30

Large vacuum

chamber

Mirror optics

New light

source

Firing a laser on a tin droplet 40,000 times a second 17 June 2013

Public

Slide 31

Laser-Produced Plasma (LPP) source

CO2 drive laser

Collector

Tin droplets

plasma

Mirrors: Polished to sub-nanometer accuracy 17 June 2013

Public

Slide 32

EUV mirrors are polished to an

accuracy of ~50 picometers – less

than the diameter of a silicon

atom.

Blown up to the size of the

Netherlands, the biggest

difference in height would be less

than a millimeter.

Maintaining a clean vacuum 17 June 2013

Public

Slide 33

We need to maintain a

clean vacuum, but every

time we expose a wafer,

the photoresist releases

trillions of particles

Trick:

10

100

Re

solu

tio

n /

hal

f pit

ch, "

Shri

nk"

[n

m]

6

2002 2004 2006 2008 2010 2012 2014 2016 2018 2020

Year of Production start *

Industry roadmap towards < 10 nm resolution Lithography roadmap supports continued shrink

DRAM 13.9%

* Note: Process development 1.5 ~ 2 years in advance

200

XT:1400

XT:1700i

AT:1200

XT:1900i

NXT:1950i

20

30

40

50 60

80

NXE:3100

NXE:3300B

NXT:1960Bi

Feb-2012

2

3 4

2

2

Single Exposure

2D LEn

Patterning

1D SADP

1D SAQP

n

NXT:1970Ci

Reso

luti

on

/ h

alf

pit

ch

, “S

hri

nk” [

nm

]

LE = Litho-Etch, n = number of iterations

SADP = Self Aligned Double Patterning

SAQP = Self Aligned Quadruple Patterning

NAND 17% Logic 14.1%

Public

Slide 34

The promise of larger wafers 17 June 2013

Public

Slide 35

200 mm 300 mm 450 mm

Larger wafers

generate cost

advantages for

chip makers:

• More effective

use of fab space

• Efficiency gains

in some

production steps

Main system changes for 450 mm wafers 17 June 2013

Public

Slide 36

Wafer

handler

Wafer stage

and metrology Wider body to

accommodate

larger wafer

stage

Longer exposure

time, tighter

overlay

requirement

Some challenges for innovation

17 June 2013

Public

Slide 37

Litho 28%

Etch 15%

CVD 10%

Wet Processing 8%

Resist Processing 6%

Inspection and Review 6%

Furnace 5%

PVD 4%

CMP 4%

Ion Implant 4%

CD Metrology 3%

Reticle Inspection 3%

ALD 2% RTP 1%

Dry Strip 1%

ECP (Copper Plating) 1%

Source: VLSI Research

Percentages add up to more than 100% due to rounding

Wafer Fab Equipment: a $31 billion market 17 June 2013

Confidential

We operate in a volatile industry

17 June 2013

Slide 39

Cyclicality is a

fact of life in

semiconductors.

There’s nothing we

can do about it –

we can only adapt.

We need a

measure of

flexibility from our

work force,

however we want

to be fair to our

employees and

retain knowledge

and talent.

Public

-60%

-40%

-20%

0%

20%

40%

60%

80%

100%

120%

140%

160% 1

98

5

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F

Yo

Y g

row

th

Bullwhip in The Electronics Food Chain - History & Forecast

Source: VLSI Research, WSTS, Gartner, IMF (Q1 ‘13)

▬▬ GDP

▬▬ Electronics revenue

▬▬ IC Revenu

▬▬ Semiconductor equipment

▬▬ Lithography revenue

Customer Co-Investment Program

- EUV Lithography as essential

enabler for Moore’s Law and

450 mm industry preparation to

deliver additional economic benefits

- Increasing complexity and huge

investments make risk sharing

amongst customers and suppliers

a necessity

Public

17 June 2013

Slide 40

Sharing the reward:

Equity participation € 3.85B

Sharing the risk:

Technology funding €1.38B

Samsung

TSMC

Intel

The future: “4 in 10” technology-oriented students needed

17 June 2013

Slide 41

Public

“4 in 10” target is reached only at

the highest secondary school

level (VWO) – even “5 in 10” in

Brainport

Brainport secondary school

students choose technical

profiles more often than Dutch

average (both HAVO and VWO)

Vocational schools (VMBO) do

not attract sufficient students for

technical streams, largely

because only 2% of girls choose

a technical profile

Source: Onderwijsmonitor Eindhoven 2012

% of pupils on a

technical profile

at vocational

school vmbo,

(Eindhoven and

Netherlands

2004-2011)

% of students on

a technical profile

in HAVO-5 and

VWO-6

(Eindhoven and

Netherlands)

vwo-6 Ehv.

vwo-6 Ned.

havo-5 Ehv.

havo-5 Ned.

Eindhoven

Nederland