EEEB273 N05- Diff Amp BJT x6.pdf

EEEB273 – Electronics Analysis & Design II

Lecturer: Dr Jamaludin Bin Omar 5-1

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Reference: Neamen, Chapter 11

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Learning OutcomeAble to: • Describe the mechanism by which a differential-mode

signal and common-mode signal are produced in a BJT diff-amp.

• Describe the dc transfer characteristics of a BJT diff-amp.

• Define common-mode rejection ratio.

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• Differential amplifier, also called diff-amp, is a fundamental building block of analog circuits.

• It is the input stage of virtually every op-amp, and is the basis of a high-speed emitter-coupled logic (ECL) circuit family.

• Matched/identical transistor characteristics are critical to the design of the IC diff-amp, which in general incorporates current-source biasing and active loads.

5.1) ��

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• Figure 11.1 shows a block diagram of the diff-amp. There are 2 input terminals and 1 output terminal.

• Ideally the output signal is proportional to only the difference between the two input signals.

vO=Ad(v1 - v2) (11.1)

In ideal case, if v1=v2 then the output is zero.

• Define the differential-mode input voltage asvd=v1 - v2 (11.2)

• Define the common-mode input voltage asvcm=(v1 + v2) / 2 (11.3)

5.1) ��

Fig 11.1: Diff-amp block diagram

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• If v1=v2 then vd=0 and vcm= v1 = v2

• If v1 = +10µV and v2 = -10µV then vd = 20µV and vcm= 0

• If v1 = 110µV and v2 = 90µV then vd = 20µV but vcm= 110µV

• If each pair of input voltages were applied to the ideal diff-amp, the output case would be exactly the same.

• However, amplifiers are not ideal, and the common-mode input signal does affect the output.

• One goal of the design of diff-amp is to minimize the effect of the common-mode input signal.

5.1) ��

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• Figure 11.2 shows the basic BJT differential-pair configuration.

5.2) ��

Fig 11.2: Basic BJT differential-pair configuration

• Two identical transistor Q1 and Q2, whose emitters are connected together, are biased by a constant current source IQ which is connected to a negative supply V_

• The collectors of Q1 and Q2 are connected through RC to a positive supply V+

• By design, Q1 and Q2 are to remain biased in the forward-active region. If input signal voltages at base are zero, Q1 and Q2 are still biased in forward-active region by the current source.



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5.3) ��

• Both base terminals are connected together and a common-mode voltage vcm is applied.

• Transistors are biased “on” by constant-current source, and voltage at common emitter is

vE = vcm - VBE(on)

• Current IQ splits evenly between the 2 transistors because Q1 and Q2are matched or identical

iE1 = iE2 = IQ / 2

Fig 11.3(a): Basic diff-amp with applied common-mode voltage

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5.3) ��

• When base currents are negligible,

iC1 � iE1

and iC2 � iE2,

and vC1 = V+ - (IQ/2)RC = vC2 (11.5)

• From (11.5) � for an applied common-mode voltage vcm, IQ splits evenly between Q1 and Q2 and the difference between vC1 and vC2 is 0,or vC1 - vC2 = 0

Fig 11.3(a): Basic diff-amp with applied common-mode voltage

5.4) ��

• Apply differential input voltage

vB1 = +vd/2 and vB2 = -vd/2

� The voltages at the bases of Q1 and Q2 are no longer equal.�The B-E voltages on Q1 and Q2 are no longer equal since emitters are common, where

vBE1 > vBE2

� iC1 increases by �I above its quiescent value and� iC2 decreases by �I below its quiescent value

Fig 11.3(b): Basic diff-amp with applied diff-mode voltage

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5.4) ��

• A potential difference now exists between the two collector terminals.

� A voltage difference is created between vC2 and vC1when a differential-mode input voltage is applied, given by:

CCCQ

CCQ

CC IRRII

VRII

Vvv ∆=∆+−−∆−−=− ++ 2])2

([])2

([12

{Example 11.1}

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5.5) ��

• Assume Q1 and Q2 are matched and operating at the same temperature (IS and VT are the same!):

Neglecting iB, [ ]

TBEBE

TBEBE

TBETBE

TBETBE

VvvQ

C

VvvQ

C

VvVvSCCQ

VvSC

VvSC

eIi

eIi

eeIiiI

eIieIi

/)(2

/)(1

//21

/2

/1

12

12

21

21

11

11

,

−−

−

+=

+=

+=+=

==

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5.5) ��

• From Fig 11.3(b):

Therefore: (11.12(a))

(11.12(b))

Equations (11.12(a)) and (11.12(b)) describe the basic current-voltage characteristics of the diff-amp.

Td

Td

VvQ

C

VvQ

C

dBEBE

e

Ii

e

Ii

vvv

/2

/1

21

1

1

+

−

+=

+=

≡−



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5.5) ��

� If the diff-mode input voltage is zero, then the current IQ splits evenly between iC1and iC2.

� When a diff-mode signal vd is applied, a difference occurs between iC1 and iC2, which in turn causes a change in the collector terminal voltage. This is the fundamental operation of the diff-amp.

� If a common-mode signal vCM = vB1 = vB2is applied, the bias current IQ still splits evenly between the two transistors.

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5.5) ��

• Fig 11.5 is the normalized plot of the dc transfer characteristics for the BJT diff-amp.• There are 2 basic observations from Fig 11.5:Figure 11.5

1) The gain of diff-amp is proportional to the slopes of transfer curves about the point vd = 0. For a linear amplifier � the excursion of vd about zero must be kept small.

2) As magnitude of vd becomes sufficiently large, essentially all of IQ goes to one transistor, and the other transistor effectively turns off.

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5.6) � ��

• Differential input signals:

v1 = +vd/2 and v2 = -vd/2

• Forward-transconductance:

where (IQ/2) is quiescent collector current in Q1 and Q2

and gm is individual transistor transconductance

Fig 11.7: BJT diff-amp with differential-mode input signal

mT

Q

T

Qf g

V

I

V

Ig

212/

21

4===

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5.6) � ��

• Magnitude of small-signal collector current in each transistor is then (gmvd)/2

• Linear approximations for the collector currents:

Fig 11.7: BJT diff-amp with differential-mode input signal

22

22

2

1

dm

QC

dm

QC

vg

Ii

vg

Ii

−=

+=

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5.6) � ��

• Define Two-sided output voltage as

vO = vC2 – vC1 (11.16)

• Two-sided output voltage is defined as the difference between two collector voltages, as given by Equation (11.16) above.

• The output voltage can be written as

or

[ ] [ ]

dCmCdmQdmQ

O

CCCCCCCO

vRgRvgIvgI

v

RiiRiVRiVv

=��

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��

�

�−−��

�

�

�+=

−=−−−= ++

2222

)( 2112

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5.7) !" �#��

Fig 11.8: Equivalent ac circuit of diff-amp with differential-mode input signal and

(a) Two-sided output voltage, and(b) One-sided output voltage



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5.7) !" �#��

• Assume an ideal current source � RO is infinite.

• For Figure 11.8(a):

Two-sided output voltage, vo is

Differential-mode gain, Ad is

dCmCdm

Cdm

cco vRgRvg

Rvg

vvv =��

�

� −−��

�

�=−=2212

T

CQCm

d

od V

RIRg

vv

A2

===

�

5.7) !" �#��

• One-sided output voltage is defined as the voltage at any collector terminal with respect to ground, as shown in Figure 11.8(b).

If the output to be vc2, the one-sided output voltage, vo is

Differential gain, Ad is

(11.21)

Cdm

o Rvg

v ��

�

�=2

T

CQCm

d

Od V

RIRgvv

A42

===

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5.8) Small-signal Equivalent Circuit Analysis

• Assuming the operation in the linear range� Can also derive the gain and other characteristics of the diff-amp, using the small-signal equivalent circuit.

Fig 11.9: Small-signal equivalent circuit, bipolar differential amplifier

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5.8) Small-signal Equivalent Circuit Analysis (Cont)

• Assume that Early voltage is infinite (VA = �), and non-ideal constant-current source is represented by a finite output impedance (Ro � �)

• RB represents the output resistance of the signal voltage source.

• Since two transistors are biased at the same quiescent current:

then

and mmm ggg

rrr

≡=≡=

21

21 πππ

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• KCL equation at node Ve

or

where β

ββ

π

ππ

ππ

π

πππ

π

π

=

=��

�

� ++��

�

� +

=+++

rg

RV

rV

rV

RV

rV

VgVgr

V

m

o

e

o

emm

1121

221

1

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• From the circuit

and

Then

Solving for Ve, (11.24)

( )

( ) o

B

bbe

o

e

Bebb

B

eb

B

eb

RRr

VVV

RV

RrVVV

RrVV

rV

RrVV

rV

β

β

π

π

ππ

π

ππ

π

+++

+=

=��

�

�

++−+

+−=

+−=

12

12

21

21

22

11



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• For a one-sided output at collector of Q2, then

(11.25)

Substitute (11.24) into (11.25) and rearrange

(11.26)

( ) ( )

( )

( )

�

�

�

�

�

�

+++

−��

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�

+++

−=

+−−=−==

o

B

bo

Bb

cmo

B

ebCCmco

RRr

VR

RrV

RgV

RrVVR

RVgVV

β

β

β

π

π

ππ

12

11 12

222

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• In an ideal constant-current source, output resistance Ro = �, and Equation (11.26) reduces to

(11.27)

Diff-mode input is

Diff-mode gain is (11.28)

which for RB = 0 is identical to Equation (11.21), that was developed from voltage transfer characteristics.

( )( )

( )B

c

d

od

bbd

B

bbco

RrR

VV

A

VVV

RrVVR

V

+==

−=+

−−=

π

π

β

β

2

2

21

12

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• From Equations (11.2) and (11.3), Vb1 and Vb2 can be expressed as

(11.29(a))

and (11.29(b))

� For a linear amplifier, superposition applies. Equations (11.29(a)) and (11.29(b)) then simply state that the two input signals can be written as the sum of a differential-mode input signal component and a common-mode input signal component.

2

2

2

1

dcmb

dcmb

VVV

VVV

−=

+=

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• Substituting (11.29(a)) and (11.29(b)) into (11.26) and rearranging terms result in the following:

• The output voltage in general form (superposition)

where Ad is the differential-mode gainand Acm is the common-mode gain

( ) ( )

cmcmddo

cm

B

o

Cmd

B

Co

VAVAV

V

RrR

RgV

RrR

V

+=

+++

−+

= .12

1.

2π

π ββ

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• Therefore,

� Differential-mode gain is

�Common-mode gain is

For an ideal current source, RO = � so Acm = 0.

But if RO is finite, Acm � 0 and differential amplifier (one-sided output) is not ideal.

( )

( )B

o

Cmcm

B

Cd

RrR

RgA

RrR

A

+++

−=

+=

π

π

β

β

121

2

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5.9.1) Differential-mode Signals

5.9) Differential- and Common-mode Gains

• Reconsider the differential-amplifier when pure differential-mode signal is applied.

Fig 11.13: (a) Equivalent ac circuit of diff-amp with applied sinusoidal diff-mode input signal, and resulting signal current directions and (b) differential-mode half-circuits



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5.9.1) Differential-mode Signals (Cont)

5.9) Differential- and Common-mode Gains (Cont)

• For pure differential-mode signal applied:

� Two sinusoidal input signals vb1 and vb2 are 180�out of phase. � Therefore, vb1 + vb2 = 0. � From (11.24), ve remain at signal ground.�Can treat each half of the differential-amp as a common-emitter circuit, as shown in Fig 11.13(b)

When analyzing the differential-mode diff-amp characteristics using the half-circuit small-signal parameters, remember that the half-circuit is biased at IQ /2.

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5.9.2) Common-mode Signals


• Reconsider the differential-amplifier when pure common-mode signal is applied.

Fig 11.14: (a) Equivalent ac circuit of diff-amp with common-mode input signal, and resulting signal current directions and (b) common-mode half-circuits

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5.9.2) Common-mode Signals (Cont)


• For pure common-mode signal applied:

� Two sinusoidal input signals vb1 and vb2 are in phase. � Current source is represented as an ideal current source IQ in parallel with its output resistance RO� Current iq = time-varying component of current source.�Can treat each half of the differential-amp as a common-emitter configuration with an emitter resistor, as shown in Fig 11.14(b)

Each half-circuit is biased at IQ /2.��

5.10) �� $�%��$��

• Common-mode rejection ratio (CMRR) is the ability of a diff-amp to reject a common-mode signal.

• CMRR is a figure-of-merit for diff-amp, defined as

• Usually, CMRR is expressed in decibels, as follows:

• For an ideal diff-amp, Acm = 0 and CMRR = �

cm

ddB

cm

d

AA

CMRR

AA

CMRR

10log20=

=

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5.10) �� $�%��$�� (Cont)

• For basic BJT diff-pair, the CMRR can be expressed as

• Common-mode gain decreases as Ro increases.

• Therefore, CMRR increases as Ro increases.

( )��

��

� ++==

ββ

T

oQ

cm

d

V

RI

AA

CMRR1

121

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5.11) Differential- and Common-Mode Input Impedances

• The input resistance determines the loading effect of the circuit on the signal source.

• Two input resistances for the diff-amp:

1) The differential-mode input resistance� the resistance seen by a differential-mode signal source

1) The common-mode input resistance � the resistance seen by a common-mode signal source



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5.11.1) Differential-Mode Input Resistance, DMIR

5.11) Differential- and Common-Mode Input Impedances (Cont)

• The DMIR is the effective resistance between the two input base terminals when a diff-mode signal is applied.• The applicable diff-mode half-circuits are shown in Figure 11.12(b). For this circuit

Therefore,

Fig 11.15: BJT diff amp with diff-mode input signal, showing diff input resistance (Rid)

π

π

riv

R

ri

v

b

did

b

d

2

2/

==

=

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5.11.1) Differential-Mode Input Resistance (Cont)


• Another common diff-amp configuration uses emitter resistors, as in Figure 11.16.• Using the resistance reflection rule to find Rid, then

� Rid increases significantly when emitter resistors are included.

Fig 11.16: BJT diff amp with emitter resistors

( )

( )[ ]Eb

did

Eb

d

Rriv

R

Rri

v

β

β

π

π

++==

++=

12

12/

�

5.11.2) Common-Mode Input Resistance


Fig 11.17: (a) BJT diff amp with common-mode input signal, including finite current source resistance and (b) equivalent common-mode half-circuit �

5.11.2) Common-Mode Input Resistance (Cont)


• Since the half-circuits are in parallel, then

• This is a first approximation for determining Ricm

• Normally, Ro is large, and Ricm is typically in the megaOhm range. Therefore, transistor output resistance ro and the base-collector resistance rµmay need to be included in calculation.

( )( ) ( )( )ooicm RRrR 21212 ββπ +≅++=

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5.11.2) Common-Mode Input Resistance (Cont)


• Fig 11.17(b) shows the more complete equivalent half-circuit model. For this model,

•Therefore,

( )( )[ ] ( ) ��

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�

�++��

�

�=

211

2o

oicm

rR

rR ββµ

( )( )[ ] ( )[ ]ooicm rRrR ββµ ++= 1||21||2

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EEEB273 N05- Diff Amp BJT x6.pdf