CMOS Processing

7/29/2019 CMOS Processing

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VLSI Design IIVLSI Design IIVLSI Design IIVLSI Design II

CMOS ProcessingCMOS ProcessingCMOS ProcessingCMOS Processing

OverviewOverviewOverviewOverview

Processing stepsProcessing stepsProcessing stepsProcessing steps processing step sequenceprocessing step sequenceprocessing step sequenceprocessing step sequence

Goal:Goal:Goal:Goal: You know the basics of integrated circuitYou know the basics of integrated circuitYou know the basics of integrated circuitYou know the basics of integrated circuitprocessing steps and you are familiar with theprocessing steps and you are familiar with theprocessing steps and you are familiar with theprocessing steps and you are familiar with theprocessing sequence of a sample CMOS technology.processing sequence of a sample CMOS technology.processing sequence of a sample CMOS technology.processing sequence of a sample CMOS technology.


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IntroductionIntroductionIntroductionIntroduction Complementary MOS (CMOS) technology isComplementary MOS (CMOS) technology isComplementary MOS (CMOS) technology isComplementary MOS (CMOS) technology is

becoming the dominant candidate for VLSIbecoming the dominant candidate for VLSIbecoming the dominant candidate for VLSIbecoming the dominant candidate for VLSIapplicationsapplicationsapplicationsapplications

CMOS provides both nCMOS provides both nCMOS provides both nCMOS provides both n----channel and pchannel and pchannel and pchannel and p----channel MOSchannel MOSchannel MOSchannel MOStransistors on one chiptransistors on one chiptransistors on one chiptransistors on one chip

on extremely expensiveon extremely expensiveon extremely expensiveon extremely expensive fabsfabsfabsfabs cheap chips arecheap chips arecheap chips arecheap chips areproducedproducedproducedproduced

each chip passes hundreds of different processingeach chip passes hundreds of different processingeach chip passes hundreds of different processingeach chip passes hundreds of different processingstepsstepsstepssteps

random process disturbances cause electricalrandom process disturbances cause electricalrandom process disturbances cause electricalrandom process disturbances cause electricalparameter variations of the chipsparameter variations of the chipsparameter variations of the chipsparameter variations of the chips

elements are never identicalelements are never identicalelements are never identicalelements are never identical

Process technology pictures and text are copied from:Process technology pictures and text are copied from:Process technology pictures and text are copied from:Process technology pictures and text are copied from:Atlas of IC Technologies, W.Atlas of IC Technologies, W.Atlas of IC Technologies, W.Atlas of IC Technologies, W. MalyMalyMalyMaly, The Benjamin Cummings, The Benjamin Cummings, The Benjamin Cummings, The Benjamin Cummings

Publishing Company, ISBN 0Publishing Company, ISBN 0Publishing Company, ISBN 0Publishing Company, ISBN 0----8053805380538053----6850685068506850----7777


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VLSI Circuit FabricationVLSI Circuit FabricationVLSI Circuit FabricationVLSI Circuit Fabrication

depositdepositdepositdeposit thin layers of materialthin layers of materialthin layers of materialthin layers of materialandandandand etchetchetchetch into desired patterninto desired patterninto desired patterninto desired pattern

n+n+n+n+ n+n+n+n+

pppp

oxidizeoxidizeoxidizeoxidize silicon to formsilicon to formsilicon to formsilicon to formthin and thick layers ofthin and thick layers ofthin and thick layers ofthin and thick layers ofSiOSiOSiOSiO2222 to serve asto serve asto serve asto serve asinsulators.insulators.insulators.insulators.

diffusediffusediffusediffuse dopants intodopants intodopants intodopants intosubstrate to createsubstrate to createsubstrate to createsubstrate to createP/N junctionsP/N junctionsP/N junctionsP/N junctions

implantimplantimplantimplant ions to setions to setions to setions to setthresholds and achievethresholds and achievethresholds and achievethresholds and achieveprecise dopant profilesprecise dopant profilesprecise dopant profilesprecise dopant profiles

Most fabrication steps require first creating aMost fabrication steps require first creating aMost fabrication steps require first creating aMost fabrication steps require first creating a maskmaskmaskmask that determinesthat determinesthat determinesthat determineswhere the operation will occur. Masks can either be existing lawhere the operation will occur. Masks can either be existing lawhere the operation will occur. Masks can either be existing lawhere the operation will occur. Masks can either be existing layers onyers onyers onyers on

the IC (these masks are selfthe IC (these masks are selfthe IC (these masks are selfthe IC (these masks are self----aligned) or created using a lithographicaligned) or created using a lithographicaligned) or created using a lithographicaligned) or created using a lithographicprocess andprocess andprocess andprocess and photoresistphotoresistphotoresistphotoresist....

Design rulesDesign rulesDesign rulesDesign rules ensure that design is still functional in the face ofensure that design is still functional in the face ofensure that design is still functional in the face ofensure that design is still functional in the face ofmisalignments and various sidemisalignments and various sidemisalignments and various sidemisalignments and various side----effects of the fabrication process.effects of the fabrication process.effects of the fabrication process.effects of the fabrication process.


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OverviewOverviewOverviewOverview

Overview of Processing StepsOverview of Processing StepsOverview of Processing StepsOverview of Processing Steps

making the wafersmaking the wafersmaking the wafersmaking the wafers

photolithographyphotolithographyphotolithographyphotolithography oxidationoxidationoxidationoxidation

layer depositionlayer depositionlayer depositionlayer deposition

etchingetchingetchingetching

diffusiondiffusiondiffusiondiffusion

implantationimplantationimplantationimplantation

nnnn----wellwellwellwell

activeactiveactiveactive

polypolypolypoly

nnnn----diffusiondiffusiondiffusiondiffusion

pppp----diffusiondiffusiondiffusiondiffusioncontactscontactscontactscontacts

metal1metal1metal1metal1

via1via1via1via1

metal2metal2metal2metal2

passivationpassivationpassivationpassivation

Overview ofOverview ofOverview ofOverview of ProcessingProcessingProcessingProcessing Step SequenceStep SequenceStep SequenceStep Sequence


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Processing Steps:Processing Steps:Processing Steps:Processing Steps:

Making the wafersMaking the wafersMaking the wafersMaking the wafers

the basic raw material used is a wafer or disk ofthe basic raw material used is a wafer or disk ofthe basic raw material used is a wafer or disk ofthe basic raw material used is a wafer or disk ofsilicon which varies from 3 to 12 in diametersilicon which varies from 3 to 12 in diametersilicon which varies from 3 to 12 in diametersilicon which varies from 3 to 12 in diameter

wafers are cut in thin slices (less than 1mm) ofwafers are cut in thin slices (less than 1mm) ofwafers are cut in thin slices (less than 1mm) ofwafers are cut in thin slices (less than 1mm) ofsemiconductor cylindrical ingotssemiconductor cylindrical ingotssemiconductor cylindrical ingotssemiconductor cylindrical ingots

first step in IC processing is the production of afirst step in IC processing is the production of afirst step in IC processing is the production of afirst step in IC processing is the production of asinglesinglesinglesingle----crystal ingot starting from a silicon meltcrystal ingot starting from a silicon meltcrystal ingot starting from a silicon meltcrystal ingot starting from a silicon meltwith a controlled amount of impuritieswith a controlled amount of impuritieswith a controlled amount of impuritieswith a controlled amount of impurities


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Photolithography #1Photolithography #1Photolithography #1Photolithography #1

Complementary Photolithography is a techniqueComplementary Photolithography is a techniqueComplementary Photolithography is a techniqueComplementary Photolithography is a techniqueused in IC fabrication to transfer a desired patternused in IC fabrication to transfer a desired patternused in IC fabrication to transfer a desired patternused in IC fabrication to transfer a desired patternonto the surface of a silicon wafer. As such theonto the surface of a silicon wafer. As such theonto the surface of a silicon wafer. As such theonto the surface of a silicon wafer. As such thephotolithography is a key step in the entire circuitphotolithography is a key step in the entire circuitphotolithography is a key step in the entire circuitphotolithography is a key step in the entire circuitintegration process.integration process.integration process.integration process.

alternative method for lower quantities: direct writealternative method for lower quantities: direct writealternative method for lower quantities: direct writealternative method for lower quantities: direct writeprocedure (Eprocedure (Eprocedure (Eprocedure (E----beam)beam)beam)beam)


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Processing Step:Processing Step:Processing Step:Processing Step:Photolithography #2Photolithography #2Photolithography #2Photolithography #2


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Oxidation #1Oxidation #1Oxidation #1Oxidation #1Thermal oxidation is a process in which silicon (Thermal oxidation is a process in which silicon (Thermal oxidation is a process in which silicon (Thermal oxidation is a process in which silicon (SiSiSiSi))))reacts with oxygen to form a continuous layer ofreacts with oxygen to form a continuous layer ofreacts with oxygen to form a continuous layer ofreacts with oxygen to form a continuous layer ofhighhighhighhigh----quality silicon dioxide (SiOquality silicon dioxide (SiOquality silicon dioxide (SiOquality silicon dioxide (SiO2222))))

oxidation of the silicon surfaceoxidation of the silicon surfaceoxidation of the silicon surfaceoxidation of the silicon surface

oxidation through a window in the oxideoxidation through a window in the oxideoxidation through a window in the oxideoxidation through a window in the oxide

selective oxide growthselective oxide growthselective oxide growthselective oxide growth

oxidation of the silicon surfaceoxidation of the silicon surfaceoxidation of the silicon surfaceoxidation of the silicon surface


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Oxidation #2Oxidation #2Oxidation #2Oxidation #2

oxidation throughoxidation throughoxidation throughoxidation througha windowa windowa windowa window

selectiveselectiveselectiveselectiveoxide growthoxide growthoxide growthoxide growth

birds bikebirds bikebirds bikebirds bike


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Processing Steps:Processing Steps:Processing Steps:Processing Steps:Layer DepositionLayer DepositionLayer DepositionLayer Deposition ---- GeneralGeneralGeneralGeneral

Thin layers of both conduction substances andThin layers of both conduction substances andThin layers of both conduction substances andThin layers of both conduction substances andinsulation materials constitute an important part ofinsulation materials constitute an important part ofinsulation materials constitute an important part ofinsulation materials constitute an important part ofany semiconductor device.any semiconductor device.any semiconductor device.any semiconductor device.

epitaxyepitaxyepitaxyepitaxy (single crystal deposition)(single crystal deposition)(single crystal deposition)(single crystal deposition)

PVD and CVD process (polycrystalline deposition)PVD and CVD process (polycrystalline deposition)PVD and CVD process (polycrystalline deposition)PVD and CVD process (polycrystalline deposition)


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Vapour DepositionVapour DepositionVapour DepositionVapour Deposition

PVDPVDPVDPVD

CVDCVDCVDCVD


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Processing Steps: EtchingProcessing Steps: EtchingProcessing Steps: EtchingProcessing Steps: Etching

The process that immediately follows theThe process that immediately follows theThe process that immediately follows theThe process that immediately follows thephotolithography step is the removal of materialphotolithography step is the removal of materialphotolithography step is the removal of materialphotolithography step is the removal of materialfrom areas of the wafer unprotected byfrom areas of the wafer unprotected byfrom areas of the wafer unprotected byfrom areas of the wafer unprotected by photoresistphotoresistphotoresistphotoresist....Characterization by selectivity and anisotropy.Characterization by selectivity and anisotropy.Characterization by selectivity and anisotropy.Characterization by selectivity and anisotropy.

wet etchingwet etchingwet etchingwet etching

dry etchingdry etchingdry etchingdry etching


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DiffusionDiffusionDiffusionDiffusionSolid state diffusion is a process which allowsSolid state diffusion is a process which allowsSolid state diffusion is a process which allowsSolid state diffusion is a process which allowsatoms to move within a solid at elevatedatoms to move within a solid at elevatedatoms to move within a solid at elevatedatoms to move within a solid at elevatedtemperatures.temperatures.temperatures.temperatures.


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ImplantationImplantationImplantationImplantationThe alternative to the diffusion technique of dopantThe alternative to the diffusion technique of dopantThe alternative to the diffusion technique of dopantThe alternative to the diffusion technique of dopantintroduction used in IC manufacturing is ionintroduction used in IC manufacturing is ionintroduction used in IC manufacturing is ionintroduction used in IC manufacturing is ionimplantation.implantation.implantation.implantation.


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NNNN----Well Implant & DriveWell Implant & DriveWell Implant & DriveWell Implant & Drive----inininin

In p substrate only nIn p substrate only nIn p substrate only nIn p substrate only n----channelchannelchannelchannel fetsfetsfetsfets can be processed.can be processed.can be processed.can be processed.Therefore an nTherefore an nTherefore an nTherefore an n----well has to be implanted in order to holdwell has to be implanted in order to holdwell has to be implanted in order to holdwell has to be implanted in order to holdthe pthe pthe pthe p----channelchannelchannelchannel fetsfetsfetsfets....

Window in the mask and cross section illustrated.Window in the mask and cross section illustrated.Window in the mask and cross section illustrated.Window in the mask and cross section illustrated.


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ChannelChannelChannelChannel----stop Implantstop Implantstop Implantstop Implant

A thick (0.4um) layer of silicon dioxide, calledA thick (0.4um) layer of silicon dioxide, calledA thick (0.4um) layer of silicon dioxide, calledA thick (0.4um) layer of silicon dioxide, called fieldfieldfieldfieldoxideoxideoxideoxide, is formed on the surface by oxidation in wet, is formed on the surface by oxidation in wet, is formed on the surface by oxidation in wet, is formed on the surface by oxidation in wetoxygen. This is then etched to expose surface where weoxygen. This is then etched to expose surface where weoxygen. This is then etched to expose surface where weoxygen. This is then etched to expose surface where wewant to makewant to makewant to makewant to make fetsfetsfetsfets....


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Grow Field OxideGrow Field OxideGrow Field OxideGrow Field Oxide

Formation of active regions for nFormation of active regions for nFormation of active regions for nFormation of active regions for n----channel and pchannel and pchannel and pchannel and p----channelchannelchannelchannelfetsfetsfetsfets of the CMOS process. The obtained birds beakof the CMOS process. The obtained birds beakof the CMOS process. The obtained birds beakof the CMOS process. The obtained birds beakcauses the active area of the device to be significantlycauses the active area of the device to be significantlycauses the active area of the device to be significantlycauses the active area of the device to be significantlysmaller.smaller.smaller.smaller.


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Grow Thin OxideGrow Thin OxideGrow Thin OxideGrow Thin Oxide

Now grow a thin (0.01um = 100 Angstroms) layer ofNow grow a thin (0.01um = 100 Angstroms) layer ofNow grow a thin (0.01um = 100 Angstroms) layer ofNow grow a thin (0.01um = 100 Angstroms) layer ofsilicon dioxide, called gate oxide, on the surface bysilicon dioxide, called gate oxide, on the surface bysilicon dioxide, called gate oxide, on the surface bysilicon dioxide, called gate oxide, on the surface byexposing the wafer to dry oxygen.exposing the wafer to dry oxygen.exposing the wafer to dry oxygen.exposing the wafer to dry oxygen.

The gate oxide needs to be of high quality: uniformThe gate oxide needs to be of high quality: uniformThe gate oxide needs to be of high quality: uniformThe gate oxide needs to be of high quality: uniformthickness, no defects! The thinner the gate oxide, thethickness, no defects! The thinner the gate oxide, thethickness, no defects! The thinner the gate oxide, thethickness, no defects! The thinner the gate oxide, themore oomph themore oomph themore oomph themore oomph the fetfetfetfet will have (well see why soon) but thewill have (well see why soon) but thewill have (well see why soon) but thewill have (well see why soon) but theharder it is to make it defect free.harder it is to make it defect free.harder it is to make it defect free.harder it is to make it defect free.


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Deposit & EtchDeposit & EtchDeposit & EtchDeposit & Etch PolysiliconPolysiliconPolysiliconPolysilicon

On top of the thin oxide a 0.7um thick layer ofOn top of the thin oxide a 0.7um thick layer ofOn top of the thin oxide a 0.7um thick layer ofOn top of the thin oxide a 0.7um thick layer ofpolycrystalline silicon, calledpolycrystalline silicon, calledpolycrystalline silicon, calledpolycrystalline silicon, called polysiliconpolysiliconpolysiliconpolysiliconorororor polypolypolypolyforforforforshort, is deposited by CVD. The poly layer is patternedshort, is deposited by CVD. The poly layer is patternedshort, is deposited by CVD. The poly layer is patternedshort, is deposited by CVD. The poly layer is patterned

and plasma etched (thin ox not covered by poly is etchedand plasma etched (thin ox not covered by poly is etchedand plasma etched (thin ox not covered by poly is etchedand plasma etched (thin ox not covered by poly is etchedaway too!) exposing the surface where the source andaway too!) exposing the surface where the source andaway too!) exposing the surface where the source andaway too!) exposing the surface where the source anddrain junctions will be formed:drain junctions will be formed:drain junctions will be formed:drain junctions will be formed:


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ImplantImplantImplantImplant NfetNfetNfetNfet Drain & SourceDrain & SourceDrain & SourceDrain & Source

The entire surface is doped, either by diffusion or ionThe entire surface is doped, either by diffusion or ionThe entire surface is doped, either by diffusion or ionThe entire surface is doped, either by diffusion or ionimplantation, with phosphorus (an electronimplantation, with phosphorus (an electronimplantation, with phosphorus (an electronimplantation, with phosphorus (an electron donordonordonordonor) which) which) which) whichcreates two ncreates two ncreates two ncreates two n----type regions in the substrate and antype regions in the substrate and antype regions in the substrate and antype regions in the substrate and an ohmicohmicohmicohmic

contact in the ncontact in the ncontact in the ncontact in the n----well. The phosphorus also penetrates thewell. The phosphorus also penetrates thewell. The phosphorus also penetrates thewell. The phosphorus also penetrates thepoly reducing its resistance and affecting thepoly reducing its resistance and affecting thepoly reducing its resistance and affecting thepoly reducing its resistance and affecting the nfetsnfetsnfetsnfetsthreshold.threshold.threshold.threshold.


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EffectiveEffectiveEffectiveEffective NfetNfetNfetNfet DimensionsDimensionsDimensionsDimensions


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ParasiticParasiticParasiticParasitic FetsFetsFetsFets


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ImplantImplantImplantImplant PfetPfetPfetPfet Drain & SourceDrain & SourceDrain & SourceDrain & Source

Once again the entire surface is doped, either by diffusionOnce again the entire surface is doped, either by diffusionOnce again the entire surface is doped, either by diffusionOnce again the entire surface is doped, either by diffusionor ion implantation, with boron (an electronor ion implantation, with boron (an electronor ion implantation, with boron (an electronor ion implantation, with boron (an electron acceptoracceptoracceptoracceptor))))which creates two pwhich creates two pwhich creates two pwhich creates two p----type regions in the ntype regions in the ntype regions in the ntype regions in the n----well and anwell and anwell and anwell and an

ohmicohmicohmicohmic contact in the substrate.contact in the substrate.contact in the substrate.contact in the substrate.


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Deposit SiODeposit SiODeposit SiODeposit SiO2222 insulatorinsulatorinsulatorinsulator

Finally an intermediate oxide layer is grown for isolation andFinally an intermediate oxide layer is grown for isolation andFinally an intermediate oxide layer is grown for isolation andFinally an intermediate oxide layer is grown for isolation andthenthenthenthen reflowedreflowedreflowedreflowed totototo flattenflattenflattenflatten its surface.its surface.its surface.its surface.


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Etch contact cutsEtch contact cutsEtch contact cutsEtch contact cuts

Holes are etched in the oxide where contacts to poly/diffHoles are etched in the oxide where contacts to poly/diffHoles are etched in the oxide where contacts to poly/diffHoles are etched in the oxide where contacts to poly/diffare wanted.are wanted.are wanted.are wanted.


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Deposit & Etch Metal1Deposit & Etch Metal1Deposit & Etch Metal1Deposit & Etch Metal1

For interconnections aluminium is deposited, patterned andFor interconnections aluminium is deposited, patterned andFor interconnections aluminium is deposited, patterned andFor interconnections aluminium is deposited, patterned andetched.etched.etched.etched.


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Voila: a CMOS Inverter!Voila: a CMOS Inverter!Voila: a CMOS Inverter!Voila: a CMOS Inverter!

Finally aFinally aFinally aFinally a passivationpassivationpassivationpassivation layer protects the wafer surface fromlayer protects the wafer surface fromlayer protects the wafer surface fromlayer protects the wafer surface fromcontamination and scratches. Pads are opened for bonding.contamination and scratches. Pads are opened for bonding.contamination and scratches. Pads are opened for bonding.contamination and scratches. Pads are opened for bonding.


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PlanarizePlanarizePlanarizePlanarize


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Deposit & Etch Metal2Deposit & Etch Metal2Deposit & Etch Metal2Deposit & Etch Metal2


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NNNN----well, Doublewell, Doublewell, Doublewell, Double----level Metal CMOSlevel Metal CMOSlevel Metal CMOSlevel Metal CMOS

Process StepsProcess StepsProcess StepsProcess Steps1. Grow barrier oxide1. Grow barrier oxide1. Grow barrier oxide1. Grow barrier oxide2.2.2.2. MaskMaskMaskMask/Etch n/Etch n/Etch n/Etch n----well windowwell windowwell windowwell window3.3.3.3. PPPPnnnn----well implantwell implantwell implantwell implant4. Thermal drive4. Thermal drive4. Thermal drive4. Thermal drive----in to deepen nin to deepen nin to deepen nin to deepen n----wellwellwellwell

5. Remove barrier oxide5. Remove barrier oxide5. Remove barrier oxide5. Remove barrier oxide6. Grow pad oxide6. Grow pad oxide6. Grow pad oxide6. Grow pad oxide7. Deposit Si7. Deposit Si7. Deposit Si7. Deposit Si3333NNNN44448.8.8.8. MaskMaskMaskMask/Etch leaving active region/Etch leaving active region/Etch leaving active region/Etch leaving active region9.9.9.9. BBBBchannelchannelchannelchannel----stop implantstop implantstop implantstop implant10. Grow field oxide (more drive10. Grow field oxide (more drive10. Grow field oxide (more drive10. Grow field oxide (more drive----in!)in!)in!)in!)11. Remove Si11. Remove Si11. Remove Si11. Remove Si3333NNNN4444

12. Remove pad oxide12. Remove pad oxide12. Remove pad oxide12. Remove pad oxide13.13.13.13. BBBBorororor PPPPimplant to adjust Vimplant to adjust Vimplant to adjust Vimplant to adjust VTHTHTHTH14. Grow thin (gate) oxide14. Grow thin (gate) oxide14. Grow thin (gate) oxide14. Grow thin (gate) oxide15. Deposit15. Deposit15. Deposit15. Deposit PPPP----doped polysilicondoped polysilicondoped polysilicondoped polysilicon16.16.16.16. MaskMaskMaskMask/Etch leaving poly wires/Etch leaving poly wires/Etch leaving poly wires/Etch leaving poly wires17. Etch exposed thin oxide17. Etch exposed thin oxide17. Etch exposed thin oxide17. Etch exposed thin oxide18.18.18.18. MaskMaskMaskMask off poff poff poff p----diffusion regionsdiffusion regionsdiffusion regionsdiffusion regions

19.19.19.19. SbSbSbSborororor AsAsAsAsnfetnfetnfetnfet source/drainsource/drainsource/drainsource/drainimplant, nimplant, nimplant, nimplant, n----well contact toowell contact toowell contact toowell contact too

20. Mask all but p20. Mask all but p20. Mask all but p20. Mask all but p----diffusion regionsdiffusion regionsdiffusion regionsdiffusion regions21.21.21.21. BBBBpfetpfetpfetpfet source/drain implantsource/drain implantsource/drain implantsource/drain implant22. Thermal source/drain annealing22. Thermal source/drain annealing22. Thermal source/drain annealing22. Thermal source/drain annealing

23. Deposit23. Deposit23. Deposit23. Deposit SiOSiOSiOSiO2222using CVDusing CVDusing CVDusing CVD24.24.24.24. Mask/Mask/Mask/Mask/Etch contactsEtch contactsEtch contactsEtch contacts

throughthroughthroughthrough SiOSiOSiOSiO222225. Deposit first25. Deposit first25. Deposit first25. Deposit first AlAlAlAlusing PVDusing PVDusing PVDusing PVD

26.26.26.26. MaskMaskMaskMask/Etch leaving metal1/Etch leaving metal1/Etch leaving metal1/Etch leaving metal1wireswireswireswires

27. Grow thick layer of27. Grow thick layer of27. Grow thick layer of27. Grow thick layer ofSiOSiOSiOSiO222228. Spin on thick, flat layer of28. Spin on thick, flat layer of28. Spin on thick, flat layer of28. Spin on thick, flat layer of

photoresistphotoresistphotoresistphotoresist29. Etch29. Etch29. Etch29. Etch SiOSiOSiOSiO2222andandandand photoresistphotoresistphotoresistphotoresist

at same rate until only flatat same rate until only flatat same rate until only flatat same rate until only flat

SiOSiOSiOSiO2222 remainsremainsremainsremains30.30.30.30. MaskMaskMaskMask/Etch/Etch/Etch/Etch viasviasviasvias throughthroughthroughthrough SiOSiOSiOSiO222231. Deposit second using PVD31. Deposit second using PVD31. Deposit second using PVD31. Deposit second using PVD32.32.32.32. MaskMaskMaskMask/Etch leaving metal2/Etch leaving metal2/Etch leaving metal2/Etch leaving metal2

wireswireswireswires33. Deposit33. Deposit33. Deposit33. Deposit overglassoverglassoverglassoverglass totototo

passivatepassivatepassivatepassivate circuitcircuitcircuitcircuit

34.34.34.34. MaskMaskMaskMask/Etch pad windows/Etch pad windows/Etch pad windows/Etch pad windows


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Coming Up...Coming Up...Coming Up...Coming Up...

Next time:Next time:Next time:Next time:

Mask layout: design rules, layout examples,Mask layout: design rules, layout examples,Mask layout: design rules, layout examples,Mask layout: design rules, layout examples,structured and symbolic layout techniques,structured and symbolic layout techniques,structured and symbolic layout techniques,structured and symbolic layout techniques,retargetableretargetableretargetableretargetable layouts. CAD tools for layout: designlayouts. CAD tools for layout: designlayouts. CAD tools for layout: designlayouts. CAD tools for layout: designcapture, design rule checking, extraction, networkcapture, design rule checking, extraction, networkcapture, design rule checking, extraction, networkcapture, design rule checking, extraction, networkcomparison.comparison.comparison.comparison.

Readings for next timeReadings for next timeReadings for next timeReadings for next time

WestWestWestWesteeee::::

Chapter 3 thru 3.2.3Chapter 3 thru 3.2.3Chapter 3 thru 3.2.3Chapter 3 thru 3.2.3Johns&MartinJohns&MartinJohns&MartinJohns&Martin:::: 2 through 2.1 (CMOS processing)2 through 2.1 (CMOS processing)2 through 2.1 (CMOS processing)2 through 2.1 (CMOS processing)

TransparenciesTransparenciesTransparenciesTransparencies:::: transparency notes (process technology)transparency notes (process technology)transparency notes (process technology)transparency notes (process technology)

Study CBT course on the web or on I3SStudy CBT course on the web or on I3SStudy CBT course on the web or on I3SStudy CBT course on the web or on I3S----CD:CD:CD:CD:

How a silicon integrated circuit is made (How a silicon integrated circuit is made (How a silicon integrated circuit is made (How a silicon integrated circuit is made (UniUniUniUniManchester)Manchester)Manchester)Manchester)


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Exercises: VLSIExercises: VLSIExercises: VLSIExercises: VLSI----14141414

WesteWesteWesteWeste pp168: 3.8 ex 5 (difficulty: easy):pp168: 3.8 ex 5 (difficulty: easy):pp168: 3.8 ex 5 (difficulty: easy):pp168: 3.8 ex 5 (difficulty: easy): ExplainExplainExplainExplainwhy substrate and well contacts are important inwhy substrate and well contacts are important inwhy substrate and well contacts are important inwhy substrate and well contacts are important inCMOS.CMOS.CMOS.CMOS.

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CMOS Processing