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Figure 2.1Circuit symbol for the op amp.
Op Amps
Op Amps are Operational Amplifiers Simple, standardized conceptual amplifier which you can buy for pennies
Wide range of specifications and specialties
Low cost, precision, fast, low power, high voltage, high impedance,
high current drive, multiple inputs, differential, etc. etc.
Manufacturers may sell hundreds of versions in multiple packages
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Op Amps
Op Amps versatile to work withcan do a wide variety of tasks Feedback makes op amps reliable, manufacturable
Op amps considered here have three terminals
Inverting input
Noninverting input
Output
Dont forget op amps actually must have power connections, usually two in
this chapter
VCCpositive supply
VEEnegative supply
May have other inputs like clock signals, frequency compensation, offset
correction, etc.
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Op Amps
Inverting input
Noninverting input
Output
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Op Amps
Inverting input
Noninverting input
Output
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Op Amps
Inverting input
Noninverting input
Output
Remember, VCCand VEEneed to be connected to ground for real in theLab or insimulation!
Ground will be the circuit common nodeall signals referenced
to ground
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Op Amps
Inverting input
Noninverting input
Output
Whats the minimum number of terminals required for a single op amp?
Whats the minimum number of terminals required an op amp in a
package containing two op amps?
D
D
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Op Amps
Inverting input
Noninverting input
Output
Whats the minimum number of terminals required for a single op ampIC? 3+2=5
Whats the minimum number of terminals required an op amp in an IC
package containing two op amps?
-- 3+3+2=8
(power and ground internally routed)
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Figure 2.3Equivalent circuit of the ideal op amp.
Op Amps
Op amps sense the difference between the inputs and amplifiesthat difference, everything is referenced to the circuit ground
We should write
Inverting input=v1-ground=v1-0
Noninverting input=v2-ground=v2-0
These voltage differences appear at
the output amplified by the gain A
(v3-0)=A[(v2-0)-(v1-0)]
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Op Amps
Op amps sense the difference between the inputs and amplifiesthat difference, everything is referenced to the circuit ground
We should write
Inverting input=v1-ground=v1-0
Noninverting input=v2-ground=v2-0
These voltage differences appear at
the output amplified by the gain A
(v3-0)=A[(v2-0)-(v1-0)]
These zeros just make it confusing, so
leave them off and write:
v3=A(v2-v1)
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teries/images/Light
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Note, the noninverting input and the out put have the same signthey
are in phase, while the inverting input and the output have opposite
sign, they are opposite phase
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Figure 2.3Equivalent circuit of the ideal op amp.
Op Amps
Real op amps seem to approach some of the performance of ideal op amps,but not quite. Ideal characteristics:
Infinite input impedance
Zero output impedance
Zero common-mode gain
(infinite common-mode-
rejection)
Infinite open-loop gain A
Infinite bandwidth
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Figure 2.3Equivalent circuit of the ideal op amp.
Op Amps
Real op amps seem to approach some of the performance of ideal op amps,but not quite. Ideal characteristics:
Infinite input impedance means
The ideal op amp draws no
current from the inputs:
i1=i2=0
No power drawn from the
inputs
The inputs behave as if they
are open circuits
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Figure 2.3Equivalent circuit of the ideal op amp.
Op Amps
Real op amps seem to approach some of the performance of ideal op amps,but not quite. Ideal characteristics:
Zero output impedance means
The output acts as an ideal
voltage source, able to supply
any amount of current yet
maintain the voltage
The output always supplies
the voltage A(v2-v1)
The output impedance is zero
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Figure 2.3Equivalent circuit of the ideal op amp.
Op Amps
Real op amps seem to approach some of the performance of ideal op amps,but not quite. Ideal characteristics:
Zero output impedance means
The output acts as an ideal
voltage source, able to supply
any amount of current yet
maintain the voltage
The output always supplies
the voltage A(v2-v1)
The output impedance is zero
No resistance
herea short
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Figure 2.3Equivalent circuit of the ideal op amp.
Op Amps
Real op amps seem to approach some of the performance of ideal op amps,but not quite. Ideal characteristics:
Zero common-mode gain means
infinite common-mode-rejection
Only the difference is amplified
If v1=v2the output is 0
If v1=v2=1.5, the difference is
0, output will be 0, and the
common-mode signal is 1.5
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Op Amps
Real op amps seem to approach some of the performance of ideal op amps,but not quite. Ideal characteristics:
Zero common-mode gain means
infinite common-mode-rejection
Only the difference is amplified
If v1=v2the output is 0
If v1=v2=1.5, the difference is 0,
output will be 0, and the
common-mode signal is 1.5
If v1=1.75, v2=1.70, then
v1-v2=(1.75-1.70)=0.05
The difference is 0.05 (this
is amplified)
The common-mode signal
is the average signal,
1.725V (this is rejected)
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Op Amps
Differential and common-mode signals Differential input signal is the difference
between the inputs
= Common-mode input signal is
=12 ( )
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Op Amps
Differential and common-mode signals Differential input signal is the difference
between the inputs
= Common-mode input signal is
=12 ( )
vIdand vIcmcan be used to write the inputs in
a little different and very useful way
= 2
= 2 Half the difference between 1 and 2 is addedto the common signal to make input 2
Half the difference between 1 and 2 is
subtracted from the common signal to make
input 1
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Op Amps
Signals on the inputs v1and v2
Common mode and difference signal
= =12 ( )
Difference between v1
and v2=
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Op Amps
Ideally, only the difference signal is amplified, while the common signal is rejected
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Op Amps
Ideally, only the difference signal is amplified, while the common signal is rejected
Common mode signals are everywherepower supply ripple, instability, noise of
many kinds. Concentrating on the difference signal gives much cleaner results
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Figure 2.3Equivalent circuit of the ideal op amp.
Op Amps
Real op amps seem to approach some of the performance of ideal op amps,but not quite. Ideal characteristics:
Infinite input impedance
Zero output impedance
Zero common-mode gain
(infinite common-mode-
rejection)
Infinite open-loop gain A
Infinite bandwidth
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Figure 2.3Equivalent circuit of the ideal op amp.
Op Amps
Real op amps seem to approach some of the performance of ideal op amps,but not quite. Ideal characteristics:
Infinite open-loop gain A means
Ideally, the open-loop gain is
very large, might as well call it
infinite
Infinite gain is impractical of
course, but open loop gain of real
amplifiers can be very large
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Figure 2.3Equivalent circuit of the ideal op amp.
Op Amps
Real op amps seem to approach some of the performance of ideal op amps,but not quite. Ideal characteristics:
Infinite bandwidth means
The gain does not depend on
frequency
Gain at dc levels is the same as
the gain of a time-varying signal
at any frequency
Of all the ideal specifications,
real op amps may diverge the
most on bandwidth
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Figure 2.3Equivalent circuit of the ideal op amp.
Op Amps
Real op amps seem to approach some of the performance of ideal op amps,but not quite. Ideal characteristics:
Infinite open-loop gain A means
Open-loop is without feedback
(with feedback gain is closed-
loop gain)
The open loop gain of transistors
is not stable in manufacturing
processes, since it is influenced
by properties which naturally
vary, even if slightly
Adding feedback can stabilize the
gain and make amplifier systems
based on transistors much easier
to manufacture. Feedback has
other benefits as well
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Exercise 2.2
a, c; you do b, d
Ideal op amp except gain A=103
= =12 ( )
= 2
= 2 3=
v1=1.002V, v2=0.998V
= = 0.998 1.002 = 4=12 =12 0.998 1.002 = 13= = 1000 0.004 = 4
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Exercise 2.2
a, c; you do b, d
Ideal op amp except gain A=103
= =12 ( )
= 2
= 2 3= v2=0V, v3=2V
=3 = 21000= 2
=
2 = 0 0.002
2 = 1
= 2 = 0.001 0.0022 = 2
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Exercise 2.3
find v3 and Gain
3= = = = = 3=
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Exercise 2.3
find v3 and Gain
3= = = = = 3=
= =
= 3= = = /( ) =
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Figure 2.5The inverting closed-loop configuration.
Inverting Configuration
Finally a real op amp
The non-inverting input is at ground
The value of v1is referenced to ground at the inverting input
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Figure 2.5The inverting closed-loop configuration.
Review -- Inverting Configuration
R1and R2make a feedback network
The value at the inverting is a result the voltage
divider formed by R1and R2 Information (the voltage, in this case) is fed-back
from the output to the inputfeedback
R2makes a loop, it closes the loop
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Figure 2.6Analysis of the inverting configuration. The circled numbers indicate the order of the analysis steps.
Inverting Configuration
The open-loop gain is A, now define the closed-loop gain as G
Assume the open-loop gain A is very very large
Output is = and A is very large The larger A is, the closer gets to zero, since approaches zero
=
= 0 Because of the feedback and the
huge open-loop gain A, the inputs
are forced to be almost the same;
in fact just say the voltage on the
inverting terminal, v1should be
nearly zero since= =ground
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Figure 2.6Analysis of the inverting configuration. The circled numbers indicate the order of the analysis steps.
2v1=0 (virtual ground)
Inverting Configuration
Because = the two terminals track each other in potential There is a virtual short circuit between terminals 1 and 2
Since terminal 2 is at ground, terminal 1
is brought to a virtual ground as well
But, terminal 1 and 2 are not shorted
together! The huge open-loop gain of the
amplifier makes it seem as if they are
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Figure 2.6Analysis of the inverting configuration. The circled numbers indicate the order of the analysis steps.
2v1=0 (virtual ground)
Inverting Configuration
Now can calculate the current i1since
The source voltage vIis known
Inverting input voltage v1is known (the virtual ground)
Know the voltage on both sides of R1, so i1is easy to find
= = 0
=
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Figure 2.6Analysis of the inverting configuration. The circled numbers indicate the order of the analysis steps.
2v1=0 (virtual ground)
Inverting Configuration
Since the op amp has ideal infinite input resistance, terminal 1 will not accept the
current, and it all must flow on through R2
Assume load supplies a lower impedance path to ground
= =
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Figure 2.6Analysis of the inverting configuration. The circled numbers indicate the order of the analysis steps.
2v1=0 (virtual ground)
Inverting Configuration
Since we know the voltage at all nodes, we can calculate the output voltage
= =
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Figure 2.6Analysis of the inverting configuration. The circled numbers indicate the order of the analysis steps.
2v1=0 (virtual ground)
Inverting Configuration
Since we know the voltage at all nodes, we can calculate the output voltage
= = = =
And vO/vIis the closed loop, Gain G
= =
While the open loop gain A is
infinite, the closed-loop gain is
finite, and controlled by easily
manufactured and controlled passiveresistors.
The uncontrolled gain A is tamed by
negative feedback
0
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Inverting ConfigurationEffect of Finite Gain
Assume the open-loop gain A is not necessarily large
No longer does
approach zero, instead v1is not so close to ground
This changes the current through the feedback resistors
Still assuming infinite input resistance
= = (0 ) =
0
= = ( )
=
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
=
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Inverting ConfigurationEffect of Finite Gain
As before, all of i1goes through R2 Assume load supplies a lower impedance path to ground
Output voltage=v1-drop in R2
= =
After some math its possible
to find the closed loop gain
=
/1 1 / /
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Inverting ConfigurationEffect of Finite Gain
As A goes to infinity, G goes to the ideal value = =
/1 1 / / 0
To make the infinite open loop gain approximation, and
have the virtual ground at the inverting input, its not
necessary for A to go to infinity, it just must be largeenough so that the quantity 1 / /becomesvery small compared to one.
This happens when 1 /
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ECE 3210 Fall 2013 John Lindsey
Example 2.1
Calculate closed loop gain for several values of open loop gain for the
inverting configuration with = 1 = 100compare to the idealvalue of g and find the percentage error. Find v1when vI=0.1V
= /
1 1 / /
Substitute these values into the equations for closed loop gain
and try with a variety of values for A with Excel or MATLAB
= 100% = ( /)(/) 100%
=
v1is not virtual ground, it is changed by the open loop gain:
Output voltage is related to input voltage by close loop gain:
Substitute in to get a relation for v1in terms of vI: =
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ECE 3210 Fall 2013 John Lindsey
Example 2.1
Calculate closed loop gain for several values of open loop gain for the
inverting configuration with = 1 = 100compare to the idealvalue of g and find the percentage error. Find v1when vI=0.1V
As open lop gain becomes 10,000 and
above, the closed loop gain changes verylittle for further changes in open loop gain;
the error becomes small for large A; tiny
changes in v1for large changes of large A
A G error v1
1E+00 0.98 -99% -9.80E-02
1E+01 9.01 -91% -9.01E-02
1E+02
49.75
-50%
-4.98E-02
1E+03 90.83 -9.2% -9.08E-03
1E+04 99.00 -1.0% -9.90E-04
1E+05 99.90 -0.10% -9.99E-05
1E+06 99.99 -0.01% -1.00E-05
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Inverting Configuration Input Resistance
Input resistance of the ideal op amp is infinite; for the inverting configuration,
however, the feedback network provides a path from input to ground through the
resistors Input resistance is defined as / The input current provided by the source is exactly the current flowing through R1
this makes finding the input resistance simple since already know i1from the source
voltage:
This is a problem, actually, since the
closed loop gain G is proportional to
high input impedance makes for low
gain (or an impractically high R2)
Example 2.2 shows one work around
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
= = = = /=
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Inverting Configuration Output Resistance
Output resistance of the ideal op amp is a shortthe voltage source inside the op
amp can supply any amount of current required by the load to keep the outputvoltage steady
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
=
=
= 0
For the inverting configuration,
the feedback network does not
influence the output resistance
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Figure 2.10A weighted summer.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Weighted Summer
Adds or sums the inputs
Gives a weighta multiplierindividually for each input Based on the inverting configurationrelies on two concepts
Currents at a node sum, so can add currents
Voltages through resistors in series a multiplied by the resistor divider
The current through any of the
inputs is given by Ohms law
= And the currents sum at the
inverting input
=
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Figure 2.10A weighted summer.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Weighted Summer
The summed current flows through the feedback resistor and the virtual ground at
the inverting input simplifies finding the output voltage= = 0 = Substitute in for the summed
currents, and get the output in
terms of the weighted and summedcurrents
= =
= +
The values for R1Rncan be
individually adjusted
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Figure 2.10A weighted summer.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Weighted Summer
Example D2.7 = 5 max output 10V current 1mA Since we are given maximum output currents and voltage, using the virtual
ground Rf is specified = = .= 10,000
v2weighted 5x
=
Picking a value for R1 then sets a
value for R2
=
5
Or=
if pick R1=10,000R2=2,000
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Figure 2.11A weighted summer capable of implementing summing coefficients of both signs.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Weighted Summer when some inputs have a different sign
By adding a second op amp, inputs of either sign can be weighted and added
Possible since each stage produces the inverse of the input
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Figure 2.12The noninverting configuration.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Noninverting Configuration
A non-inverting closed-loop amplifier can be made by
Maintaining the feedback network Moving the source to the non-inverting input
To analyze
Assume ideal op amp with infinite gain
Use the difference equation for the input
Virtualshortexists between the inputs= Avd
= = 0 for infinite Ahttp://upload.w
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Figure 2.13Analysis of the noninverting circuit. The sequence of the steps in the analysis is
indicated by the circled numbers.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Noninverting Configuration
Virtual short between the inputs means the source voltage appears at both inputs
Assuming there is an open at the output (and infinite output impedance of the opamp), the input voltage seen at the inverting input will flow through R1 to ground;
so we can get the current through R1 as
The virtual short is not a real short; any current in R1 must come from R2.
Fortunately, the op amp can supply current, since the output is open.
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Figure 2.13Analysis of the noninverting circuit. The sequence of the steps in the analysis is
indicated by the circled numbers.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Noninverting Configuration
Can get the output voltage as the sum of
Voltage drop in R2, which is known since the current is known Voltage at the noninverting node, which is forced to be the same as the input
voltage by the virtual short (which is due to the huge open-loop gain A)
= Collect the voltage terms to get closed loop gain:
= = 1
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Figure 2.12The noninverting configuration.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Noninverting Configuration with Finite Gain
In the case where A is finite, the closed loop gain can be calculated as
= 1 1
1
When A is infinite, the closed loop gain becomes 1
As with the inverting case,
the bottom of the fraction
becomes close to one when
the A 1 Its the same result because
the feedback network is the
same (short the sources and
they are identical)
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Figure 2.12The noninverting configuration.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Noninverting Configuration with Finite Gain
Input resistance is infinite
because there are no paths to
ground on the noninverting
terminal
Output resistance is again ashort because of the internal
ideal voltage source
As with the inverting case, the bottom of the fraction becomes close to one
when the A 1 Its the same result as the inverting configuration because the feedback
network is the same (short the sources and they are identical)
=
1 1 1
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Figure 2.12The noninverting configuration.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Noninverting Configuration as a Voltage Follower
To make the noninvertingconfiguration into a voltage
follower want the closed loop gain
to become 1
The infinite input impedance and zero output impedance make the
noninverting configuration perfect as a voltage follower, also known as a
buffer
A good buffer circuit wont interfere with the source (high input
impedance for a voltage source) and will be able to drive any load (output
impedance a short)
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Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Noninverting Configuration as a Voltage Follower
This circuit has 100% negative feedback
G1
R1 becomes open
R2 becomes a short
= 1
0
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Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Example 2.14
A transducer with an open-circuit voltage of 1V and source resistance of
1M is connected to a 1k load. Find the load voltage for the case of
direction connection and with a unity gain voltage follower
For the direct connection, its a voltage divider
= += 1 3
.=1mV
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Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Example 2.14
A transducer with an open-circuit voltage of 1V and source resistance of
1M is connected to a 1k load. Find the load voltage for the case of
direction connection and with a unity gain voltage follower
For the voltage follower
= = = 1
vs
1V
Rs
1megaRL
1k
follower
1vo
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Difference Amplifiersin more detail
Difference amplifies amplify the difference between the two inputs
Rejects all other signals
Real circuits, even reasonable simulations of imaginary circuits will have some
common-mode gain
=
= = = =12 ( )
A useful figure of merit for real circuits is the common mode rejection ratio
how well a circuit amplifies the difference signal divided by how poorly the
amplifier amplifies the common signal
= 20 ||||
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Figure 2.15 Representing the input signals to a differential amplifier in terms of their
differential and common-mode components.
Difference Amplifiersin more detail
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Figure 2.16A difference amplifier.
Difference Amplifiersin more detail
A difference amplifier using feedback to improve stability and performance
Essentially a inverting and noninverting configuration together
The voltage divider of R3 and R4 is used to attenuate the noninvertingsignal from 1 down to the level of the inverting signal
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Figure 2.17Application of superposition to the analysis of the circuit of Fig. 2.16.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Difference AmplifiersAnalyze by Superposition
Analyzer by superpositionset one input to ground, find the output, then set the
other input to ground, find the output, and add the outputs together
Works because the system is linear
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Figure 2.17Application of superposition to the analysis of the circuit of Fig. 2.16.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Difference AmplifiersAnalyze by Superposition
First ground the noninverting input vI2 Call the resulting output vO1 R3 and R4 on the noninvering input have no effect on the circuit output, since
they are at circuit ground on one side, and the infinite impedance input on the
otherno current flows, no voltage exists at input 2
Replacing those with a short to ground then exactly the circuit is the inverting
configuration
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Figure 2.17Application of superposition to the analysis of the circuit of Fig. 2.16.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Difference AmplifiersAnalyze by Superposition
First ground the noninverting input vI2 Call the resulting output vO1 R3 and R4 on the noninvering input have no effect on the circuit output, since
they are at circuit ground on one side, and the infinite impedance input on the
otherno current flows, no voltage exists at input 2
Replacing those with a short to ground then exactly the circuit is the inverting
configuration
The gain is:
=
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Figure 2.17Application of superposition to the analysis of the circuit of Fig. 2.16.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Difference AmplifiersAnalyze by Superposition
Second ground the inverting input vI1 Call the resulting output vO2
This is the noninverting configuration, with the voltage divider R3 and R4 on theinput to deal with
= 3 So the output v
O2is given by
= 1 =
3 1
But we want the gain of the two
inputs to be the same magnitude
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Figure 2.17Application of superposition to the analysis of the circuit of Fig. 2.16.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Difference AmplifiersAnalyze by Superposition
Set the gain portions equal to each other:
= 3 1 = =
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Figure 2.17Application of superposition to the analysis of the circuit of Fig. 2.16.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Difference AmplifiersAnalyze by Superposition
Set the gain portions equal to each other:
= 3 1 = = Solving only for the gains
3 1
=
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Figure 2.17Application of superposition to the analysis of the circuit of Fig. 2.16.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Difference AmplifiersAnalyze by Superposition
Set the gain portions equal to each other:
= 3 1 = = Solving only for the gains
3 1
=
Rearrange
3 =
1
1 =
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Figure 2.17Application of superposition to the analysis of the circuit of Fig. 2.16.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Difference AmplifiersAnalyze by Superposition
R3 and R4 should be like R2 and R1 to match the gains on the inputs
+=
+
=
So back to the output from the non-inverting input
= 1 =
3 1
=
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Difference AmplifiersAnalyze by Superposition
Now finish the superposition by adding the two outputs to find the output
= =
=
= This is exactly the form for a difference amplifier, where the gain is
=
Now must find the common mode gain
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Difference Amplifierscommon mode response
Apply only a common mode signal
Tie the inputs together with Vicm
Then proceed as usual
Find the current in the feedback loop
Find the output voltage
Gain is Vout/VIcm
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Difference Amplifierscommon mode response
Find the current in R1
To do that, find the voltage drop across R1
On the left side of R1 there is the common mode voltage
On the right side, there is a virtual short between the two inputs
The feedback network is the thing making the virtual short through the
huge open loop gain Ainput 1 is driven to be a virtual short with
input 2 The voltage on input 2 is from
the R3 R4 divider network
= +
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Difference Amplifierscommon mode response
The drop in R1 is the difference between the source and input 1
= =
= 1
3
= 3 1
Now can find the output voltage
Know the drop in R2 due to i2
Know the voltage at input 1
due to the virtual short
ff f
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Difference Amplifierscommon mode response
Find the output voltage
= = + -
+
R
Am= = 3 1 3
= =
3 = =
3
1
Diff A lifi d
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Difference Amplifierscommon mode response
Find the output voltage
Am= = 3 1 3
The common mode gain will be zero when
= 1
which is the condition established for getting the gain on
both inputs the same:=
In reality there will be some common
mode gainCMRR will not be infinite
because its impossible to matchresistors perfectly
Diff A lifi i t i t
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Figure 2.19Finding the input resistance of the difference
amplifier for the case R3= R1and R4= R2.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Difference Amplifiersinput resistance
=
While this difference amplifier can amplify the difference and reject the
common signal, it suffers the low input resistance of the inverting
configurations topology
Find the differential input resistance Rid given that=
The two inputs each have iIflowing to their resistors The virtual short connects the resistors, making a loop
= 2This topology suffers from low input
resistance if high gain is required
I t t ti A lifi
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Figure 2.20A popular circuit for an instrumentation
amplifier. (a)Initial approach to the circuit
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Instrumentation Amplifier
Adding a high input impedance amplifier on the input side improves the
low input resistance issue of the difference amplifier
The voltage follower is just the circuit The voltage follower can have voltage gain if there is some resistance in
the feedback network
Adding some gain before the difference amplifier can be donegive the
difference circuit a larger difference to amplify
A1 and A2 are noninverting with gain
= 1
I t t ti A lifi
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Figure 2.20A popular circuit for an instrumentation
amplifier. (a)Initial approach to the circuit
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Instrumentation Amplifier
The difference signal at the inputs is
=
Each input is amplified by 1 At the output of the voltage followers (the input of the difference amplifier A3)
= 1 1 or
(1
)
The difference amplifier gain is R4/R3 so
= =
3 1
RR
I t t ti A lifi
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Figure 2.20A popular circuit for an instrumentation
amplifier. (a)Initial approach to the circuit
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Instrumentation Amplifier
However
This configuration will amplify the common mode signal as well as the
differential mode signal Mismatch between the set of R1/R2 will cause a change in the differential
signal
To change the differential gain, a pair of resistors must be changed instead
of just one resistor
Removing the ground at node X
resolves the issues by relying on the
virtual short circuits between the inputs
created by the infinite open loop gain
I t t ti A lifi
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Figure 2.20A popular circuit for an instrumentation
amplifier.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Instrumentation Amplifier
The virtual short between the terminals causes vI1and vI2to be on either side of
2RI The voltage drop in RIis then the difference between the inputsjust what
should be amplified
The current in RIis then
= =
This current then flows through the R2 resistors, producing the voltage at the
input of the difference stage of the amplifier
Instr mentation Amplifier
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Figure 2.20A popular circuit for an instrumentation
amplifier.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Instrumentation Amplifier
Each R2 has a voltage drop of
= = R = R = = =
The difference between these outputs is the difference amplifiers (A3) input
= =
= 1 RR
Instrumentation Amplifier
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Figure 2.20A popular circuit for an instrumentation
amplifier.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Instrumentation Amplifier
The difference amplifier A3 has a gain of R4/R3, so the overall output is
vO= ()(/3) = 1 and the overall gain is = =
1
Instrumentation Amplifier
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Figure 2.20A popular circuit for an instrumentation
amplifier.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Instrumentation Amplifier
Gains independence from variations in R2 is removedif there are two
different resistors R2: R2 and R2 the differential gain may change, but the
difference signal is preserved since current flows through the resistors in series
==RR3 1
R R
Overall CMRR of the system is improved since
Common signals at vI1and vI2will pass through the first stage, but they will
not be amplified
The difference signal is amplified in the first stage
Changing the gain can be done
by adjusting the value of RIalone
Integrators and Differentiators
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Figure 2.22The inverting configuration with general impedances in the feedback and the feed-in paths.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Integrators and Differentiators
Redraw the inverting configuration with impedances instead of resistors
The closed loop transfer function is now =
Inverting Integrator
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Figure 2.24(a)The Miller or inverting integrator. (b)Frequency
response of the integrator.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Inverting Integrator
Replace resistor R2 with a capacitor
There still is a virtual ground at the inverting input due to the high open loop gain All of the input voltage drop appears across R, and the current in the
capacitor can then be found
= = After the clock starts at t=o, current through R leaves charge on the plates of
capacitor C, where it accumulates (assuming no leakage) The charge will be:
=
Inverting Integrator
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Figure 2.24(a)The Miller or inverting integrator. (b)Frequency
response of the integrator.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Inverting Integrator
Recall that V=Q/C, so the voltage accumulating will be, and we should include an
initial condition VC
=1
V
And Ohms law relates current and voltage with resistance
= 1
Inverting Integrator
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Figure 2.24(a)The Miller or inverting integrator. (b)Frequency
response of the integrator.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Inverting Integrator
= 1
This is the voltage on the input side of the capacitor; the output side is the
opposite sign
= So the output is given by the integral:
=1
Inverting Integrator
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Figure 2.24(a)The Miller or inverting integrator. (b)Frequency
response of the integrator.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Inverting Integrator
A different way to analyze starts with the general closed loop transfer function
=
Then substitute in the impedances Z1=R and Z2=1/sC
= 1 = 1sCRAnd = =
1CR
Inverting Integrator
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Figure 2.24(a)The Miller or inverting integrator. (b)Frequency
response of the integrator.
Microelectronic Circuits Sedra/Smith Copyright 2010 Oxford University Press, Inc.ECE 3210 Fall 2013 John Lindsey
Inverting Integrator
The circuit has a transfer function magnitude
= 1CR
And phase of
= 90 As frequency doubles (an octave) magnitude
decreases by half, 20Log0.5=6dB
(20dB/decade)
Where gain becomes 0dB, the frequency is
the integrator frequency, or the inverse of the
time constant
=1= 1
Inverting Integrator
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Inverting Integrator
The circuit has a transfer function magnitude
= 1CR
At frequency=0, the capacitor passes no signalit
is open. The closed-loop transfer function goes to
infinity, which means the system is now running
without feedbackopen loop gain dc signals can be amplified greatly by this
circuita problemfix it by adding a
resistor in parallel with the capacitor to allow
some dc feedback gain ofRF/R
Figure 2.25The Miller integrator with a large resistance RF
connected in parallel with Cin order to provide negative
feedback and hence finite gain at dc.
Vo sV(s)= RF/R1 s C R
Op Amp Differentiator
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Figure 2.27 (a)A differentiator. (b)Frequency response of a differentiator with a time-constant CR.
The virtual ground causes the input to appear across the capacitor
Q=VC, and current is Q/time=CV/time
() =()
= () =
Op Amp Differentiator
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Figure 2.27 (a)A differentiator. (b)Frequency response of a differentiator with a time-constant CR.
In the frequency domain, the transfer function
=
=
Tend to be unstable
Tend to magnify noise spikes
Offset Voltage
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Figure 2.28Circuit model for an op amp with input offset voltageVOS.
Real op amps never perfectly amplify
There is always some extra voltage on v1 or v2, so one or both inputs are slightly
different from the actual input value, and this wrong difference is amplified
= Inside the op amp there are transistors, capacitances, resistances, inductances all
with non-ideal values, all with slightly different values for each op amp
manufactured
A tiny difference might onlymake a V difference, but
many of those can add and
multiplycan easily become a
mV difference
mV still seems small, but
multiply by a large open loopgain Adand its a big factor
Offset Voltage
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Figure 2.28Circuit model for an op amp with input offset voltageVOS.
Real op amps never perfectly amplify
There is always some extra voltage on v1 or v2, so one or both inputs are slightly
different from the actual input value, and this wrong difference is amplified
= Inside the op amp there are transistors, capacitances, resistances, inductances all
with non-ideal values, all with slightly different values for each op amp
manufactured, and under use also vary
A tiny difference might onlymake a V difference, but
many of those can add and
multiplycan easily become a
mV difference
mV still seems small, but
multiply by a large open loopgain Adand its a big factor
1mV5mV is typical VOS
Offset Voltagean example
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A simple single-input transistor
amplifier
Single input and output
Single power supply 5V
M2 nchan
Vdd
5V
pchanM3pchan
M4
Vbias1
2.5
M1 nchan
Ibias
100A
Vin
1.083
Vout
V_in
*0.8 micron mod.MODEL nchan N
+ LD=1.2E-7 NS+PHI=0.70 PB=0.+MJ=0.5 CGSO=3
Offset Voltagean example
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Sweep input from 0V5V
Output falls from 5V to 0.5V
Linear region
of operation
Offset Voltagezoom in even more
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A good region to operate might
be with the input centered and
near Vin
=1.083V
Change transistor M1 gate width to
12.1 microns from 12.0 microns and
get a very different plotnow need
1.080V Vinfor best operation
Offset VoltageAn offset voltage
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Figure E2.21Transfer characteristic of an op amp with VOS= 5 mV.
Offset voltages
Caused by slight differences in manufacturing
May be made better or worse through design
Usually are sensitive to use
Temp effects
Voltage supply effects
Wear-out
The designer
may expect for
an input=0V, theoutput will be 0V
An offset voltage
may cause the
output instead to
rail at 10V
In this case 0V
output occurs
for -5mV input
due to the offset
voltage
Offset Voltage: what is the gain
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Figure E2.21Transfer characteristic of an op amp with VOS= 5 mV.
= =
Question: what
is the gain here
Question: what
is the gain here
Offset Voltage: what is the gain
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Figure E2.21Transfer characteristic of an op amp with VOS= 5 mV.
= =
Is it
= ?
Is it
.
= 0?
Gain: think about the slope of the transfer characteristic
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Figure E2.21Transfer characteristic of an op amp with VOS= 5 mV.
= =
10 100 0.001= 0
10 0.006 0.005=
100.001
= 10,000/
Offset Voltage
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Figure 2.29Evaluating the output dc offset voltage due to VOSin a closed-loop amplifier.
Offset voltage in the op amp causes the output to be influenced by the
offset voltage just as the non-inverting configurations input
= 1
The offsets effect can be removed, in principle, if there is a VOSsupply
which can be adjusted to the oppositevoltage
In a closed-loopamplifier, the offset
voltage can be
thought of as a shift
in the circuit ground
at the non-inverting
input
Offset VoltageCommercial Op Amps Allow Correction
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Figure 2.30The output dc offset voltage of an op amp can be trimmed to zero by connecting a potentiometer to the
two offset-nulling terminals. The wiper of the potentiometer is connected to the negative supply of the op amp.
Commercial Op Amps may have inputs to allow adjustment to remove
the offset voltage
The circuit may still drift due to temperature, supply, age
Offset Voltage DC coupled input
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Figure 2.31(a)A capacitively coupled inverting amplifier. (b)The equivalent circuit for determining its dc output offset voltage VO.
If the inverting configuration is coupled at the input by a capacitor
Low frequency (and dc) signals are blocked
VOS
has 100% negative feedback, so passes only at the low level of a
few mVit will be a small error on the amplified AC signal
Considering DC input, gain
for VOSis 1
Input Bias and Offset Current
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Figure 2.32The op-amp input bias currents represented by two current sources IB1and IB2.
Op Amps have high but non-zero input resistance
Op Amps made from BJTs need some current to runthe bipolar
transistor amplifies a small current in the base
Op Amps made from MOS transistors have very little input current atlow frequencies, but capacitance on the gate allows current to flow at
higher frequencies
Input Bias and Offset Current
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Figure 2.32The op-amp input bias currents represented by two current sources IB1and IB2.
Input bias current is the average of the two input currents
=
2
The input offset current is the difference in the currents
= 100 Typcially
10 Typically
Input Bias and Offset Current Effect
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Figure 2.33Analysis of the closed-loop amplifier, taking into account the input bias currents.
Ground the input signal sources to see the effect of the input currents on the
output voltage
There are currents in R1 and R2, but the non-inverting input is at ground
The virtual short between inputs due to the high open loop gain brings the
inverting input to a virtual short
The output voltage is due to the current in R2, IB1 The current IB2has no effect
=
If R2is large, the output will be
significantly affected by the input
bias current
Input Bias Current Effect Reduction
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Figure 2.34 Reducing the effect of the input bias currents by introducing a resistor R3.
Add a resistor R3 to the non-inverting input
Changes the voltage level at the non-inverting input
Through the virtual short between inputs also at the inverting input The voltage level at the inputs is then:
= 3 The current in R1 is defined by the input voltage, since R1 is connected to
ground
= = 3
Input Bias Current Effect Reduction
3
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Figure 2.34 Reducing the effect of the input bias currents by introducing a resistor R3.
= = 3
The current in R2 is the sum of the current in R1 and the current supplied by the
input, IB1
3 This gives the output voltage, which is the drop in R2 and the voltage on the inputs
= 3 3
Input Bias Current Effect Reduction
If the bias currents are equal I =I =I then output is simplified to
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Figure 2.34 Reducing the effect of the input bias currents by introducing a resistor R3.
If the bias currents are equal, IB=IB1=IB2then output is simplified to
= 3(1
In order to minimize the effects of the bias currents, VOshould be zero when there
are no input signals as in this case. Minimizing VOmeans adjusting R2 so that
when multiplied by 1 the result equals R2
3= 1 = RRR R
Input Bias Current Effect Reduction
Finally check the value of the offset current in this configuration
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Figure 2.34 Reducing the effect of the input bias currents by introducing a resistor R3.
Finally check the value of the offset current in this configuration
= 2 = 2
Substitute into the output relation
= 3 3
= This value can be much less
than the effect of the offset
current without the feedback
and R3
AC coupled amplifier
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Figure 2.36 Illustrating the need for a continuous dc path for each of the op-amp input terminals. Specifically, note
that the amplifier will notwork without resistor R3.
For AC coupling, there must be a path to ground for the amplifier to work
R3 should be the same as R2
Input offset effect on inverting integrator
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Figure 2.37 Determining the effect of the op-amp input offset voltage VOSon the Miller integrator circuit.
Note that since the output rises with time, the op amp eventually saturates.
For the inverting integrator, input offset current will add linearly to the output,
eventually saturating the outputthe term increases linearly with time
Open Loop Gain and Frequency Response
h fi i l i f l d i h f b
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Figure 2.39 Open-loop gain of a typical general-purpose internally compensated op amp.
The finite open loop gain of a real Op Amp decreases with frequency above a
certain point
The -3dB frequency fb break or corner frequency may be quite low
ftis the unity gain frequency, where gain falls to 0db (1V/V) Gain often falls at -20dB /decade due to internal capacitance making the op
amp a STC circuit
frequency compensation
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Open Loop Gain and Frequency Response
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Figure 2.39 Open-loop gain of a typical general-purpose internally compensated op amp.
For frequencies an order of
magnitude or so beyond the
-3dB frequency, an
approximation for gain is
= Gain reaches 0dB at
= =1v/v=0dB
= Unity gain bandwidth,
ft=t/2is an important
figure of merit given by
manufacturers
Once you know ft, you canwork backwards up the
curve to find gain at any
frequency
Gain bandwidth trade-off
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The finite-gain closed loop performance of an op amp was found earlier in the
chapter as
= 1
1
This can be re-written in terms of frequency as
()()= 1 1 (1
) 1
Usually open loop gain is very large, or
1
Gain bandwidth trade-off
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The term in the middle then goes away and closed loop gain then reduces to
()()= 1 1
This is the form of a low-pass STC where the inverting configuration has
DC gain magnitude is R2/R1 Gain rolls off at -20dB/decade
-3dB point is given by
3= +/ Similar math for the non-inverting configuration gives the form of a low-pass
STC where
DC gain magnitude is 1+R2/R1
Gain rolls off at -20dB/decade
-3dB point is given by
3= +/
Gain bandwidth trade-off
Example 2 6 find 3dB frequency and gains of closed loop amplifiers
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Example 2.6, find -3dB frequency and gains of closed loop amplifiers
were ft=1MHz
The governing rules
are
DC gain
magnitude is
R2/R1
Gain rolls off at -20dB/decade
-3dB point is
given by
3=
1 /
Operating Limits
O A l h ithi b t 1V f th l lt
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Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright 2010 by Oxford University Press, Inc.
Figure 2.42 (a)A noninverting amplifier with a nominal gain of 10 V/V designed using an op amp that saturates at
13-V output voltage and has 20-mA output current limits.
(b) When the input sine wave has a peak of 1.5 V, the output is clipped off at 13 V.
Op Amps can only reach within about 1V or so of the power supply voltage
For example, if the power supplies are +-5V, output may be maximum of about
+-4V
Current is also limited with similar results
Example where
the amplifier
saturates at +-13V
Operating Limits
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Op Amps cant respond quickly enough in a second way, different from frequency
response
A large load requires a large current, for instance charging a large capacitance.If the current required is large enough, the output voltage will lag a change in
the input voltage
The maximum rate of change is the Slew Rate
=
Typically specified as volts/microsecond=V/s
Operating Limits
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Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright 2010 by Oxford University Press, Inc.
Slew rate limitedwhile an amplifier is slewing the output voltage
rises at a fixed rate
Result is a non-linear distortion in the output
Sharply rising input
Slew-rate exceeded, the
output rises at the SR
Operating Limits
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Slew rate limitedwhile an
amplifier is slewing the output
voltage rises at a fixed rate Result is a non-linear distortion in
the output