AVERAGE CURRENT MODE CONTROL IN POWER ELECTRONIC CONVERTERS – ANALOGVERSUS DIGITAL

K. D. Purton * and R. P. Lisner**

*Department of Electrical and Computer System Engineering, Monash University, Australia,and Switch Mode Power Conversion P/L, Melbourne, Australia

**Department of Electrical and Computer System Engineering,Monash University, Australia

Abstract

This paper presents Average Current Mode Control (ACMC) as a general purpose, high-performance all-round control method for AC-DC conversion, DC-DC conversion, and DC-AC conversion (including grid-feed inverters). A detailed examination of the typical analogcircuit implementation and waveforms, based on simulations and experimental results, is usedto explain how ACMC achieves superior performance. Several reported digitalimplementations are critically examined. Finally a hybrid analog-digital controlimplementation of ACMC is proposed.

1. INTRODUCTION

Average Current Mode Control (ACMC) is typically atwo loop control method (inner loop, current; outerloop, voltage) for power electronic converters. Manyof these applications have been in the higher switchingfrequency, lower power segment (up to 10kW, at20kHz and above), but this is changing. A 30kW threephase inverter using analog ACMC has been reported[1]. The main distinguishing feature of ACMC, ascompared with peak current mode control, is thatACMC uses a high gain, wide bandwidth CurrentError Amplifier (CEA) to force the average of onecurrent within the converter, typically the inductorcurrent, to follow the demanded current reference withvery small error, as a controlled current source.Advantages of ACMC include large noise margin, norequirement for additional slope compensation, easycurrent limit implementation, excellent voltage andcurrent regulation, simple compensation, goodbehaviour in both continuous and discontinuousinductor current modes, and has inherent Vin and Vout

feed-forward properties. All this is achieved with onlya slight increase in complexity over earlier schemes.

2. PRINCIPLES OF OPERATION

An early paper on average current control waspublished by Papathomas and Giacopelli of Bell Labsin 1979 [2]. This used digital hardware (no computer)rather than analog hardware. A current controlledoscillator clocked a counter and when this count(proportional to the inductor average current) matcheda current reference count, the switch was turned off. Amore conventional analog approach was reported byO’Sullivan et al of the European Space Centre in 1988[3], in which the authors claimed to have been usingthis scheme for the previous decade. Their so-called

“PWM Conductance Control” appears to be the first touse the output of an “integrator-zero” compensatedCEA and a linear ramp as inputs to the PWMcomparator. This approach was developedcommercially by Unitrode [4].

The usual implementation of ACMC relies on analogoperational amplifiers as error amplifiers, and makesuse of wide-band sensing of the inductor current, toinclude both the AC and DC components. Figure 1shows a basic buck converter with synchronousrectification. The voltage waveform representing theinductor current is connected to one input of the CEAwith large gain at DC and low frequencies to force theaverage value of the inductor current to follow thecurrent reference, which is connected to the otherinput.

Figure 1. Simplified schematic of buck converter with synchronous rectifier and average current mode control regulating output voltage.

Figure 2 shows real waveforms in a low power testcircuit. Fig. 2 (a) shows regulation of the averageinductor current (Iout) at 0.5A, Fig. 2 (b) at 1.0A, andFig. 2 (c) at 1.5A. The CEA output is an inverted andamplified version of the difference between theinductor current and the current reference signal, witha positive DC offset. This CEA output is thencompared with a large amplitude ramp waveform atthe converter switching frequency, at the inputs to aPulse Width Modulation (PWM) comparator. Thesesawtooth waveforms intersect at two points in eachcycle, defining the rise and fall instants of the PWMpulse train to the switches. If the reference input to theCEA is the output of a suitably compensated voltageError Amplifier (VEA), the average inductor currentwill be controlled to force the converter output voltageto track the voltage reference. If the CEA reference isa half-sine waveform, the average inductor currentwill track this, eg, to force a sinusoidal current into thepower grid via an unfolding bridge.

The comparison of the wide band inductor currentwaveform with the PWM ramp waveform results in aninherent fast feed-forward of input and output voltagechanges, without involving the feedback loops andwithout direct monitoring. Since the up-slope anddown-slope of the inductor current waveform areproportional to the input and output voltages, anychange in these slopes results in immediate adjustmentof PWM duty cycle. Clamping the CEA referenceinput limits the converter inductor current. This isoften the output current and so an adjustable outputcurrent limit is easily implemented.

Figure 2 (a). Oscilloscope printout ofexperimental buck converter with ACMC.Large sawtooth is switching frequency rampinput to PWM comparator. Smaller sawtoothis CEA output to other input of PWMcomparator. Middle trace is PWM output tomain switch. Duty cycle is around 25%, Iout isaround 0.5A. Bottom trace is the buck inductorcurrent waveform. Note that under these actualrunning conditions with a synchronousrectifier, inductor current is actually negativefor part of the switching cycle.

Figure 2 (b). Oscilloscope printout ofexperimental buck converter with ACMC.Duty cycle is around 50%, and Iout is around1A. Note that inductor current (bottom trace)minimum is zero, not negative, under theseconditions.

Figure 2 (c). Oscilloscope printout ofexperimental buck converter with ACMC.Duty cycle is around 75%, and Iout is around1.5A. Note that inductor current (bottom trace)minimum is positive under these conditions.

Compensation of the CEA is based upon high gain atDC and low frequencies. This is what forces theaverage of the controlled current, typically theinductor current, to track the current reference. Thisintegrator function is implemented by R1 and C1 inFig. 1. At the zero frequency, determined by C1 andR2, the CEA gain is levelled off and a phase boostback towards zero degrees of lag, from the constant 90degrees of phase lag from the integrator, results. Theflat gain above the zero frequency is determined byR2/R1. A higher frequency pole (C2, R2) rolls off thegain near the switching frequency. The Bode plot ofsuch a compensator is shown in Fig. 3.

Figure 3. Bode plot of a typical compensatedanalog ACMC current error amplifier. Themagnitude response (3 straight line segments)shows the low frequency high gain roll-off ofthe integrator component, the mid-bandconstant gain after the zero component, andthe high frequency roll-off due to the secondpole. The phase response (inverted bathtubshape) shows the phase boost improving thephase margin.

(Vertical: -20dB → +60db and 0° → +180°,horizontal: 1 Hz → 1 MHz)

3. ANALOG CONTROL VERSUS DIGITAL CONTROL

Analog control

The commonly listed advantages of analog controlinclude:

• relative simplicity

• lower cost

• wider bandwidth

• small delay between cause and effect

• finer resolution of time and amplitude

The commonly listed disadvantages include:

• a fixed and relatively simple functionality

• susceptibility to noise, ageing and drift

• a large number of components.

Digital control

The commonly listed advantages of digital controlinclude:

• programmability

• the possibility of intelligent, adaptive, linear ornon-linear control

• the possibility of self-calibration and self-diagnosis etc

• accuracy, reliability, repeatability

• ability to communicate with other systems

• no ageing or drift

• large noise margins.

The less commonly listed disadvantages of digitalcontrol include:

• software development is tedious, error-prone, andtime consuming, and hence expensive

• microcomputers and DSPs suffer from noiseinterference, and generate large amounts ofnoise − they rely on good layout, bypassing,shielding, ground-plane techniques, etc as doanalog systems

• sampling and quantisation result in steps in timeand amplitude, which degrade accuracy andperformance

• the hoped-for component reduction due to large-scale integration is usually lost in the number ofsupport ICs (many of which are analog) anddiscrete components

• due to the clocked, serial nature of digitalcomputers, everything they do takes time. Simplyput, the more complex the task, the longer ittakes. This time delay results in phase lag, whichdetracts from performance.

Digital controllers are typically mixed-modecontrollers. The real world is analog, and must beprocessed by analog circuitry before being digitallyprocessed. Amplifiers, summers, buffers, level-shifters, precision rectifiers, anti-aliasing filters,voltage references, sample and holds, analog to digitalconverters, digital to analog converters, final filters,etc typically require op-amps. A digitalimplementation of ACMC may require more analogcircuitry than would an analog implementation, yetcan result in lesser performance with a much highercost. The component cost of an analogimplementation, involving a few op-amps, acomparator, a 555 timer, CMOS logic, and someresistors and capacitors, may be no more than,say, $US1.50 in quantity manufacture. Thedevelopment time may be a few days. Compare this toa digital implementation. The hardware cost will beconsiderably more, coupled with the added softwarecost. The overall cost will be many times more, andthe performance worse.

Accuracy, reliability, repeatability, and freedom fromageing and drift are not necessarily intrinsic to digitalcontrollers, nor absent from analog controllers.Analog controllers depend on resistors and capacitorsin feedback networks to set gains and frequencyresponse. Components of adequate specification withtight tolerance, low drift, and a small temperaturecoefficient are available. Digital controllers generallyrequire a lot of analog support circuitry which, in turn,must be adequate for the task (and typically is).

While typical analog circuitry cannot compete withthe possible intelligence and adaptability of controlusing a digital computer, non-linear analog controlcan be very practical and cost effective. For example,consider the non-linear functions within a UnitrodeUC3854 analog power factor controller IC:multiplication, squaring, and division. A very fastfuzzy logic controller, with complex non-linearproperties, can be built from analog components.

There are many digital controllers doing good worknow in industry, for example in variable speed,variable voltage AC induction motor drives.Computers, ranging from single chip microcontrollersto advanced DSP processors, are being used by thethousands. Upon closer examination, it appears thatthese devices are not primarily being used as fast,precise compensators for good transient response, butrather as versatile, flexible, adaptive systemsupervisors. For example, generation of three-phasePWM with variable amplitude, variable frequency, isreadily done with one powerful CPU. It can also bedone well with analog ICs and discrete components.However, using a microcontroller to do this is more inthe role of a modulator rather than a compensator. Adigital PID control function is usually tacked on, toavoid using more external circuitry.

Digital computer implementations of ACMC havebeen reported. Some of these have relied on a bruteforce sampled version of the analog approach. In [5],Holme and Manning reported a digital ACMCscheme. A powerful DSP processor, combined with avery fast ADC and a digital hardware PWM module,sampled the inductor current many times perswitching period to locate the peak value. The currentsamples, along with samples of Vin and Vout wereprocessed to force the average inductor current totrack a reference. However, this takes time, and a two-switching-period delay resulted between sampling andPWM adjustment. This sampling/processing timedelay translates to a considerable phase lag, whichgreatly complicated stability issues. Of even moreconcern is the unmentioned orders of magnitudeincrease in cost and complexity of this digital copyover the analog approach, to achieve an inferior result.If the digital approach resulted in some worthwhileimprovement, then a cost-benefit analysis may justifyit.

Other forms of digital current mode control have beenproposed, such as the predictive approach; forexample, those by Holmes and Martin [6], and Gowand Manning [7]. These aim to compensate for multi-

switching period delays between parametermeasurement and control response by extrapolating toa future response from past measurements. While thispredicting of the future based on past trends may behelpful if things keep going the way they have been,like some weather forecasting approaches; such ascheme cannot compete with a fast analog controllerwhen the unexpected occurs.

4. INVERTER CONTROL INCORPORATINGGAIN SCHEDULING

When a PWM inverter is synthesizing an ACwaveform from a relatively constant DC input, theduty cycle is adjusted from near zero at the zerocrossings, to near maximum at the peaks. Dependingon the topology of the power converter chosen, thisvariation will alter the controller compensationrequirements to a greater or lesser extent. One of themost difficult to optimise is the buck-boost, or flybackDC-DC converter, used with an unfolding stage.Schlecht [8] reported the use of time varying feedbackgains to counteract the 120Hz time dependantresponse of the flyback topology when used in aninverter. The result was closed loop poles thatremained stationary, making possible sharper cusps inthe half-sine waveforms and so reduced distortion inthe current waveform.

Buck derived converters are more common at higherpower levels than buck-boost types, and lessdemanding to control. Even so, the control-to-outputtransfer function varies with duty cycle [9] andimproved inverter control can result from time varyingcompensation, as opposed to fixed parameters.

5. HYBRID ANALOG – DIGITAL ACMC

One approach to optimising performance and cost is tocombine both analog and digital techniques asappropriate. The authors are investigating a hybridACMC scheme for grid-feed inverters based on a fastanalog core for optimum tracking and regulation,combined with an economic micro-controller. Theprimary task of the latter is to generate the requiredreference, and to adjust gains and corner frequenciesby digitally controlled resistances, according tomonitored conditions, such as the operating pointwithin the AC waveform at the time, and the nature ofthe load. Such adaptive-gain-scheduling non-linearcontrol is able to improve on both the pure analog andpure digital control schemes, with minimum cost.

An example of time varying gains is shown infigure 4. The CEA gain is increased near the zerocrossings to improve the tracking of the averageinductor current, forcing it to more closely follow thesinusoidal reference, and so reducing cross-overdistortion. The slightly fuzzy trace is Vout, the smoothtrace is the sinusoidal reference. Maintaining thishigher gain throughout the entire half cycle wouldresult in sub-harmonic oscillation near the peaks, andgreater distortion. For illustration, only one step in theCEA gain is shown, for better results more steps areused.

Figure 4. Sinusoidal output voltage waveform(50Hz) of an inverter with ACMC. Regionshown is each side of the zero crossing. Thesmooth line is the sinusoidal reference. Thefuzzy line is the actual Vout waveform. Theswitched increase in the CEA gain near thezero crossing has reduced the crossoverdistortion. Vout now more closely tracks thereference in this region.

(Vertical: -10V → +10V, horizontal: 4.0 msec → 16.0 msec, zero-crossing at 10.0 msec)

6. CONCLUSIONS

Analog ACMC is superior to digital current modecontrol from the two important considerations ofspeed of response and cost. The system advantages ofdigital computers can be combined with the aboveadvantages of analog ACMC by creating a hybrid ofthe two, producing a result which is greater than thesum of the individual parts.

7. REFERENCES

[1] Fraser, M. E., and Manning, C. D, “Performanceof Average Current Mode Controlled PWMInverter with High Crest Factor Load”, PowerElectronics and Variable Speed Drives, 26-28October 1994, Conference Publication No. 399,IEE, pp. 661-666.

[2] Papathomas, T. V., and Giacopelli, J. N., “DigitalImplementation of an Average Current ControlledSwitching Regulator”, IEEE PESC, 1979, pp.155-161.

[3] O’Sullivan, D., Spruyt, H., and Crausaz, A.,“PWM Conductance Control”, IEEE PESC, 1988,pp.351-359.

[4] Dixon, L. H., “Average Current Mode Control ofSwitching Power Supplies”, Unitrode PowerSupply Design Seminar SEM-700, 1990,pp. 5-1 to 5-14.

[5] Holme, P. R., and Manning, C. D., “DigitalControl of High Frequency PWM Converters”,EPE Proceedings, Brighton, 1993, pp. 260-265.

[6] Holmes, D. G., and Martin, D. A.,“Implementation of a Direct Digital PredictiveCurrent Controller for Single and Three PhaseVoltage Source Inverters”, IEEE IAS Meeting,1996, pp. 906-913.

[7] Gow, J. A., and Manning, C. D., “Novel Fast-Acting Predictive Current Mode Controller forPower Electronic Converters”, IEE Proc.-Electr.Power Applications, Vol. 148, No. 2,March 2001, pp. 133-139.

[8] Schlecht, M. F., “Time-varying Feedback Gainsfor Power Circuits with Active Waveshaping”,IEEE PESC, 1981, pp. 52-59.

[9] Cooke, P., “Modelling Average Current ModeControl”, IEEE APEC, 2000, pp. 256-262.