~

-,-

,Digital- To-Analog Converters

current is used to directly drive a resistorload for maximum speed. but the positiveoutput voltage in this case is limited toabout + l volto

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R.2R DIA CODverterA second popolar technique for DIA conver.sion is the R-2R ladder method. As shown inFigure 4. the network consists of series re-sistors of value R and shunt resistors ofvalue 2R. The botto m of each shunt resistorhas a single-pole double-throw electronicswitch which connects the resistor to eitherground or the output current summing line.

'The operatìon of the R-2R ladder network isbased on the binarv division of current as itflows down the lad-der. Examination of theladder eonfiguration reveals that at point Alooking to the right. one measures a resis-lancI' of 2R; therefore the referenee input tolhe ladder has a resistanee of R. At the refer-l'nel' input the current splits into two equalparts sinee it sees equal resistanees in eitherdirection. Likewise. the eurrent flowing downthe ladder to the right eontinues to divideinto two equal parts at eaeh resistorjunetion.

The result is binary wei!l:hted currents flow-in~ down each shunt resistor in the ladder.The dil.:itally controlled switches direct thecurrents to either the summing line orground. Assuming ali bits are on as shownin the diagram. the output current IS

Figure 4. R.2R ladder DIA converter

IoUT= V';{F [I/.+I~+Y.+ + ~n]

which is a binary series. The sum of ali cur- Figure S. CMOS 14.BiI Multlplying,DIA Converters

rents is then

I - VREF (1-2-n )OUT- R

where the 2-. term phy~cally represents theportion of the input current t1owing throughthe 2R terminating resister to ground at thefar right. .

As in the previous circuito the cutput currentsummin~ linI.' goes to an operational ampli-fier which converts current to voltage.

The advantage of the R-2R ladder techniqueis that only two values of resistors are re-quired. with the resultant esse of matchingor trimming and excellent temperaturetracking. In addition. far high speed applica-tions relatively low resistor values can beused. Excellent results CM be obtained farhigh resolution DIA convertes by using laser-trimmed thin film resistor networks.

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"

iMultiplying and Deglitched DIA ConvertersThe R-2R ladder method is specifically usedfar multiplying type DIA converters. Withthese'converters. the reference voltage canbe varied aver the full range of -IV mu withthe output the product of the reference volt-age and the digit input word. Multiplicationcan be performed in l, 2, or 4 algebraicquadrants.

Figure 6. DIA Converter Employlng R.2R Lad,Equal Value Switched Current Sour

One other specialized type DIA converte:used primarily in CRT display systems i:the deglitched DIA converter. Ali DIA ccverters produce output spikes. or glitchewhich are most serious at the major cutI'transitions of V. FS. Il, FS. and 314 FS aslustrated in Figure 7(a).

If the reference voltage is unipolar, the cir-cuit is a one-quadrant multiplying DAC; if itis bipolar, the circuit is a two-quadrant multi-plying DAC, For four-quadrant operation thetwo current summing lines shown in Figure4 must be subtracted from each other byoperational amplifiers.

In multiplying DIA converters, the electronicswitches are usually implemented withC~IOS devices. Multiplying DAC's are com-monly used in automatic gain controls, CRTcharacter generation, complex functiongenerators, digital attenuators, and dividercircuits. Fi~re 5 shows two 14-bit multi-plying C~IOS DIA converters.

Glitches are caused by small time differebetween some current sources turning ofand others turning on. Take. far examplemajor code transition at half scale trom0111 1111 to 1000 0000. Here the MEcurrent source turns 0.\ while ali other curent sources turn oH. The small differencswitching times results in a narrow halt ~glitch. Such a glitch produces distorted cacters on CRT displays.

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-u~:r~~:':I" ',J, -iL .:' ~-- ." .': . ~~

. .~~--_.i ~l- 't- I~J,~--::-

.Figure 7. Oulpul Glilches (a} and Deglilched

DIA Converter (b)

Glitches can be virtually eliminated by thcircuit shown in Figure 7(b). The digital input to a DIA converter is controlled by anput register while the converter output gcto a specially designed sample-hold circuitWhen the digital input is updated by the Iister. the sample-hold is switched into thehold mode. After the DIA has changed tonew output value and all glitches bave seItlcd auto tbc sample-hold is then switchedback into the tracking mode. When this hpenso the output changes smoothly trom iprevious value to the new value with noglitches presento

Another important DIA eonvertcr designtakes ad,'antage of tho best features of boththe wei!';hted current source technique andthc R-2R laddcr tcchniquc. This circuit,shown in Figure 6, uses equa! valueswitched currcnt sourccs to drive thc junc-tions of thc H-2R laddor network. The advan-lago of the equal value current sources isobvious since ali cmitter resistors are identi-cal and switching speeds are a1so identica!.This tcdmiqlle is uscd in many ultra-highspeed DIA converters.

Analog- To-Oigital Converters

C<lunter Type Aro C<lnverterAnalo~-lo-di~tal converters. alga called ADC's orencoders. employ a variety of different circuittechniques lo implement the conversion function.As with DIA converters. however. relatively few ofthese circuits afe widely used lodar. Of the varioustechniques available. the choice depends on theresolution and speed required.ODe of the simplest AID converters is the counter.or sert'o. type. This circuit employs a di~talcounter to contrai the input of a DIA converter.Clock pulses afe applied to the counter and theoutput 01 the DIA is stepped up ODe LSB at a lime.

- A comparalor compares the DIA output with theanalog input and slops the-c1ock pulses when theyare equa!. The counter output is then the converteddigital word.

.-""00"P'JT

"""'AI. D AI.DUTPUT DuTI'UT~ D-

-'ACIUi,ÒLD

[0'5;ure 'lo Trac~lr'9 T;'" 'AlD Converter

While this converter is simple. it is alBO relativelyslow. An improvement on this technique is sho.wn inFigure l and is known as a tracking AID con-verter. a device commonly used in contrai systems.Bere an up-down eounter controls the DAC. and theelock pulses are directed to the pertinent eounter in-put depending on whether the DIA output must in-erease or deerease lo reaeh the analog input voltage.The obvious advantage of the traeking A/D eon-verter is that it ean continuously follow the inputsignal and give updated digital output data if thesignal does not ehange too rapidly. Aiso. far smallinput ehanges. the eonversion ean be quite fasto Theeonverter can be operated in either the track orhold modes by a digital input control.

Sucessive-Approximation AID ConvertersBy far. the most popular AID conversion techniquein generai use far moderate to high speed appli- .

cations is the successive-approximation type A/D.This met.hod falls iato a class of techniques knownasfeedbock type A/D converters. to which theCounter type also belongs. In both cases a D/Aconverter is in the feedback loop of a digital controlcircuit which changes its ouput unti! it equals theanalo!!, input. In the case of the successive-approxi-mation converter. the DAC is controlled in an op-timum manner to complete a conversion in justn-steps. where n is the resolution of the converterin bits.

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a lO bit conversion in 1 /lSf!C. or less and a 12 bitconversion in 2lJSec. or lesso 01 course the speed01 the internai circuitry. in particular the D/A and'comparator. are criticai lor hi~h speed perlormance.

The operation of this converter is analo!!'ous toweighing an unknown on a laboratory balance scaleusing slandard weights in-a binary sequence suchas l. 1/2. ~. Vs Yn kilograms. The correcl pro-cedure is lo beKin wilh lhe lar!!,est slaQdard weighland proceed in ornar down lo lhe smallesl one.The larfCest weighl is placed on the balance panfirsl;.iC it does nollip. lhe weighl is left on and lhenexllargesl weight is added. If lhe balance doestip. lhe weighl is removed and lhe nexl one added.The same procedure is used for the next largestweighl and so on down lo the smallesl. After lhenlh standard weight has beer lried and a decisionmade. lhe weighing is finished. The lotal of lhestandard weights remaining on the bal~nce is theclosest possible approximalion lo lhe unknown.

Figure

The rlback land tI:result.4-bit fin theConveat ratE4-bit CI

The Parallel (Flash I A/D ConverterFor ultra-fast conversions required in video siltJlalprocessinlt and radar applications where up to 8 bitsresolution is required. a different technique isemployed: it is known as the paral/el (also flash. orsimultaneous) method and is ilIustrated in Figure 4.

Figure 2. Successive Approximation AJD Converter

In the successive-approximation AID converterillustrated in Figure 2, a successive-approximationregister (SAR) controls the DIA converter by imple-menting the weighing logic just described. TheSAR first turns on the MSB of the DAC and the

4. 4.8il ParalIsi AlD ConverterFlgur&

This circuit employs 2"-1 analoK comparators todirectly implement the quantizer transter tunctionot an ND converter.The comparator trip-points are spaced 1 LSB apartby the series resistor chain and voltage reterence.For a given analog input voltaKe ali comparatorsbiased below the voltage turo on and ali those biasedabove it remain oli. Since ali comparators changestate simultaneously, the quantization process isa one-step operation.A second step is required. however. since the logicoutput ot the comparators is not in binary formo

comparator tests this output against the ànaloginput. A decision is made by the comparator toleave the bit on or turn it off after which bit 2 isturned on and a second comparison made. After n-comparisons the digital output of the SAR indicatesali those bits which remain on and produces thedesired digital code. The clock circuit controls thetirning of the SAR. Figure 3 shows the DIA con-verter output during a typical conversion.

The conversion efficiency of this technique meansthat high resolution ccnversions can be made in veryshort times. For example. it is possible te perform

- REF

Therefore an ultra.fast decoder circuit is emp!oyedto make the logic conversion to binary. The paralleltechnique reaches the ultimate in high speed 00.cause only two sequential operations are requiredlo make the conversion.The limitation or the method. however. is in thelarge number or comparators required foreven modoerate resolutions. A 4-bit converter. for example.requires only 15 comparators. but an 8-bitconverterneeds 255. For this reason it is common practiceto implement an 8-bit A/D with two 4-bit stagesas shown in Figure 5

OUTPVTCOO£ 10110m

Figure 3. DIA Oulpullor 8-81t SuccessiveApproxlmatlon Converslon ;.

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Figure 5. Two.Stage ParalIsi 8.8i1 AlD Converter

The result of the first 4-bit conversion is converted iback to analoj( by means of an ultra-fast 4-bit DIA

Iand then subtracted from the analoj( input. Theresultinj( residue is then converted by the second4.bit AID. and the two sets of data are accumulatedin the B-bit output rel(ister. !

Another class ol A/D converters known as inte-gratinK type operates by an indirect conversionmethod. The unknown input voltaKe is convertedinto a ti me period which is then measured by aflock and counter. A number ol variations existon the basic principle such as single-slope.dual-slope. and triple-slope methods. In additionthere is another technique -completely different-whifh is known as the charge-balancing or quantizedfeedback method.

~ . I The charKl!-balancinl{. or quantized feedback.

COUNTE~ method 01 conversion is based on the prlnclple 01

b b b b I{eneratinl{ a pulse trai n with frequency propor-tlOnal to lhe Inpul voltal{e and lhen countlnl{ the

DIGITAL DUTPUT pulses for a lixed period 01 lime. This circuit isFigure"& Dunl Sio e AJD Converter s~own in F~gure~. Except far t~e counter and. p timer. the ClrcUit LS a mltuge.to-Jrequencll (V/F)

converler which Kenerates an oulpul pulse rateDunl-Slope AID Conversion proportionallo input voltal{e.

'!'he dual-slope technique. shown in Figure 6. is The circuit operates as follows. A positive inputPerhaps best known. Conversion beRins when lhe vollaKe causes a current to flow into the operationalUnknown input voltal{e is switched to the inteKrator intewator throuKh RI' This current is intel{rated.InpUl; al the same lime lhe counler beRins to count producinK a neKalive KoinK ramp at the oulput.rlock pulses and counts up to overflow. At this Each lime lhe ramp crosses zero the comparalorPoint lhe conlrol circuil swilches the intewalor to output triKKers a precision pulse I{enerator whichlhe nl'Kalive reference vollaJ(e which is inlewaled puts oul a constant width pulsa.Untillhe oulpul is back to zero. Clock pulses ara~oun\ed durinK this lime unti I the comparatordetecls lhe zero crossinK and lurns them oH.

Figure 7. Integrator Output Wavelorm lor DualSiope AlD Converter

The counter output is then the converted dilritalword. Figure 7 shows the integrator output wave-(orm where TI is a fixed lime and T2 is a limeproportional to the input voltage. The times ararelated as (ollows:

T2 = TI ~VREF

The digital output word therefore represents theratio of the input voltage to the reference.Dual-slope conversion has severa! important fea-tures. First. conversion accurscy is independent ofthe stability of the clock and integrating capacitorso long as they &re constant during the conversionperiodo Accuracy depends only on the referenceaccurac}' and the integratorcircuit linearity. Second.the noisl.' rl'jl'ction of the converter can be infiniteif T I is st't to l'qual the perioo of the noise. Torl'jt'ct \iI) Hz pOWl'r noise therefote requires thatT, be 16.667 rn5eC. Figure 8 shows digital pane!ml'tt'rs which l'mploy duRI slope A/D converters.

The pulse output controls switch SI which connectsRloo the negative reference far the duration of thepulse. Durin!!: this lime a pulse of current flows outof thc intel1:rator summing junction. producin!!: a fastopositive ramp at the intel1:r8tor output. This processis repeated. generatin!!: a train 01 current pulseswhich exactly balances the input current-hencethe name charge balancing. This balance has thelollowin!!: relationship:

.l VIN ~r VREF R,

alo;io>=

~~(5z

Figure 8. Digilal Panel Melers Whlch Employ DualSiope A/D Converlers

Charlte-Balancinl{ A/D Conversion

Figure 10. Noise Rejeclion lor Inlegraling Type AlDConverlers

1<;

Glossary of analog-to-digital

ABSOLUTE ACCURACY: The worst-case input tooutput error 01 a data converter relerred to theNBS standard voltoACCURACY: The conformance of a measuredvalue with its true value; the maximum error ofa device such as a data converter from the truevalue. See relative accuracy and absolute accuracy.

ADe: Abbreviation {or analog-to-digital con-verter- See AI D converter.AID CONVERTER: Analog-to-digital converter.A circuit which converts an analog (continuouslvoltage or current into an output digital code.

BCD: See Binary Coded DecimaLBINARY CODE: See Natural Binary Code.BINARY CODED DECI!\IAL IBCDI: A binary codeused to represent decimai numbers in which eachdigit tram O to 9 is represented by four bitsweighted 8-4-2-1. Only lO of the 16 possible statesare used.BIPOLAR MODE: For a data converter. when theanalog signal range includes both positive andnegative values.BIPOLAROFFSET: The analoKdisplacement of onehalf of fuI! scale ranKe in a data converter operatedin the bipolar mode. The offset is Keneral!y derivedfrom the converter reference circuito

CHARGE BALANCING AlD CONVERTER: Ananalo~-to-di!{ital conversion technique which em-ploys an operational inte~rator circuit within a pulse~neratinl1; feedback loop, Current pulses from thefE!t!dback loop are precisely balanced a~ainst theanalo~ input bj' the intel1;rator. and the resultin~pulses 'are counted for a fixed period of time toproduce an output di~ital word, This technique isalso called qllantized-feedback,

CLOCK: A circuit in an A/D converter that l{ener-ates timin~ pulses which synchronize the operation01 the converter.CLOCK RATE: The frequency of the limin~ pulsesof the clock circuit in an A/D converter.

COMPANDI:\G CONVERTER: An AlD or D/Aconverter which employs a loltarithmic transferfunction to expand or compress the analoj!" siJ!"nalranlte. These converters have larj!"e effective dy-namic ranj!"es and are commonly used in diltitizedvoice communication systems.COMPLEMENTARY BINARY CODE: A binarycode which is the lo~ical complement 01 strai~ht.binary. AlIl's become O's and vice versa.CONVERSIOS TIME: The ti me required for anAlO converter to complete a sinR'le conversion tospecified resolution and linearity for a fun scaleanaloR' inl'ut chanR'e.CONVERSION RATE: The number of repelitiveA/D or D/A conversions per second far a fuI! scalechanR'e lo specified resolulion and linearily.

16

conversion Terms

COUNTER TYPE AID CONVERTER: A feedbackmethod of A/Dconversion wr~reby adili(ital counterdrives a D/A converter whicl ~nerates an outputramp which is compared with the analoK input.When the two are equal. a comparator stops thecounter and output data is ready. Also called aservo type A/D converter.

FLASH TYPE AID CONVERTER: See P,mdlelA/D Converter.

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t::,!.~

FULL SCALE RANGE fFSRI: the difference be-tween maximum and minimum analog values far anA/D converter input or D/A converter output.

GAIN ERROR: The difference in slope betweenthe actual and ideai transler lunctions far a dataconverter or other circuito It is expressed as apercent 01 analol1; maJ1;nitudeoGAINTEMPCO: The chanJ1;e inJ1;8in (orscalelactor)with temperature far a data converter or othercircuito l1;enerally expressed in ppm/oC.

DATA CONVERTER: An A/D or D/A Converter.

DATA WORD: A dil1:ital code-word that representsdata to he processed.

DlFFERENTIAL LINEARITY ERROR: The maxi.mum deviation 01 any quantum (LSB chanjte) in thetransler lunction 01 a data converter Irom itsideai size 01 FSR/2n.

HYSTERESIS ERROIl: The ~mall variation in ana-101{ transition poillts 01 an A/D converter wherebythe tran~ition leve! clepends on the direction Iromwhich it is approached. In most A/D convertersthis hysteresis is very small and is caused by theanalol{ comparator.

DIFFERENTIAL LINEARITY TEMPCO: ThechanRe in differentiallinearity error with temper-ature lor a data converter. expressed in ppm/oC 01FSR lFull Scale Ranjte).DIGITIZER: A device which converts analog intodil(ital data; an A/D converter.

INDIRECT TYPE AID CONVERTER: A class 01analog-to-digital converters which converts the un-known input voltage into a ti me period and thenmeasures this periodo

DUAL SLOPE AID CONVERTER: An indirectmethod of AlO conversion whereby an analogvoltage is converfed into a ti me period by anintegrator and reference and then measured by aclock and counter. The method is relatively slowbut capable of high accuracy.DYNAMIC ACCURACY: The tolsi error of a data

and ~

INTEGRAL LlNEARITY ERROR: The maximumdeviation of a data converter transfer function tramthe ideai straight line with offset and I(ain errorszeroed. It is generally expressed in LSB's or inpercent of FSR.INTEGRATING AID CONVERTER: One of severa!types of A/D conversion techniques whereby theanalog input is integrated with Urne. This includesdual slope. triple slope. and charge balancing typeA/D converters.

NOISnonnor olinoisetype -

NOR~a specpearirIn Ai:minedinput

OFFSjwhiehone.havaluesword l

OFFSIof anal

bipolarof FSR

OFFSEdata eo

ONE'Scode insame m

PARAIfasi me012"-]tizer. \\"is 10110\'compar;

PROPA01 A/T> ,paratorThe concaseade.

POWERchanR"e jpower SIR"enerall:PRECISducibilit,Precisio;and temIother de'-

converter or conversion system when operated atits maximum specified conversion rate or through.put rate.DYNAMIC RANGE:,The ratio of full scale range(FSR) of a data converter to the smallest differenceit can resolve. In terms 01 converter resolution:

Oynamic Ran!!,e (ORI = 2"It is general1y èxpressed in dB:

OR = 20 10!!'1o2" =6.02nwhere n is the resolution in bits.

LEAST SIGNIFICANT BIT ILSBI: The rilthtmostbit in a data converter code. The analolt size ofthe LSB can be found from the converter resolution:

LSB Size =FSR2"ENCODER: A communications term lor an A/D

converter.E.O.C.: End 01 Conversion. See Statll" Olltpllt.

where FSR is fun scale ranKe and n.is the resolutionin bits.LlNEARITY ERROR: See Integrai Linearity Errorand Differential Linearity Errar.LONG TERM STABILlTY:The variation in dataconverter accuracy due lo lime chanR'e alone. It iscommonly specified in percent per 1000 hours orper year.

FEEDBACK TYPE AID CONVERTER: A class 01analojt-to-diltital converters in which a DIA con-verter is enclosed in the leeclhack loop 01 a cliltitalcontrol circuit which chanltes the DIA output untilit equals the analolt input.

FSR: FuI! Scale Range. LOW-LEVEL MULTIPLEXING: An analol!" multi-plexinl!" system in which a low amplitude sil!"OaIis first multiplexed and then amplified.LSB: Least Sil!"nificant Bit.LSB SIZE: See Qllallillm.MAJOR CARRY: See Maj",o Transitian.

SHORT CYCLlNG: The termination of an° A/Dconversion process at a resolution less than the TWO'S COMPLEMENT CODE: A bipolar binaryCulI resolution of the converter. This results in a code in which positive and negative codes of theshorter conversion lime for reduced resolution in same magnitude sum to ali zero's plus a carry.AlD converters with a short cyclinll; capability. TWO-STAGE PARALLEL AID CONVERTER:SIGN-MAGNITUDE BCD: A hinary coded decimai An ultra-f,ast AlD conve~er in which t~o pa~allelcode in which a si){n hit is allded to distinICuish type A~D s lIre operated m casca~e to K\ve hlgherpositive from neICative in hipolar operation, resolutlon. In the usual case ~ 4-blt parallel con-SIGN-MAGNITUDE BI:-;ARY CODE: The natural verter flrst.makes a converslOn:,the resulting out-binary code to which a si,," hit is added to dis- put ,c~e ~nves an ultra-fast 4-blt D/A: the outputtinlCUish positive 'rom neICative in hipolar operation of \Il ~Ich IS su~tract.ed from the analoll; mput to form

. a resIdua!. Thls resldual then goes to a second 4SIMULTANEOUS TYPE AID CONVERTER: See bit parallel AlD. The result is an 8 bit word con-P(l/'(tl/e/7ì1l'1' A/D C"II"erter. verted in two steps.SINGLE-SI.OPE AID CONVERTER' A sim le UNIPOLAR ~ODE: In a data converter, when theA/D t t h . " h " h . Ip analog ranll;e mcludes values of one polarity onlr.

conver er ec mque m w IC a ramp vo tall;eICenerated from a voltall;e reference and intel1;rator VIDEO AID CONVERTER: An ultra-fast AlD con.is compan-d with the analoll; input..voltall;e by a verter capable of conversion rates of 5 MHz andcomparator. Tbe lime required 'or lhe ramp toequal hill;her, Resolution is usually 8 bits but can varythe input is measured by a clock and counter to dependinll; on the application. Conversion rates ofproduce the dil1;ital output word. 20 :\1Hz and hiICher lIre common.

SKIPPED CODE: See Mi..illg Code, ZERO DRIFT: The chanlCC with temperature ofanaloll; zero 'or a data converter operatinll; in theunipolar mode. Il is ICenerally expressed in Il V /oC.

ZERO ERROR: The error at analoll; zero 'or a dataconverter operatinll; in the unipolar mode.

17-