6.012 - Electronic Devices and CircuitsLecture 18 - Single Transistor Amplifier Stages - Outline

• AnnouncementsHandouts - Lecture Outline and Summary

Notes on Single Transistor AmplifiersExam 2 - Wednesday night, November 5, Room 10-250

Closed book; formula sheet provided; one crib sheet permitted• Review - Biasing and amplifier metrics

Current mirrors in emitter and source circuitsPerformance metrics: gains (voltage, current, power); input and output

resistances; power dissipation; bandwidth

• Mid-band analysisBiasing capacitors: short circuits above wLODevice capacitors: open circuits below wHIMidband: wLO < w < wHI

• Building-block stagesCommon emitter/source Common base/gateEmitter/source follower (also called common collector/drain)Series feedback (more commonly: emitter/source degeneration)Shunt feedback

Clif Fonstad, 11/03 Lecture 18 - Slide 1

LinearAmplifier

+ +

--vin

ioutiin

voutRest

ofcircuit

LinearAmplifier

+

-

itest

vtest

• Linear amplifier performance metrics:The characteristics of linear amplifiers that we use to compare

different amplifier designs, and to judge their performanceand suitability for a given application are given below:

Voltage gain, Av = vout/vinCurrent gain, Ai = iout/iinPower gain, Apower = Pout/Pin = voutiout /viniin = AvAiInput resistance, rin = vin/iin

Output resistance, rout = vtest/itest with vin = 0DC Power dissipation, PDC = (V+ - V-)(SIBIAS's)

Clif Fonstad, 11/03 Lecture 18 - Slide 2

• Linear equivalent circuits:pn diodes:

gd = q|ID|/kTCd = gdtd + Cdpl(VAB)

BJTs: (in FAR) gm = q|IC|/kT gp = gm/bFgo = |IC/VA| [or l |IC|]Cp = gmtb + Cdpl,be(VBE) [tb = wB

2/2De]Cm = Cdpl,bc(VBC)

MOSFETs: (in saturation) gm = K(VGS - VT) = (2K|ID|)1/2

gmb = hgm [h = {eSiqNA/2(|2fp| - VBS)}1/2/Cox

*]go = |ID/VA| [or l |ID|]Cgs = (2/3) WL Cox

*

Cgd: G-D fringing and overlap capacitance, all parasitic

Csb, Cgb, Cdb: depletion capacitances

Clif Fonstad, 11/03 Lecture 18 - Slide 3

+

-gp Cp

vp

b

e

Cm

gmvp go

e

c

+

- Cgs

vgs

g

s

Cgd

gmbvbs go

s

d

gmvgs

b

-

+vbs

CsbCdbCgb

+

-vds

gd Cd

b

a

• BJTs and MOSFETs biased for linear amplifier applications

IBIAS

-V

+V

IBIAS

-V

+V

IBIAS

-V

+V

IBIAS

-V

+V

npn pnp n-MOS p-MOS

Clif Fonstad, 11/03 Lecture 18 - Slide 4

V-

Q2 Q3

V+

RREFQ1

IC

• Examples of current mirror biased BJT circuits:

MOSFET MirrorIC ≈ (KQ3/KQ2) IREF

Clif Fonstad, 11/03 Lecture 18 - Slide 5

V-

V+

RREFQ1

Q2 Q3

IC

BJT MirrorIC ≈ (AQ3/AQ2) IREF

IBIAS

-V

+V

Above: Concept

Right: Implementations

Q1

A

BQ18

R1

Q5Q4Q3Q2

Q9

vIN2

+ 1.5 V

- 1.5 V

B

vIN1+-

Q6+-

Q7

Q19 B

Q12 Q13

Q21B B

Q11Q10Q8

Q20 Q22 Q24

Q15

Q16

Q17vOUT+-

B

A

Q14

Q23

R2 R3

• Looking at a complicated circuit: Lesson IFind the biasing circuitry and represent it symbolically

Consider the following example:

Clif Fonstad, 11/03 Lecture 18 - Slide 6

Circuitryprovidingthe VREF's

IBIAS1 IBIAS2 IBIAS3 IBIAS4

IBIAS5

IBIAS6

8 of the 24 transistors are "only" used for biasingthe other 16 transistors! If we get them out ofthe picture for awhile, the circuit looks simpler:

• Looking at a complicated circuit: Lesson I, cont.segregating out the biasing circuitry

Indicating the current sources symbolically lets youfocus on the action:

Clif Fonstad, 11/03 Lecture 18 - Slide 7

IBIAS1 IBIAS2 IBIAS3 IBIAS4IBIAS6

Q5Q4Q3Q2

Q9

vIN2

+ 1.5 V

- 1.5 V

vIN1+-

Q6+-

Q7Q12 Q13

Q11Q10Q8

Q15

Q16

Q17vOUT+-

Q14

R2 R3

IBIAS5

16 transistors left. In Lessons II and III we reduce thenumber to 5! Stay tuned…

• Three BJT single-transistor amplifiers

IBIAS

V-

V+

vout+

-vin+-

CE

CO

IBIAS

V-

V+

vout+

-

vIN

+

-

CO

CIIBIAS

V-

V+

vout+

-

vin+-

CO

vout

+

-vin+

-vout

+

-vin

+

-vout

+

-

vin

+

-

COMMON EMITTERInput: base

Output: collector Common: emitter

COMMON BASEInput: emitter

Output: collector Common: base

EMITT " " " "ER FOLLOWER " " " " "Input: base

Output: emitter Common: collector

Clif Fonstad, 11/03 Lecture 18 - Slide 8

vout

+

-vin+

-vout

+

-vin

+

-vout

+

-

vin

+

-

IBIAS

V-

V+

vout+

-vin+-

CE

CO

IBIAS

V-

V+

vout+

-

vin+-

CO

IBIAS

V-

V+

vout+

-

vIN

+

-

CO

CI

• Three MOSFET single-transistor amplifiers

COMMON SOURCEInput: gate

Output: drain Common: source

Substrate: to source

COMMON GATEInput: source; Output: drain

Common: gate; Substrate: to ground

SOURCE FOLLOWER " " " " "Input: gate

Output: source Common: drain

Substrate: to source

Clif Fonstad, 11/03 Lecture 18 - Slide 9

• Single-transistor amplifiers with feedback

Series feedback Shunt feedbackalso termed "emitter degeneration"

Clif Fonstad, 11/03 Lecture 18 - Slide 10

IBIAS

V-

V+

vout+

-vin+-

CE

CO

RF IBIAS

V-

V+

vout-vin

+-

CE

+CORF

vout

+

-vin+

-

RF

vout

+

-vin

+

-RF

IBIAS

V-

V+

vout+

-vin+-

CE

CO

• The "mid-band"concept: frequency range of constant gain and phase

Common emitter example:The linear equivalent circuit for the commonemitter amplifier stage on the left is drawnbelow with all of the elements included:

The capacitors are one of two types:Biasing capacitors: typically very large (in µF range)

(CO, CE, etc.) effectively shorts above some wLODevice capacitors: typically very small (in pF range) (Cp, Cm, etc.) effectively open until some wHI

Clif Fonstad, 11/03 Lecture 18 - Slide 11

gp

+

-vp

+

-

v in

v t+-

rt gmvp go

+

-

voutgLOAD

rIBIAS CE

COCm

Cp gnext

• The "mid-band"concept, cont.:At frequencies above some value (≡ wLO)The biasing capacitors look like shorts:

Clif Fonstad, 11/03 Lecture 18 - Slide 12

gp

+

-vp

+

-

v in

v t+-

rt gmvp go

+

-

voutgLOAD

rIBIAS CE

COCm

Cp gnext

At frequencies below some other value (≡ wHI)The parasitic capacitors look like open circuits:

gp

+

-vp

+

-

v in

v t+-

rt gmvp go

+

-

voutgLOAD

rIBIAS CE

COCm

Cp gnext

• The "mid-band"concept, cont.:If wLO < wHI, then there is a range where all of the capacitorsare either short circuits (the biasing capacitors) or opencircuits (the parasitics).

Clif Fonstad, 11/03 Lecture 18 - Slide 13

gp

+

-vp

+

-

v in

v t+-

rt gmvp go

+

-

voutgLOAD

rIBIAS CE

COCm

Cp gnext

We call the frequency range between wLO and wHI the "mid-band" range; for frequencies in this range our model issimply:

Valid for wLO < w< wHI, i.e. in the "mid-band" range.[where all bias capacitors are shorts and

all parasitic capacitors are open]

gl (= gLOAD+ gnext )

gp

+

-vp gmvp go

+

-v in

+

-voutv t

+-

rt

• Common emitter/source amplifiers

Commonemitter

IBIAS

V-

V+

vout+

-vin+-

CE

COMid-band LEC for common emitter

gl : conductance of "LOAD" andanything connected at "vout"

BJT MOSFETAv: -gm/(go + gl) -gm/(go + gl)

-gm(Ro||rl) -gm(Ro||rl)

Ai: -b gl/(go + gl) ∞@ -b

Rin: rp ∞

Rout: 1/go = ro 1/go = ro

A good workhorse gain stageClif Fonstad, 11/03 Lecture 18 - Slide 14

gp

+

-vp gmvp go gl

+

-v in

+

-voutv t

+-

rt

• Common base/gate amplifiers

Commongate

Mid-band LEC for common gategl : conductance of "LOAD" and anything

connected at "vout"The conductance of IBIAS can be neglected.

• A very low Rin, large Rout stage often used to complement other stages

IBIAS

V-

V+

vout+

-

vIN

+

-

CO

CIBJT MOSFET

Av: (gm+go)/(gl+go) (gm+gmb+go)/(gl+go)@ gm(rl||ro) @ (gm+gmb)(rl||ro)

Ai: (gm+go)/(gm+go+gp+gpgo/gl) 1@ 1

Rin: [gm+gp+go(gl-gm)/(gl+go)]-1 [gm+gmb+go(gl-gm-gmb)/(gl+go)]-1

@ 1/(gm+gp) = rp/(b+1) @ 1/(gm+gmb)Rout: ro[1 + (gm+go)/(gp+gt)] ro[1 + (gm+gmb+go)/gt]

@ (b+1)ro

Clif Fonstad, 11/03 Lecture 18 - Slide 15

(gm + gmb)vsg

go

+

-v in = v sg

gl

+

-voutv t

+-

rt

• Emitter/source followers

EmitterFollower

Mid-band LEC for emitter followergl : conductance of "IBIAS" andanything connected at "vout"

• A great outputbuffer stage withsmall Rout, big Rin

IBIAS

V-

V+

vout+

-

vin+-

CO

BJT MOSFET

Av: 1/[1 + (go+gl)/(gm+gp)] 1/[1 + (go+gl)/gm]@ 1 @ 1

Ai: b gl/(go+gl) ∞

Rin: 1/gp + (b+1)/(go+gl)= rp + (b+1) ro||rl ∞

Rout: [go+gl+(gm+gp)/(1 + gprt)]-1 [go+gl+gm]-1

@ (rt + rp)/(b+1) @ 1/gm

Clif Fonstad, 11/03 Lecture 18 - Slide 16

gp

+

-vp gmvp go

gl

+

-

v in

+

-vout

v t+-

rt

IBIAS

V-

V+

vout+

-vin+-

CE

CO

RF

• Series Feedback: emitter/source degeneration

Emitterdegeneration

Mid-band LEC emitter degenerationgl : conductance of "LOAD" and

anything connected at "vout"

BJT MOSFETAv: @ -rl/RF @ -rl/RF

Ai: @ b ∞

Rin: @ rp + (b+1)RF ∞

Rout: @ 1/go @ 1/go

Useful in discrete device circuit design; we use to understand common-mode gain suppression in differential amplifiers

Clif Fonstad, 11/03 Lecture 18 - Slide 17

gp

+

-vp gmvp go

gl

+

-

v in

+

-

voutv t+-

rt

RF

IBIAS

V-

V+

vout-vin

+-

CE

+CORF

• Feedback: shunt feedback elementShunt

feedback

Mid-band LEC for a shunted common-emittergl : conductance of "LOAD" and

anything connected at "vout"

BJT MOSFETAv: -(gm-GF)/(go+GF) -(gm-GF)/(go+GF)

@ -gmRF @ -gmRF

Ai: @ - gl/GF @ - gl/GF

Rin: 1/[gp +GF(1-Av)] RF/(1-Av) @ rp||RF/(1-Av)

Rout: @ (ro||RF) @ (ro||RF)

Used to stabilize high gain circuits and in transimpedance amplifiers; the same topology leads to the Miller effect "(Lec. 24).

Clif Fonstad, 11/03 Lecture 18 - Slide 18

gp

+

-vp gmvp go gl

+

-v in

+

-voutv t

+-

rt RF

• Summary of the stages (bipolar)

Clif Fonstad, 11/03 Lecture 18 - Slide 19

†

Voltagegain, Av

Currentgain, Ai

Inputresistance, Ri

Outputresistance, Ro

Common emitter -gm

go + gl[ ]= -gmrl '( ) -

b gl

go + gl[ ]rp ro =

1go

Ê

Ë Á

ˆ

¯ ˜

Common base gm

go + gl[ ]= gmrl '( ) ª1 ª

rp

b +1[ ]ª b +1[ ] ro

Emitter follower gm + gp[ ]gm + gp + go + gl[ ]

ª1 bgl

go + gl[ ]ª b rp + b +1[ ]rl ' ª

rt + rp

b +1[ ]Emitter degeneration

(series feedback) ª - rl

RF

ª b ª rp + b +1[ ]RF ª ro

Shunt feedback -gm - GF[ ]go + GF[ ]

ª -gmRF -gl

GF

1gp + GF 1- Av[ ]

ro RF =1

go + GF[ ]

Ê

Ë Á

ˆ

¯ ˜

6.012 - Electronic Devices and CircuitsLecture 18 - Single Transistor Amplifier Stages - Summary

• Mid-band analysisBiasing capacitors: typically in mF range

should/can be avoided completely in modern IC design (wLO = 0)Device capacitors: typically in pF range; goal is to make as small as possibleMidband: no capacitors in incremental analysis; gain and phase constant

want as wide as possible (we won't find wLO and wHI until Lec. 22)

• Building-block stagesCommon emitter/source: good voltage and current gain

large Rin and Rout good gain stage

Common base/gate: very small Rin; very large Rout unity current gain; good voltage gain

will find paired with other stages to form "cascode"Emitter/source follower: very small Rout; very large Rin

unity voltage gain; good current gain an excellent output stage or buffer

Series feedback: moderate voltage gain dependant on ratio of resistors

Shunt feedback: used in transimpedance amplifiersClif Fonstad, 11/03 Lecture 18 - Slide 20