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Towards an airborne high temperature SiC inverter
Ampère CNRS UMR 5005-
Dominique Bergogne, Hervé Morel,Dominique Planson, Dominique Tournier,
Pascal Bevilacqua, Bruno Allard-
Hispano-Suiza SAFRAN groupRégis Meuret, Sébastien Vieillard
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 1 / 28
Overview
1 More Electrical Aircraft2 Characterizations3 JFET gate driver4 Experimental verification5 Conclusion
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 2 / 28
More Electrical Aircraft
1 More Electrical Aircraft
2 Characterizations
3 JFET gate driver
4 Experimental verification
5 Conclusion
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 3 / 28
More Electrical Aircraft
Final target
+ 2 yearsControler + gate driver + inverter up to 200°C
Now : step Onecontrol + driver : 25°Cinverter : 200°C
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 4 / 28
More Electrical Aircraft
A severe environment
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 5 / 28
More Electrical Aircraft
Specifications
Stand-by 50 000 hours*Operation < 1000 hoursThermal cycles 15000Thermal cycle -55°C to 200°CPower range 1-50 kW*DC input +/- 270VAC output 230VCooling temperature up to 200°C
At now540VDC6ARMS per phasecooling temperature : 200°C
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 6 / 28
More Electrical Aircraft
Why SiC JFETs ?
Thermal runaway physical limits. SiC limits do not fit within this plotDominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 7 / 28
Characterizations
1 More Electrical Aircraft
2 Characterizations
3 JFET gate driver
4 Experimental verification
5 Conclusion
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 8 / 28
Characterizations
SiCED JFET
The JFET can be usedwith external free-wheel diode
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 9 / 28
Characterizations
Effect of temperature : JFET static
Measured at 225°C on one sample JFET*
Saturation current is reduced at high temperaturefrom 40A at 25°C to 25A at 225°C for this sample deviceRDSON varies from 0.2Ω to 0.6ΩDominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 10 / 28
Characterizations
Effect of temperature : JFET dynamic
Power sideTurn-Off losses are almost constant versus temperatureTurn-On losses are reduced from 900uJ to 500uJ
Control sideGate charge is not affected by temperature
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 11 / 28
Characterizations
Effect of temperature : inductance
Inductance is not affected, but losses ...
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 12 / 28
Characterizations
Effect of temperature : capacitor
Capacitance is reduced , series resistance increases (ceramic)by a factor of 3
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 13 / 28
Characterizations
Effect of temperature
ConclusionHigh Temperature requires specific components/materialsSome characteristics remain constant while ...Losses, in general, are increased at high temperature (times 10)
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 14 / 28
JFET gate driver
1 More Electrical Aircraft
2 Characterizations
3 JFET gate driver
4 Experimental verification
5 Conclusion
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 15 / 28
JFET gate driver
What do we want ?
Fast gate transients for reduced dynamic losses on the power side
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 16 / 28
JFET gate driver
Driver requirements
Set by JFET (4mm², 1200V)Maximum gate voltage : -30VPeak current : 0.5 to 1A
Set by environmentInsulation up to 1000V, high dv/dtLogic signal inputSeveral protectionsHigh temperature
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 17 / 28
JFET gate driver
Gate driver
Gate circuit principle SOI circuit bloc diagram
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 18 / 28
JFET gate driver
Normal temperature driver
The driver’s fonctions are implemented in a ’cold’ prototype
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 19 / 28
JFET gate driver
High temperature driver bloc diagram
This driver is compatible with high temperature.Currently ’under construction’Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 20 / 28
Experimental verification
1 More Electrical Aircraft
2 Characterizations
3 JFET gate driver
4 Experimental verification
5 Conclusion
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 21 / 28
Experimental verification
JFET modelling
Simulation output Experimental measurement
This is the primary result on a novel JFET model
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 22 / 28
Experimental verification
3 phase inverter under test
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 23 / 28
Experimental verification
Electrical measurements
Gate behaviourEffect of gate wiring
Power capability : 540VDC bus,15A peak current at 250°C
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 24 / 28
Experimental verification
Verification
VerifiedDriver and inverter functionsElectrical behaviour of inverter at high temperature
To be VerifiedPower losses (calorimetric/thermal measurement)Electrical behaviour of the system over full temperature rangeThermal cycling mechanical stress effects
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 25 / 28
Conclusion
1 More Electrical Aircraft
2 Characterizations
3 JFET gate driver
4 Experimental verification
5 Conclusion
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 26 / 28
Conclusion
Conclusion
What is functionnal ?Inverter power core functionnal’Cold’ Driver
To be continuedHigh temperature driverThermal range testing of the systemMechanical aspects, integration
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 27 / 28
Conclusion
Thank you for your attention.
Dominique Bergogne (Ampere-lab) PESC’08-Rhodes, June 2008 28 / 28
