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HINDUSTAN INSTITUTE OF TECHNOLOGY Gr. NOIDA(213) ELECTRONIC CIRCUIT DESIGN LAB (EEC-752) SUBMITTED BY: - SUBMITTED TO: - ASHUTOSH SRIVASTAVA Mr SANDEEP SINGH B. TECH [EC-A] (EC Deptt.) ROLL NO. – 0821331025 ASHUTOSH SRIVASTAVA

My cad lab file

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Page 1: My cad lab file

HINDUSTAN INSTITUTE OF TECHNOLOGY Gr. NOIDA(213)

ELECTRONIC CIRCUIT DESIGN

LAB

(EEC-752)

SUBMITTED BY:- SUBMITTED TO:- ASHUTOSH SRIVASTAVA Mr SANDEEP SINGH

B. TECH [EC-A] (EC Deptt.) ROLL NO. – 0821331025

EXPERIMENT NO. 1AIM: To design a c mos inverter on PSPICE and simulate it.

ASHUTOSH SRIVASTAVA

Page 2: My cad lab file

REQUIREMENT : PSPICE software.

THEORY:

CMOS is widely used in digital IC’s because of their high speed, low power dissipation and it can be operated at high voltages resulting in improved noise immunity.The inverter consists of two MOSFETs. The source of p-channel device is connected to+VDD and that of n-channel device is connected to ground. The gates of two devices areconnected as common input.Basically an inverter is an ic that inverts the input given to it

TRUTH TABLE:

CIRCUIT:

ASHUTOSH SRIVASTAVA

Page 3: My cad lab file

DSTM2:- Offtime=.5us, Ontime=.5us, Delay=0, Startval=0, oppval=1

OUTPUT:

ASHUTOSH SRIVASTAVA

Page 4: My cad lab file

EXPERIMENT NO. 2

ASHUTOSH SRIVASTAVA

Page 5: My cad lab file

AIM: To design a NAND GATE on PSPICE and simulate it.

REQUIREMENT : PSPICE software.

THEORY:

It consists of two p-channel MOSFETs connected in parallel and two n-channel MOSFETs connected in series. P-channel MOSFET is ON when gate is negative and N-channel MOSFET is ON when gate is positive. Thus when both input is low and when either of input is low, the output is high.

TRUTH TABLE :

CIRCUIT:

ASHUTOSH SRIVASTAVA

Page 6: My cad lab file

DSTM2:- Offtime=.5us, Ontime=.5us, Delay=0, Startval=0, Oppval=1

OUTPUT:

ASHUTOSH SRIVASTAVA

Page 7: My cad lab file

EXPERIMENT NO. 3ASHUTOSH SRIVASTAVA

Page 8: My cad lab file

AIM : To design a NOR GATE on PSPICE and simulate it.

REQUIREMENT : PSPICE software.

THEORY:

It consists of two p-channel MOSFETs connected in series and two n-channel MOSFETs connected in parallel. P-channel MOSFET is ON when gate is negative and N-channel MOSFET is ON when gate is positive. Thus when both inputs are high and when either of input is high, the output is low. When both the inputs are low, the output is high.

TRUTH TABLE:

CIRCUIT :

ASHUTOSH SRIVASTAVA

Page 9: My cad lab file

DSTM2:- Offtime=.5us, Ontime=.5us, Delay=0, Startval=0, oppval=1

OUTPUT:

ASHUTOSH SRIVASTAVA

Page 10: My cad lab file

EXPERIMENT NO. 4AIM: To design a differential amplifier on PSPICE and simulate it.

ASHUTOSH SRIVASTAVA

Page 11: My cad lab file

REQUIREMENT : PSPICE software.

THEORY:

A differential amplifier amplifies the difference between two voltages V1 and V2.The output of the differential amplifier is dependent on the difference between two signals and the common mode signal since it finds the difference between two inputs it can be used as a subtractor. The output of differential amplifier is

CIRCUIT:

ASHUTOSH SRIVASTAVA

Page 12: My cad lab file

FOR V1, FOR V2,

VOFF=20mV Voff=5mV

Vampl=0.5V Vampl=-0.5V

Freq=100Hz Freq=100Hz

R1=1K ,R2=10K

Formula: V0=R2/R1(V1-V2)

OUTPUT:-

ASHUTOSH SRIVASTAVA

Page 13: My cad lab file

ASHUTOSH SRIVASTAVA