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Back-end electronics assembly Ben van der Zon BlueBird Back-end electonics assembly and packaging Acive Positionning “Less is Better”

09.50 dhr van der zon

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Page 1: 09.50 dhr van der zon

Back-end electronics assembly

Ben van der Zon

BlueBirdBack-end electonics assembly and packagingAcive Positionning

“Less is Better”

Page 2: 09.50 dhr van der zon

Mikrocentrum, Eindhoven, 2010, June 8Back-end electronics assembly2

BackgroundHigh Density Integration of semiconductor systems

More Moore: more functionality per mmsquare

Beyond a few atomic diameters?

More than Moore: more functionality per mmcube

Improved performance

Autonomous smart systems:

ambient intelligence

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Mikrocentrum, Eindhoven, 2010, June 8Back-end electronics assembly3

BackgroundHigh Density Integration of semiconductor systems

Market issues• More than Moore

• Europe may take lead in number of market niches- sensing, actuating, optical, display, powering/energy

• Packaging / Back-End is becoming cost driver: • 3D stacking, LED’s, PV, SiP, etc• Smaller batches, larger flexibility required

• 20% energy savings in 2020

Market driversReliability (availability)Flexibility (smaller batches)Yield (expensive parts)Productivity (low CoO)

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Mikrocentrum, Eindhoven, 2010, June 8Back-end electronics assembly4

BackgroundHigh Density Integration of semiconductor systems

Source: University of California

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Mikrocentrum, Eindhoven, 2010, June 8Back-end electronics assembly5

Market drivers for 3D stacking of IC’s.

Form Factor Driven>2008

• Achieving the highest capacity / volume ratio

Performance driven>2010

• More than Moore• Heterogeneous integration

• Interconnect speed andreduced parasitances

• Higher production yield

Memory>2012

• Flash vs HDD•HDD roadmap is faster

than “Moore’s law”.• Stacking is extra accelerator

for flash

3D design>2016

• Full 3D design• Reducing interconnect layers• Shorter interconnect length •Limited number of repeaters

• Reduced Si real-estate

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Mikrocentrum, Eindhoven, 2010, June 8Back-end electronics assembly6

BackgroundHigh Density Integration of semiconductor elements: 3D-TSV

TSV creation

Carrier bonding

PlacingCollectivebonding

Molding

Singulation

Cleaning

Wafer thinning

Dicing

Picking

Inspection

TSV filling

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Mikrocentrum, Eindhoven, 2010, June 8Back-end electronics assembly7

General trendsrelated to packaging and assembly

•Smaller die with low I/O count (100m )•Smaller pitch and bumps (50m )•Thinner dies (10m) •Vertically integrated die

• even smaller pitches and bumps (1m )• High I/O count (> 105/cm2)

• Homogeneous (memory)• Heterogeneous (MEMS, Smart Systems)

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Mikrocentrum, Eindhoven, 2010, June 8Back-end electronics assembly8

Cost of ownership

0,00

10,00

20,00

30,00

40,00

50,00

60,00

70,00

80,00

B1 Car

rier w

afer

bon

ding

B2 Thin

ning

B3.1

Applic

ation

resis

t

B3.2

Patte

rning

B3.3

Develo

pmen

t

B3.4

DRIE e

tching

B4 TSV fil

ling

B5 UBM

& b

umpin

g

B6 W

afer

prob

ing

B7 Dici

ng

B8 Pick

, car

rier d

e-bo

nding

B9 In

spec

tion

B10 P

lace

B11 D

ie bo

nding

B12 D

icing

B13 F

lip ch

ip or

die

bond

ing

B14 E

ncap

sulat

ion

B15 S

ingula

tion

B16 E

nd in

spec

tion

& test

B17 M

arkin

g

B18 P

ackin

g

Co

st

of

Ow

ne

rsh

ip [

$/w

afe

r]

Cost of Ownership = 300 $

Cost of Ownership = 150 $

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Mikrocentrum, Eindhoven, 2010, June 8Back-end electronics assembly9

Technologies required (post front-end)

New packaging technologies•Foil (R2R)•Material deposition (additive interconnect, MID)

New packaging processes•Instantaneous on item level•Batch level

Material handling•Fast (price)•Accurate (sub micron issue)•New processes (thin die, interconnect)

New handling technologies•Silent mechatronics•In-the-loop optronics•Smart adhesion

Low costNew cost management technologies

•Yield management (in-line probing, cleaning, inspection)•Small series capability

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Mikrocentrum, Eindhoven, 2010, June 8Back-end electronics assembly10

Pick & Place state-of-the-Art

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Mikrocentrum, Eindhoven, 2010, June 8Back-end electronics assembly11

Typical P&P clycle

11

1 2 3

4

5 6 7

8

1. Move down die: 5 mm2. Place die: 20 ms3. Move op nozzle: 5 mm4. Move nozzle to source wafer: 300 mm5. Move nozzle down to source wafer: 5 mm6. Pick die: 20 ms7. Move up die: 5 mm8. Move die to target wafer: 300 mm

• p4 = 300 mm, v = 4 m/s, a = 110 m/s2, j = 3000 m/s3

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Mikrocentrum, Eindhoven, 2010, June 8Back-end electronics assembly12

Accurate and fast Pick & Place

Go ==> Look ==> Find ==> Place•No or minimal calibration

•Alignment features

•‘On the fly’ optronics

•Minimal settling times

•Optical resolution at acceptable FOV to match the <1 µm overall placement accuracy

•Adaptive and learning control solutions

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Mikrocentrum, Eindhoven, 2010, June 8Back-end electronics assembly13

Alignment for assembly

• classical alignmentCalibrates the ‘complete’ machine

• Main error contributions• Absolute accuracy of calibration targets (> 1 µm)• Rz angle errors caused by pitch, yaw, roll (≈ 2 µm)• Skew Z axis (≈ 2 µm)• Tilt during focussing (≈ 2.5 µm)• Thermal drift

• Conclusion: • Very difficult to do better than 4 µm• Concept is complex and not scalable

camera defocus

angle between cameras

amplitude

Tau

vibrations

amplitude

frequency

Tau

Reproducibility Z-axis down

X,Y repro

Rz repro

angle repro

derlay

spot stability

defocus by tilt

defocus by shift

marker - laser distance

tilt change

marker - laser dist change

die tilt

delay

Vibrations

vibrations

camera subst out of focus

Z-down movement

marker accuracy

defocus related

viewing angle

defocus

camera distance

interpolation error

distortion

defocus

die thickness variation

interpolation error

Accuracy camera

field of view

markers in view

Accuracy camera

Accuracy camera

defocus related

viewing angle

defocus

Pixel size

# of pixels per axis

vibrations

vibrations

vibrations

total

die size

defocus error

viewing angle

focus accuracy

laser angle

camera accuracy

marker accuracy

Meaurement substrate markers

interpolation error

Accuracy camera

Meaurement die markers

alignment

placement&process

distortion

field of view

markers in view

defocus related

viewing angle

camera die out of focus

substrate height variation

camera defocus

angle between cameras

interpolation error

calibration top bottom

Landing of chip

Rz reproducibility

Accuracy camera

angle between cameras

camera defocus

defocus

Accuracy camera

ref plate out of focus

die thickness variation

vibrations

vibrations

Accuracy camera

ratio resolution / pixel size

Pixel size

# of pixels per axis

Field of view

Field of view

ratio resolution / pixel size

ref plate height

camera defocus

angle between cameras

camera distance

Accuracy P&P

tilt

Placement Process

Reproducibility Z-axis up

ref plate in focus

accuracy up looking camera

camera die in focus

camera substrate in focus

tilt

viewing angle

defocus related

camera die in focus

camera die out of focus

Accuracy camera

vibrations

Page 14: 09.50 dhr van der zon

Mikrocentrum, Eindhoven, 2010, June 8Back-end electronics assembly14

Alignment conceptless is better

Simultaneous measurementOf die and substrate

• Initial placement accuracy < 10 um (3σ)

• Placement accuracy in qualification run:• Standard deviation: < 4.5 um (3σ)

• Placement accuracy on calibration unit:• Standard deviation: < 3.0 um (3σ)

• Limitation: mechanical environment

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Mikrocentrum, Eindhoven, 2010, June 8Back-end electronics assembly15

Further developments

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1-25

-20

-15

-10

-5

0

5

10

15

20

Time [s]

Bon

dhea

d 1

posi

tion

w.r

.t. fr

ame

[m

]

Bondhead 1 position w.r.t. frame due to reaction force by wafer stage making a setup of 5 mm

Roadmap•Thermal stability

•Better than 10 µm/K/m

•Mechanical stability•High jerk, a > 100 ms-2, settling time << 20 ms.•6 DOF•Balancing and control solutions•Light and designed stiffness

•Vision controlled motion•Close loop at >> 5 kHz•Implementation in P&P machine

•P&P topology for large area placement

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Mikrocentrum, Eindhoven, 2010, June 8Back-end electronics assembly16

P&P topologies

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Mikrocentrum, Eindhoven, 2010, June 8Back-end electronics assembly17

Fluid selfassembly

Tolley et al