A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Compal confidential

REV:2.0

Mobile Banias uFCBGA/uFCPGA with IntelODEM_MCH+ICH4-M core logic

Schematics Document

2003-07-09

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1701 1.0

Cover Sheet

1 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Power On/Off CKT.

File Name : LA-1701

Touch Pad

ATA-100

page 28

CRT & TV-OUT Conn.

LPC BUS

page 23

Compal confidential

uFCBGA-593

page 18

H_A#(3..31)

CardBus Controller

IDSEL:AD20(PIRQA#,GNT#2,REQ#2)

SD Connector

H_D#(0..63)

page 26

page 19

VGA Board Connector

ENE CB1410

page 14

MDC & BT Conn

page 24

page 27

Int.KBD

page 20

page 30

AGP BUS

BANK 0, 1, 2, 3

USB conn

400MHz

AD1981BHub-Link

SMsC LPC47N227

page 22

page35,36,37,38,39,40,41,42

page 21

DC/DC Interface CKT.

PARALLEL

Mobile Banias

page 30

Mini PCIsocket

page 33

USB2.0

PSB

CDROM ConnectorRJ45/11 CONN

IDSEL:AD18,AD22(PIRQC/D#,GNT#3/4,REQ#3/4)

Clock Generator

page 26

ICS 950810

page 29

RTL 8139CL+

EC I/O Buffer

Fan Control

Power Circuit DC/DC

HDDConnector

PCI BUS

Mini-PCI solt

uFCBGA-479/uFCPGA-478 CPU

IEEE 1394VT6307S

3.3V 33 MHz

page 25

IDSEL:AD17(PIRQB#,GNT#1,REQ#1)

page 28

DDR-SO-DIMM X2

IDSEL:AD16(PIRQA#,GNT#0,REQ#0)

page 31

Secondary IDE

page 34

Intel ODEM MCH-M

ATA-100

page 21

LAN

Slot 0

BIOS

page 4

2.5V DDR- 200/266

page 4,5

page 28

RTC CKT.

Audio CKT

page 12

Memory BUS(DDR)

page 13

BGA-421

page 32

AC-LINK

page 4

page 18

page 6,7,8

Intel ICH4-M

Thermal SensorADM1032AR

page 9,10,11

page 15,16,17

page 28

Super I/O

SPR CONN.

page 19

FIR

Primary IDE

EC NS87591L

page 25

*RJ45 CONN*PS2 x2 CONN*CRT CONN*LINE IN JACK*LINE OUT JACK*1394 CONN*SPDIF CONN*DVI CONN*DC JACK*TVOUT CONN*PRINTER PORT*COM PORT*USB CONN x2

AMP & Audio Jack

Power OK CKT.

page 16

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

page 31

LA-1701 1.0

Block Diagram

2 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

A

A

1 1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

IDSEL #

VIN

SMBUS

OFF

OFF

Power Plane

D

OFF

ON

+2.5V

N/AN/A

ATA 100

ON

LPC I/F

ON

AC or battery power rail for power circuit

+12V

AC97

+CPU_CORE

+3VALW

+1.25VS

S3

D31

+1.5VS

0

ON

5V power rail

AC97 MODEM

ON

1

ON

ON

3V power rail

OFF

D29

AGP_DEVSEL#

1.5V always on power rail

RTC power

OFF

4

+3V

+VCCP

OFF

ON

D8 (AD24)

A

ON

2

5V switched power rail

N/A

1 0 1 0 0 0 1 X

ON

3

+2.5VS

RTCVCC

ON

2.5V power rail for DDR

12V always on power rail

Internal PCI Devices

N/A

+1.5VALW

ON*

A2

+5V

Wireless LAN

USB

ONON

I2C / SMBUS ADDRESSING

AGP BUS

OFF

D31

C

A

ON

ON

1 0 1 0 0 0 0 X

D2

CARD BUS

A0

CLOCK GENERATOR (EXT.)

HEX

D0

D30

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

DDR SO-DIMM 1

OFF

ON

1.25V switched power rail for DDR Vtt

ON

S0-S1

OFF

ON

D6

D31

OFF

1.2V switched power rail for MCH core power

2.5V switched power rail

5V always on power rail

ON OFF

ON

OFF

ON

+12VS

3.3V always on power rail

D4

PCI Device ID

N/A

OFF

N/A

D

ADDRESS

12V power rail

ON

AD17

DEVICE

OFF

OFF

PCI Device ID

ON*

ON

ON

Description

ON*

B

Mini-PCI

OFF

+12VALW

DDR SO-DIMM 0

DEVICE

OFF

1.05V rail for Processor I/O

+1.2VS

1394

HUB

Adapter power supply (19V)

ON

AD16

ON

1 1 0 1 0 0 1 X

AD18

+5VALW

LAN

External PCI Devices

ON*

ON

N/A

ON

1.8V switched power rail for CPU PLL & Hub-Link

ETHERNET

3.3V switched power rail+3VS

N/A

REQ/GNT #

OFF

D31

D2

OFF

OFF

OFF

DEVICE

Core voltage for CPU

OFF

AD22

+5VS

OFF

PIRQ

S5

D31

D1

1.5V switched power rail for AGP interface

12Vswitched power rail on power rail

OFF

B+

Voltage Rails

AD20

ON

+1.8VS

Symbol note:

:means digital ground.

:means analog ground.

:means reserved.@

LA-1701 1.0

Notes List

3 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

Address:1001_100X

Thermal Sensor ADM1032AR

ITP700FLEX FOR BANIAS

Fan Control circuit

W=15mil

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1701 1.0

INTEL CPU BANIAS (1 of 2)

4 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

ITP_BPM#0

H_D#47

H_A#13

H_A#11

H_A#3

ITP_DBRESET#ITP_TRST#

ITP_BPM#4

H_A#12

ITP_TCK

ITP_BPM#5

H_A#14

H_REQ#4

H_D#60

H_D#44

H_D#52H_D#53

H_D#4

H_THERMDA

H_D#11

H_A#30

H_A#19

H_A#31

ITP_BPM#2

ITP_BPM#0

H_REQ#3

H_REQ#1

H_INTR

ITP_BPM#3

H_SMI#

H_A#6

TEST1

H_D#50

H_A#24

H_D#38

H_D#27

ITP_TMS

H_D#14

H_A#22

H_D#15

H_A#4

H_THERMTRIP#

H_PROCHOT#

H_CPURST#

H_CPUPWRGD

CLK_CPU_ITP#

H_REQ#0

H_D#25

H_D#41

H_THERMTRIP#

H_D#9

H_D#49

H_A#8

H_THERMDA

H_D#0

H_D#23

H_A#29

H_IERR#

H_D#42

H_REQ#[0..4]

ITP_BPM#2

ITP_TMS

H_RS#2

H_D#17

H_PROCHOT#

ITP_TMS

H_A#[3..31]

H_D#56

H_D#19

H_D#29

ITP_BPM#5

H_RS#1

H_D#1

H_A#7

H_D#24

RESETITP#

ITP_TDI

H_D#36

H_A#16ITP_BPM#1

H_THERMDC

ITP_TDO

H_D#40

H_D#21

H_A#21

H_D#48

H_D#6

H_D#13

H_D#46

ITP_BPM#3

H_RS#0

H_IGNNE#

H_D#26

ITP_BPM#1

ITP_TDO_R

H_D#32

CLK_CPUITP

H_THERMDC

H_D#33

H_A#10

H_A#28

H_D#39

ITP_TCK

H_D#22

H_A#9

H_A#25

H_D#34

H_A#5

H_A20M#

H_D#2

H_D#16

H_REQ#2

H_D#18

H_D#57

H_A#27

ITP_TRST#

ITP_TCK

TEST2

H_D#58

H_A#18

H_D#35

H_D#62

H_NMI

H_D#28

H_D#31

H_INIT#

H_D#63

H_D#54

H_A#20

ITP_DBRESET#

H_D#8

H_D#55

H_D#61

H_D#5

H_A#23

ITP_BPM#4

H_STPCLK#

H_D#12

H_D#7

H_D#10

ITP_TDI

H_A#26

H_A#17

ITP_TCK

H_D#[0..63]

H_D#30

H_D#51

H_D#59

H_D#43

H_CPUSLP#

H_D#45

H_A#15

H_D#20

H_D#3

CLK_CPU_ITP

H_D#37

ITP_TDO_R

CLK_CPUITP#

FAN1_ON

FAN1_VOUT

ITP_TDI

ITP_TRST#

H_CPURST# RESETITP# ITP_TDO

+VCCP

+VCCP

+VCCP

+3VALW

+3VS

+VCCP

+3VALW

+VCCP

+VCCP+VCCP

+VCCP

+VCCP

+5VS

+5VS

+12VS

C129

2200P_0402_25V7K

1

2

R114

@10K_0402_5%

12

C131

0.1U_0402_10V6K1

2

R11856_0402_5%

12

U13

ADM1032AR_SOP8

1

6

4 5

2

3

8

7

VDD

ALERT#

THERM# GND

D+

D-

SCLK

SDATA

JP15

53398-0310

123

ADDR GROUP

CONTROL GROUP

HOST CLK

MISC

DATA GROUP

THERMALDIODE

LEGACY CPU

BaniasU9A

mFCBGA479

P4U4V3R3V2

W1T4

W2Y4Y1U1

AA3Y3

AA2AF4AC4AC7AC3AD3AE4AD2AB4AC6AD5AE2AD6AF3AE1AF1

A19A25A22B21A24B26A21B20C20B24D24E24C26B23E23C25H23G25L23M26H24F25G24J23M23J25L26N24M25H26N25K25Y26AA24T25U23V23R24R26R23AA23U26V24U25V26Y23AA26Y25AB25AC23AB24AC20AC22AC25AD23AE22AF23AD24AF20AE21AD21AF25AF22AF26

R2P3T2P1T1

C23K24W25AE24C22L24W24AE25

D25J26T24AD20

U3AE5

B15B14

A16A15

C2D3A3B5D1D4

C6B4

C17A18B18

N2L1J3N4L4H2K3K4A4J2

B11

H1K1L2

C8B8A9C9

A7M2B7

C19A10B10B17

E4A6

A13C12A12C5

F23C11

M3

B13

A3#A4#A5#A6#A7#A8#A9#A10#A11#A12#A13#A14#A15#A16#A17#A18#A19#A20#A21#A22#A23#A24#A25#A26#A27#A28#A29#A30#A31#

D0#D1#D2#D3#D4#D5#D6#D7#D8#D9#

D10#D11#D12#D13#D14#D15#D16#D17#D18#D19#D20#D21#D22#D23#D24#D25#D26#D27#D28#D29#D30#D31#D32#D33#D34#D35#D36#D37#D38#D39#D40#D41#D42#D43#D44#D45#D46#D47#D48#D49#D50#D51#D52#D53#D54#D55#D56#D57#D58#D59#D60#D61#D62#D63#

REQ0#REQ1#REQ2#REQ3#REQ4#

DSTBN0#DSTBN1#DSTBN2#DSTBN3#DSTBP0#DSTBP1#DSTBP2#DSTBP3#

DINV0#DINV1#DINV2#DINV3#

ADSTB0#ADSTB1#

BCLK0BCLK1

ITP_CLK0ITP_CLK1

A20M#FERR#

IGNNE#INIT#

LINT0/INTRLINT1/NMI

STPCLK#SMI#

THERMTRIP#THERMDCTHERMDA

ADS#BNR#BPRI#BR0#DEFER#DRDY#HIT#HITM#IERR#LOCK#RESET#

RS0#RS1#RS2#

BPM0#BPM1#BPM2#BPM3#

DBR#DBSY#DPSLP#DPWR#PRDY#PREQ#PROCHOT#

PWRGOODSLP#TCKTDITDOTEST1TEST2TMS

TRDY#

TRST#

R153@22.6_0402_1%

12

D23RB751V_SOD323

21

S

GD Q23

SI3456DV-T1_TSOP63

624

51

R110150_0402_5%

1 2

R111 0_0402_5%1 2

C439

@10000P

1

2

R10256 _0402_1%

12

C

BE

Q20@2SC2411K_SOT23

1

2

3

R120

1K_0402_5%

12

R138@0_0402_5%

R11922.6_0402_1%

12

C1391U_0603_10V6K

1 2

C145

@0.1U_0402_16V7K

1 2

R109

330_0402_5%1 2

R135 39.2_0603_1%1 2

JP29

@ITP700-FLEXCON

12573

12

11

89

101416182022

272826

2524

232119171513

46

TDITMSTCKTDOTRST#

RESET#

FBO

BCLK#BCLK

GND0GND1GND2GND3GND4GND5

VTT0VTT1VTAP

DBR#DBA#

BPM#0BPM#1BPM#2BPM#3BPM#4BPM#5

NC1NC2

R134 150_0402_1%1 2

R101330_0402_5%

1 2

Q21

MMBT3904_SOT23

2

31

U14

LM321MF_SOT23-5

1

3

52

4+

-

PG

O

R34110K_0402_5%

12

R137 0_0402_5%1 2

C448

@2200P_0603_16V7K

1 2

Q22

MMBT3904_SOT232

31

R340 7.32K_0603_1%1 2

C42210U_1206_10V4Z

1

2

C140

0.1U_0402_10V6K1

2

R149@54.9_0402_1%

12

C427@10000P

1

2

R136 0_0402_5%1 2

R154 27.4_0402_1%1 2

R10454.9_0402_1%

12

R124330_0402_5%

12

R11256_0402_5%

1 2

R105 @1K_0402_5%

R34213K_0603_1%

12

R129 680_0402_5%1 2

R107 @1K_0402_5%

R10856_0402_5%

1 2

R121330_0402_5%

1 2

H_DBSY#<6>

PROCHOT#<29>

H_A20M# <15>

H_BPRI#<6>

H_CPUPWRGD<15>

THRMTRIP# <16>

H_DINV#1 <6>H_DINV#0 <6>

H_DINV#2 <6>

H_INIT# <15>

H_D#[0..63] <6>

H_BNR#<6>

H_HIT#<6>

H_ADSTB#0<6>

H_TRDY#<6>

H_DRDY#<6>

H_DSTBP#0 <6>

EC_SMC_2 <29>

H_BR0#<6>

H_LOCK#<6>

H_DSTBN#2 <6>

H_RS#2<6>

H_DSTBP#1 <6>

H_DPSLP#<7,15>

H_INTR <15>

H_DINV#3 <6>

H_RS#0<6>

H_A#[3..31]<6>

H_HITM#<6>

H_CPURST#<6>

ITP_DBRESET#<16>

H_IGNNE# <15>

H_ADS#<6>

CLK_CPU_BCLK<12>

H_DSTBP#3 <6>

CLK_CPU_BCLK#<12>

H_CPUSLP#<15>

H_REQ#[0:4]<6>

H_FERR# <15>

MAINPWON <35,37,42>

H_DPWR#<7>

H_RS#1<6>

H_NMI <15>

H_STPCLK# <15>

H_DSTBP#2 <6>

H_DEFER#<6>

H_DSTBN#3 <6>

H_SMI# <15>

H_DSTBN#1 <6>H_DSTBN#0 <6>

H_ADSTB#1<6>

CLK_CPU_ITP#<12>CLK_CPU_ITP<12>

EN_FAN1<29>

FANSPEED1<29>

EC_SMD_2 <29>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

12m ohm/4

Resistor placed within0.5" of CPU pin.Traceshould be at least 25miles away from anyother toggling signal.

Vcc-coreDecoupling

5m ohm/35MLCC 0805 X5R3.5nH/44X220uF

ESL,nHC,uF

SPCAP,Polymer0.6nH/3535X10uF

Resistor placed within0.5" of CPU pin.Traceshould be at least 25miles away from anyother toggling signal.

ESR, mohm

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1701 1.0

INTEL CPU BANIAS (2 of 2)

5 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

VCCSENSE

GTL_REF0

VSSSENSE

COMP3

COMP0COMP1COMP2

+CPU_VCCA

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE+CPU_CORE

+VCCP

+1.8VS

+VCCP

+CPU_CORE

+CPU_CORE

+CPU_CORE

+VCCP

+CPU_VCCA

R361K_0402_1%

12

R296

27.4_0402_1%

12

R293

54.9_0402_1%

12

R56

54.9_0402_1%

12

C122

10U_1206_6.3V7K

1

2

C4910U_1206_6.3V7K

1

2

R322K_0402_1%

12

R79

0_1206_5%

1 2

R57

27.4_0402_1%

12

C356

0.01U_0402_16V7K

1

2

C9210U_1206_6.3V7K

1

2

C117

10U_1206_6.3V7K

1

2

+C564

100U_6.3V_M

1

2

C640.01U_0402_16V7K

1

2

C126

10U_1206_6.3V7K

1

2

C50

10U_1206_6.3V7K

1

2

C349

10U_1206_6.3V7K

1

2

C387

10U_1206_6.3V7K

1

2

+ C280220U_D2_2VM

1

2

C105

10U_1206_6.3V7K

1

2

C67

10U_1206_6.3V7K

1

2

R103

@1K_0402_5%

C121

10U_1206_6.3V7K

1

2

C430

0.1U_0402_16V7K

1

2

+ C281220U_D2_2VM

1

2

Banias

POWER, GROUND

U9C

mFCBGA479

T26U2U6U22U24V1V4V5V21V25W3W6W22W23W26Y2Y5Y21Y24AA1AA4AA6AA8AA10AA12AA14AA16AA18AA20AA22AA25AB3AB5AB7AB9AB11AB13AB15AB17AB19AB21AB23AB26AC2AC5AC8AC10AC12AC14AC16AC18AC21AC24AD1AD4AD7AD9AD11AD13AD15AD17AD19AD22AD25AE3AE6AE8AE10AE12AE14AE16AE18AE20AE23AE26AF2AF5AF9AF11AF13AF15AF17AF19AF21AF24

M4M5

M21M24

N3N6

N22N23N26

P2P5

P21P24R1R4R6

R22R25

T3T5

T21T23

AF18

F20F22G5

G21H6

H22J5

J21K22U5V6

V22W5

W21Y6

Y22AA5AA7AA9

AA11AA13AA15AA17AA19AA21

AB6AB8

AB10AB12AB14AB16AB18AB20AB22AC9

AC11AC13AC15AC17AC19

AD8AD10AD12AD14AD16AD18

AE9AE11AE13AE15AE17AE19

AF8AF10AF12AF14AF16

VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS

VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS

VCC

VCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCC

C431

0.1U_0402_16V7K

1

2

C363

0.1U_0402_16V7K

1

2

+ C110220U_D2_2VM

1

2

C359

0.1U_0402_16V7K

1

2

C348

0.1U_0402_16V7K

1

2

+ C62220U_D2_2VM

1

2

C3410.1U_0402_16V7K

1

2

C346

0.1U_0402_16V7K

1

2

C372

0.1U_0402_16V7K

1

2

C428

0.1U_0402_16V7K

1

2

C365

10U_1206_6.3V7K

1

2

C388

10U_1206_6.3V7K

1

2

C386

10U_1206_6.3V7K

1

2

C429

0.1U_0402_16V7K

1

2

C325

10U_1206_6.3V7K

1

2

C351

10U_1206_6.3V7K

1

2

C36410U_1206_6.3V7K

1

2

C35210U_1206_6.3V7K

1

2

C389

10U_1206_6.3V7K

1

2

C385

10U_1206_6.3V7K

1

2

C81

10U_1206_6.3V7K

1

2

C8710U_1206_6.3V7K

1

2

C72

10U_1206_6.3V7K

1

2

C324

10U_1206_6.3V7K

1

2

C350

10U_1206_6.3V7K

1

2

C68

10U_1206_6.3V7K

1

2

C69

10U_1206_6.3V7K

1

2

C70

10U_1206_6.3V7K1

2

C82

10U_1206_6.3V7K1

2

C8810U_1206_6.3V7K

1

2

C71

10U_1206_6.3V7K

1

2

C327

10U_1206_6.3V7K

1

2

C127

0.01U_0402_16V7K

1

2

R290 @54.9_0402_1%1 2

C341U_0603_10V6K

1

2

R288 @54.9_0402_1%1 2

C328

10U_1206_6.3V7K

1

2

C104

10U_1206_6.3V7K1

2

C102

10U_1206_6.3V7K1

2

Banias

POWER, GROUNG, RESERVED SIGNALS AND NC

U9B

mFCBGA479

B2AF7C14

C3

C16

E1

P25P26AB2AB1

AD26E26G1

AC1

E2F2F3G3G4H4

F26B1N1

AC26

P23W4

D10D12D14D16E11E13E15F10F12F14F16K6L5

L21M6

M22N5

N21P6

P22R5

R21T6

T22U21

AE7AF6

A2A5A8A11A14A17A20A23A26B3B6B9B12B16B19B22B25C1C4C7C10C13C15C18C21C24D2D5D7D9D11D13D15D17D19D21D23D26E3E6E8E10E12E14E16E18E20E22E25F1F4F5F7F9F11F13F15F17F19F21F24G2G6G22G23G26H3H5H21H25J1J4J6J22J24K2K5K21K23K26

D6D8

D18D20D22

E5E7E9

L3L6L22L25M1

E17E19E21

F6F8

F18

RSVDRSVDRSVDRSVD

TEST3

PSI#

COMP0COMP1COMP2COMP3

GTLREF0GTLREF1GTLREF2GTLREF3

VID0VID1VID2VID3VID4VID5

VCCA0VCCA1VCCA2VCCA3

VCCQ0VCCQ1

VCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCP

VCCSENSEVSSSENSE

VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS

VCCVCCVCCVCCVCCVCCVCCVCC

VSSVSSVSSVSSVSS

VCCVCCVCCVCCVCCVCC

C362

10U_1206_6.3V7K

1

2

C103

10U_1206_6.3V7K

1

2

C101

10U_1206_6.3V7K

1

2

C326

10U_1206_6.3V7K

1

2

C37220P_0402_50V8K

1

2

C98

0.01U_0402_16V7K

1

2

CPU_VID4<41>CPU_VID3<41>

CPU_VID0<41>

CPU_VID2<41>CPU_VID1<41>

CPU_VID5<41>

PSI#<41>

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Note:

DDRST1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

TEST MODE

MCH STRAPST2X

400 Mhz PSB

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

X1

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

Placement R308,R305close to MCH

X01

LA-1701 1.0

ODEM(1/3)

6 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

HUB_PD4

AGP_AD1

AGP_AD10

HUB_PD7

HUB_PD5

H_REQ#2

HUB_PD9

AGP_SBA2

AGP_C/BE#0

AGP_AD29

H_A#[3..31]

AGP_AD13

H_REQ#[0..4]

HUB_PD10

AGP_AD16

AGP_AD8

H_RCOMP0

AGP_ST2

AGP_AD3

AGP_AD27

AGP_SBA0

AGP_AD28

AGP_AD23

HUB_PD2

H_RS#[0..2]

AGP_ST2

AGP_AD19

HUB_PD8

H_SWNG1

AGP_AD15

AGP_AD25

H_SWNG0

HUB_PD0

H_REQ#3

AGP_SBA7

HUB_PD1

+AGPREF

AGP_AD24

H_SWNG0

AGP_C/BE#2

AGP_ST0

+AGPREF

HUB_PD3

AGP_AD12AGP_AD11

AGP_SBA3

CLK_MCH_66M

AGP_C/BE#[0..3]

AGP_AD21

AGP_AD14

AGP_SBA5

AGP_RCOMPAGP_ST1

H_RS#0

AGP_AD18

AGP_SBA1

AGP_AD30

H_RS#2AGP_SBA6

AGP_C/BE#3

AGP_AD17

AGP_AD7

H_REQ#1

AGP_AD4

AGP_SBA4

AGP_C/BE#1

HUB_PD[0..10]

AGP_AD9

AGP_AD5

H_SWNG1

H_REQ#4

H_REQ#0

MGH_GTLREF

AGP_AD6

AGP_SBA[0..7]

AGP_AD22

AGP_AD0

AGP_AD20

AGP_AD2

AGP_AD31

HUB_PD6

AGP_ST1

AGP_AD26

HUB_RCOMP

H_RS#1

H_D#[0..63]

AGP_AD[0..31]

H_RCOMP1

H_A#30

H_A#25

H_A#4

H_A#27

H_A#13

H_A#15

H_A#29

H_A#17

H_A#3

H_A#9

H_A#22

H_A#8

H_A#26

H_A#5

H_A#20

H_A#23

H_A#14

H_A#16

H_A#18

H_A#7

H_A#28

H_A#31

H_A#21

H_A#10

H_A#24

H_A#19

H_A#6

H_A#11H_A#12

H_D#49

H_D#52H_D#51

H_D#10

H_D#37

H_D#25H_D#24

H_D#56

H_D#38

H_D#7

H_D#11

H_D#30

H_D#44

H_D#57

H_D#23

H_D#47

H_D#45

H_D#22

H_D#8

H_D#26

H_D#12

H_D#17

H_D#0

H_D#46

H_D#14

H_D#60

H_D#18

H_D#15

H_D#62

H_D#42

H_D#40

H_D#3

H_D#27

H_D#16

H_D#13

H_D#9

H_D#50

H_D#20

H_D#54

H_D#31

H_D#34

H_D#4H_D#5

H_D#2

H_D#6

H_D#29

H_D#36

H_D#1

H_D#43

H_D#58

H_D#48

H_D#55

H_D#32

H_D#53

H_D#61

H_D#63

H_D#41

H_D#28

H_D#35

H_D#39

H_D#59

H_D#21

H_D#19

H_D#33

HUB_VREF

+1.5VS

+VCCP

+VCCP

+1.8VS

+VCCP

+AGPREF

+1.5VS

+1.5VS

R291@1K_0402_5%

12

C334

0.1U_0402_10V6K

1

2

Odem

HOST

U12A

RG82P4300M_FCBGA593

AA2AB5AA5AB3AB4AC5AA3AA6AE3AB7AE5AF3AC6AC3AF4AE2AG4AG2AE7AE8AH2AC7AG3AD7AH7AE6AC8AG8AG7AH3AF8AH5AC11AC12AE9AC10AE10AD9AG9AC9AE12AF10AG11AG10AH11AG12AE13AF12AG13AH13AC14AF14AG14AE14AG15AG16AG17AH15AC17AF16AE15AH17AD17AE16

U6T5R2U3R3P7T3P4P3P5R6N2N5N3J3

M3M4M5L5K3J2N6L6L2K5L3L7K4J5

U2T7R7U5T4

R5N7

K8J8

AC2AC13

AA7AD13

AD4AF6

AD11AC15

AD3AG6

AE11AC16

AD5AG5AH9

AD15

AE17M7P8AA9AB12AB16

U7V4

W2Y4Y3Y5

W3V7V3Y7V5

W7W5W6

HD#0HD#1HD#2HD#3HD#4HD#5HD#6HD#7HD#8HD#9

HD#10HD#11HD#12HD#13HD#14HD#15HD#16HD#17HD#18HD#19HD#20HD#21HD#22HD#23HD#24HD#25HD#26HD#27HD#28HD#29HD#30HD#31HD#32HD#33HD#34HD#35HD#36HD#37HD#38HD#39HD#40HD#41HD#42HD#43HD#44HD#45HD#46HD#47HD#48HD#49HD#50HD#51HD#52HD#53HD#54HD#55HD#56HD#57HD#58HD#59HD#60HD#61HD#62HD#63

HA#3HA#4HA#5HA#6HA#7HA#8HA#9HA#10HA#11HA#12HA#13HA#14HA#15HA#16HA#17HA#18HA#19HA#20HA#21HA#22HA#23HA#24HA#25HA#26HA#27HA#28HA#29HA#30HA#31

HREQ#0HREQ#1HREQ#2HREQ#3HREQ#4

HADSTB#0HADSTB#1

BCLK#BCLK

HRCOMP0HRCOMP1

HSWNG0HSWNG1

HDSTBN#0HDSTBN#1HDSTBN#2HDSTBN#3HDSTBP#0HDSTBP#1HDSTBP#2HDSTBP#3DBI#0DBI#1DBI#2DBI#3

CPURST#HVREF0HVREF1HVREF2HVREF3HVREF4

ADS#HTRDY#DRDY#DEFER#HITM#HIT#HLOCK#BR0#BNR#BPRI#DBSY#RS#0RS#1RS#2

R5527.4_0402_1%

12

R303301_0402_1%

12

R299150_0402_1%

12

R30227.4_0402_1%

12

Odem

HUB

GND

AGP

U12B

RG82P4300M_FCBGA593

R27R28T25R25T26T27U27U28V26V27T23U23T24U24U25V24Y27Y26

AA28AB25AB27AA27AB26

Y23AB23AA24AA25AB24AC25AC24AC22AD24

P25P24N27P23M26M25L28L27M27N28M24

V25V23Y25

AA23

N25N24

P27

P26

Y24W28W27W24W23W25

AG24AH25

R24

AC27R23

AC28

AH28AH27AG28AG27AE28AE27AE24AE25

AF27AF26

AE22AE23AF22

AG25AF24AG26

P22AA21AD25

M6P6T6V6Y6AB6AD6AF5AJ5A3J4L4N4R4U4W4AA4AC4AE4AJ3E1J1L1N1R1U1W1AA1AC1AE1AG1

U8W8AA8AD8AF7AJ7D5F6H6K6

AB9AD10AF9AJ9A7F8J7L8N8R8

GAD0GAD1GAD2GAD3GAD4GAD5GAD6GAD7GAD8GAD9GAD10GAD11GAD12GAD13GAD14GAD15GAD16GAD17GAD18GAD19GAD20GAD21GAD22GAD23GAD24GAD25GAD26GAD27GAD28GAD29GAD30GAD31

HI_0HI_1HI_2HI_3HI_4HI_5HI_6HI_7HI_8HI_9

HI_10

GCBE#0GCBE#1GCBE#2GCBE#3

HI_STBHI_STB#

HLRCOMP

HI_REF

GFRAME#GDEVSEL#GIRDY#GTRDY#GSTOP#GPARGREQ#GGNT#

AD_STB0

AD_STB1AD_STB#0

AD_STB#1

SBA0SBA1SBA2SBA3SBA4SBA5SBA6SBA7

SB_STBSB_STB#

RBF#WBF#PIPE#

ST0ST1ST2

66INAGPREF

GRCOMP

VSS111VSS112VSS113VSS114VSS115VSS116VSS117VSS118VSS119VSS120VSS121VSS122VSS123VSS124VSS125VSS126VSS127VSS128VSS129VSS130VSS131VSS132VSS133VSS134VSS135VSS136VSS137VSS138VSS139VSS140VSS141

VSS101VSS102VSS103VSS104VSS105VSS106VSS107VSS108VSS109VSS110

VSS91VSS92VSS93VSS94VSS95VSS96VSS97VSS98VSS99

VSS100

R315 36.5_0402_1%1 2

R77100_0402_1%

12

C3921U_0603_10V6K

1

2

C333

220P_0402_50V7K

1

2

R6649.9_0402_1%

12

C335

220P_0402_50V7K

1

2 R30036.5_0603_1%

1 2

R3081K_0402_1%

12

R3051K_0402_1%

12C381

@10P_0402_50V8K

1

2

R314@22_0402_5%

12

C3790.01U_0402_16V7K

1

2

R304301_0402_1%

12

C3400.1U_0402_16V4Z

1

2

R287@1K_0402_5%

12

R306150_0402_1%

12

R292@1K_0402_5%

12

C330

0.1U_0402_10V6K

1

2

AGP_DEVSEL#<13>

AGP_SBSTB<13>

AGP_ADSTB1<13>

H_DSTBN#0<4>

H_A#[3..31]<4>

H_HIT#<4>

AGP_REQ#<13>

H_DINV#0<4>

AGP_FRAME#<13>

H_DRDY#<4>

H_DSTBN#3<4>H_DSTBP#0<4>

AGP_IRDY#<13>

CLK_MCH_BCLK#<12>

H_BNR#<4>

AGP_GNT#<13>

AGP_ST2<13>

H_DBSY#<4>

H_ADSTB#1<4>AGP_PAR<13>

H_LOCK#<4>

AGP_TRDY#<13>

AGP_ADSTB0<13>

H_DINV#1<4>

H_DSTBP#1<4>

H_D#[0..63] <4>

H_BR0#<4>

CLK_MCH_66M<12>

AGP_ST1<13>AGP_ST0<13>

AGP_CBE#[0..3]<13>

H_DSTBN#1<4>

H_ADSTB#0<4>

AGP_RBF#<13>H_CPURST#<4>

H_TRDY#<4>

H_HITM#<4>

H_DSTBP#2<4>

AGP_STOP#<13>

H_REQ#[0..4]<4>

HUB_PD[0:10] <15>

H_BPRI#<4>

HUB_PSTRB# <15>

H_DINV#2<4>

AGP_WBF#<13>

AGP_ADSTB1#<13>

H_DINV#3<4>

AGP_ADSTB0#<13>

AGP_AD[0..31]<13>

H_ADS#<4>

AGP_SBSTB#<13>

CLK_MCH_BCLK<12>

H_DSTBN#2<4>

HUB_PSTRB <15>

H_DEFER#<4>

H_RS#[0..2]<4>

AGP_SBA[0..7]<13>

H_DSTBP#3<4>

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

NOTE:1.M_RCV# max 2Via 2.G15 to Via max=40mils 3.G14 to Via max=40mils 4.Via to Via must = 100mils +-5mils

LA-1701 1.0

ICH4-M(2/3)

7 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

DDR_MMA6

DDR_SDQ13

DDR_SDQ56

DDR_SDQ59

DDR_MMA8

DDR_SDQS2

DDR_SDQ61

DDR_SDQ11

DDR_SDQ14

DDR_SDQ52

DDR_SDQ28

DDR_SDQ53

DDR_SDQ63

DDR_SDQ31

DDR_RCOMPDDR_CB4

DDR_SDQS8

DDR_SDQ20

DDR_SDQS1

DDR_MMA10

DDR_CB3

DDR_SDQ6

DDR_MMA12

DDR_SDQ35

DDR_MMA1

DDR_SDQ16

DDR_SDQ[0..63]

DDR_SDQ4

DDR_SDQ58

DDR_SDQ1

DDR_SDQ37

DDR_MMA0

DDR_SDQ55

DDR_SDQ22

DDR_SDQ42

DDR_SDQ25

DDR_MMA3

DDR_SDQ9

DDR_MMA[0..12]

DDR_SDQ39

DDR_SDQ49

DDR_MMA5

DDR_SDQ24

DDR_SDQ2

DDR_SDQ26

DDR_CB7

DDR_CB2

DDR_SDQS7

DDR_SDQ60

DDR_SDQ0

DDR_MMA9

DDR_SDQS3

DDR_SDQ29

DDR_SDQ7

DDR_SDQ23

DDR_SDQ12

DDR_SDQ57

DDR_SDQ43

DDR_MMA7

DDR_SDQ45DDR_SDQ46

DDR_SDQ40

DDR_CB0DDR_CB1

DDR_SDQ44

DDR_SDQ47

DDR_CB5

DDR_MMA2

DDR_CB[0..7]

DDR_SDQS[0..8]

DDR_SDQ30

DDR_SDQ18

DDR_SDQ21

DDR_SDQ50

DDR_SDQ33

DDR_SDQS6

DDR_SDQS0

DDR_SDQS5DDR_SDQS4

DDR_MMA11

DDR_SDQ36

M_RCV#

DDR_SDQ19

DDR_SDQ3

DDR_CB6

DDR_SDQ54

DDR_SDQ62

DDR_SDQ38

DDR_SDQ10

DDR_SDQ51

DDR_SDQ48

DDR_SDQ27

MCH_TEST#

DDR_SDQ5

DDR_SDQ32

DDR_SDQ8

DDR_SDQ17

DDR_SDQ41

DDR_SDQ15

DDR_SDQ34

DDR_MMA4

+1.5VS

+1.25VS_SMVREF

+1.25VS

+SDREF

R91 @4.7K_0402_5%1 2

R326

30.1_0603_1%1 2

Odem

MEMORY

U12C

RG82P4300M_FCBGA593

G28F27C28E28H25G27F25B28E27C27B25C25B27D27D26E25D24E23C22E21C24B23D22B21C21D20C19D18C20E19C18E17E13C12B11C10B13C13C11D10E10C9D8E8E11B9B7C7C6D6D4B3E6B5C4E4C3D3F4F3B2C2E2G4C16D16B15C14B17C17C15D14

E12F17E16G17G18E18F19G20G19F21F13E20G21

F26C26C23B19D12

C8C5E3

E15

G22

G11

G8F11

J25

G5

G24

G25

G6

K23

K25

F5

E24

J24

G7

J23

J9J21

G23E22H23F23

E9F7F9E7

G12G13

J27H27H26

J28

G15

G14

AD26AD27

V8Y8

SDQ0SDQ1SDQ2SDQ3SDQ4SDQ5SDQ6SDQ7SDQ8SDQ9

SDQ10SDQ11SDQ12SDQ13SDQ14SDQ15SDQ16SDQ17SDQ18SDQ19SDQ20SDQ21SDQ22SDQ23SDQ24SDQ25SDQ26SDQ27SDQ28SDQ29SDQ30SDQ31SDQ32SDQ33SDQ34SDQ35SDQ36SDQ37SDQ38SDQ39SDQ40SDQ41SDQ42SDQ43SDQ44SDQ45SDQ46SDQ47SDQ48SDQ49SDQ50SDQ51SDQ52SDQ53SDQ54SDQ55SDQ56SDQ57SDQ58SDQ59SDQ60SDQ61SDQ62SDQ63SDQ64SDQ65SDQ66SDQ67SDQ68SDQ69SDQ70SDQ71

SMA0SMA1SMA2SMA3SMA4SMA5SMA6SMA7SMA8SMA9SMA10SMA11SMA12

SDQS0SDQS1SDQS2SDQS3SDQS4SDQS5SDQS6SDQS7SDQS8

RSVD2

SWE#

SCAS#SRAS#

SCK0

SCK1

SCK2

SCK3

SCK4

SCK5

SCK#0

SCK#1

SCK#2

SCK#3

SCK#4

SCK#5

SMVREF0SMVREF1

SCKE0SCKE1SCKE2SCKE3

SCS#0SCS#1SCS#2SCS#3

SBS0SBS1

RSTIN#RSVD1

TESTIN#

SMRCOMP

RCVENIN#

RCVENOUT#

NC0NC1

DPSLP#DPWR#

C4040.1U_0402_16V4Z

1

2

C4050.1U_0402_16V4Z

1

2

C4030.1U_0402_16V4Z

1

2

R328

0_0805_5%

12

DDR_CLK0<9>

DDR_CKE1<9,10>

DDR_SWE#<9,10>

DDR_CLK5#<10>

DDR_CKE3<10>

DDR_SCS#3<10>

DDR_SCAS#<9,10>

DDR_CLK4#<10>

DDR_SDQS[0..8]<9>

DDR_CLK5<10>

DDR_CB[0..7]<9>

H_DPWR#<4>

DDR_SDQ[0..63]<9>

DDR_SRAS#<9,10>

PCIRST# <13,15,19,20,21,22,25,31>

DDR_CKE0<9,10>

DDR_MMA[0..12]<9,10>

DDR_SCS#1<9,10>

H_DPSLP#<4,15>

DDR_CLK1<9>

DDR_CKE2<10>

DDR_CLK2#<9>

DDR_SCS#2<10>

DDR_SCS#0<9,10>

DDR_SBS0<9,10>

DDR_CLK0#<9>

DDR_CLK2<9>

DDR_CLK4<10>DDR_CLK3#<10>

DDR_CLK1#<9>

DDR_SBS1<9,10>

DDR_CLK3<10>

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.LA-1701 1.0

ODEM(3/3)

8 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

+VCCP

+1.5VS

+1.5VS

+1.2VS

+2.5V

+2.5V

+1.8VS

+1.2VS

+1.8VS

+1.8VS

+2.5V

+VCCP

+2.5V

C409

0.1U_0402_16V4Z

1

2

C4180.1U_0402_16V4Z

1

2

C432

0.1U_0402_16V4Z

1

2

C402

0.1U_0402_16V4Z1

2

C406

0.1U_0402_16V4Z

1

2

+C344150U_D2_6.3VM

1

2

C345

0.1U_0402_16V4Z

1

2

C371

0.1U_0402_16V4Z

1

2

C321

0.1U_0402_16V4Z

1

2

C336

0.1U_0402_16V4Z

1

2

C316

0.1U_0402_16V4Z

1

2

+C366

150U_D2_6.3VM1

2

C3060.1U_0402_16V4Z

1

2

C338

0.1U_0402_16V4Z

1

2

C347

2.2U_0805_10V6K

1

2

C374

0.01U_0402_16V7K

1

2

C3940.047U_0603_16V7K

1

2

C380

0.015U_0402_16V7K

1

2

C3670.1U_0402_16V4Z

1

2

C353

0.22U_0603_10V7K

1

2

C393

0.022U_0603_16V7K

1

2

C315

0.1U_0402_16V4Z

1

2

C311

0.1U_0402_16V4Z

1

2

+C563

100U_6.3V_M

1

2

Odem

POWER GND

U12D

RG82P4300M_FCBGA593

R29W29

AC29AG29

U26AA26AE26AJ25AD23AF23R22U22

W22AA22AB21AD21

P17N16P15R16T15U16N14P13R14U14

L29L25N26N23M22

AG23AJ23AE21AG21AJ21AB20AC19AD20AE19AF20AG19AJ19AB18AD18AF18AB14AB10

M8T8

AB8

E29J29N29U29AA29AE29A27K27AJ27E26G26J26L26R26W26AC26AF25A23F24L24M23AC23AH23D21H21J22L22N22T22V22Y22AB22AC21AD22AF21AG22AH21A19F20H19AB19AC20AD19AE20AF19AG20AH19D17H17N17R17U17AB17AC18AE18AF17AG18AJ17A15F15H15N15P16R15T16U15AB15AD16AF15AJ15D13E14H13N13P14R13T14U13AB13AD14AF13AJ13A11F12H11AB11AD12AF11AJ11D9H9

C29G29A25D25K26D23H24K24L23A21F22H22K22D19H20A17F18H18D15F16H16A13F14H14D11H12

A9F10H10D7H8K7A5E5H5J6C1G1

T17

T13

H4

G16G10G9H7G2G3H3

VCCAGP0VCCAGP1VCCAGP2VCCAGP3VCCAGP4VCCAGP5VCCAGP6VCCAGP7VCCAGP8VCCAGP9VCCAGP10VCCAGP11VCCAGP12VCCAGP13VCCAGP14VCCAGP15

VCC0VCC1VCC2VCC3VCC4VCC5VCC6VCC7VCC8VCC9

VCCHL0VCCHL1VCCHL2VCCHL3VCCHL4

VCCP0VCCP1VCCP2VCCP3VCCP4VCCP5VCCP6VCCP7VCCP8VCCP9VCCP10VCCP11VCCP12VCCP13VCCP14VCCP15VCCP16VCCP17VCCP18VCCP19

VSS0VSS1VSS2VSS3VSS4VSS5VSS6VSS7VSS8VSS9

VSS10VSS11VSS12VSS13VSS14VSS15VSS16VSS17VSS18VSS19VSS20VSS21VSS22VSS23VSS24VSS25VSS26VSS27VSS28VSS29VSS30VSS31VSS32VSS33VSS34VSS35VSS36VSS37VSS38VSS39VSS40VSS41VSS42VSS43VSS44VSS45VSS46VSS47VSS48VSS49VSS50VSS51VSS52VSS53VSS54VSS55VSS56VSS57VSS58VSS59VSS60VSS61VSS62VSS63VSS64VSS65VSS66VSS67VSS68VSS69VSS70VSS71VSS72VSS73VSS74VSS75VSS76VSS77VSS78VSS79VSS80VSS81VSS82VSS83VSS84VSS85VSS86VSS87VSS88VSS89VSS90

VCCSM0VCCSM1VCCSM2VCCSM3VCCSM4VCCSM5VCCSM6VCCSM7VCCSM8VCCSM9VCCSM10VCCSM11VCCSM12VCCSM13VCCSM14VCCSM15VCCSM16VCCSM17VCCSM18VCCSM19VCCSM20VCCSM21VCCSM22VCCSM23VCCSM24VCCSM25VCCSM26VCCSM27VCCSM28VCCSM29VCCSM30VCCSM31VCCSM32VCCSM33VCCSM34VCCSM35VCCSM36VCCSM37

VCCGA

VCCHA

ETS#

RSVD3RSVD4RSVD5RSVD6RSVD7RSVD8RSVD9

+C301150U_D2_6.3VM

1

2

C337

0.1U_0402_16V4Z

1

2

C305

0.1U_0402_16V4Z

1

2

C383

0.1U_0402_16V4Z1

2

C373

10U_1206_10V4Z

1

2

R327

10K_0603_0.5%1 2

+C357150U_D2_6.3VM

1

2

C396

0.1U_0402_16V4Z

1

2

C3840.1U_0402_16V4Z

1

2

C361

10U_1206_10V4Z

1

2

C138

22U_1206_10V4Z

1

2

C39510U_1206_10V4Z

1

2

C400

22U_1206_10V4Z1

2

C4340.1U_0402_16V4Z

1

2

C408

0.1U_0402_16V4Z

1

2

+C401

150U_D2_6.3VM

1

2

C399

0.1U_0402_16V4Z1

2

C398

0.1U_0402_16V4Z

1

2

C310

0.1U_0402_16V4Z

1

2

C410

0.1U_0402_16V4Z1

2

C417

0.1U_0402_16V4Z

1

2

C38210U_1206_10V4Z

1

2

C433

0.1U_0402_16V4Z1

2

C3680.1U_0402_16V4Z

1

2

C411

0.1U_0402_16V4Z

1

2

C419

0.1U_0402_16V4Z1

2

C413

0.1U_0402_16V4Z

1

2

C320

0.1U_0402_16V4Z

1

2

C416

0.1U_0402_16V4Z1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A ADIMM0

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LA-1701 1.0

DDR-SODIMM SLOT1

9 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

DDR_SDQ[0..63]

DDR_DQS[0..8]

DDR_DQ[0..63]

DDR_F_CB[0..7]

DDR_MMA[0..12]

DDR_SDQS[0..8]

DDR_CB[0..7]

DDR_DQS5DDR_SDQS5

DDR_SDQS7 DDR_DQS7

DDR_F_SMA1

DDR_F_SWE#

DDR_DQS5

DDR_F_SBS0

DDR_DQS7

DDR_F_SMA7

DDR_DQS8

DDR_F_SMA9

DDR_F_CB0

DDR_F_SMA3

DDR_F_CB3

DDR_F_CB2

DDR_F_SMA12

DDR_F_SMA10

DDR_DQS1

DDR_DQS6

DDR_F_CB1

DDR_DQS0

DDR_SCS#0

DDR_CKE1

DDR_F_SMA5

DDR_F_CB5

DDR_F_CB7

DDR_F_SRAS#

DDR_F_CB6

DDR_F_SMA6

DDR_CKE0

DDR_F_SMA2

DDR_F_SMA8

DDR_F_SMA4

DDR_F_SMA0

DDR_F_SMA11

DDR_F_SCAS#

DDR_F_CB4

DDR_F_SBS1

DDR_SCS#1

DDR_MMA8

DDR_SDQ19

DDR_SDQ1

DDR_SDQ9

DDR_SDQ12

DDR_SDQ0

DDR_SDQ20

DDR_SDQ2

DDR_SDQ18

DDR_SDQ10

DDR_SDQ16

DDR_SDQ5

DDR_SDQ17

DDR_SDQ4

DDR_SDQ3

DDR_SDQ15

DDR_SDQ14

DDR_SDQ8

DDR_SDQ7

DDR_SDQ13

DDR_DQ2

DDR_DQ3

DDR_DQ10

DDR_DQ7

DDR_DQ8

DDR_DQ12

DDR_DQ15

DDR_DQ4

DDR_DQ0

DDR_DQ13

DDR_DQ19

DDR_DQ17

DDR_DQ1

DDR_DQ20

DDR_DQ18

DDR_DQ5

DDR_DQ16

DDR_DQ6DDR_SDQ6

DDR_SDQ11 DDR_DQ11

DDR_DQS0DDR_SDQS0

DDR_DQS1DDR_SDQS1

DDR_DQ14DDR_DQ9

DDR_DQS2DDR_SDQS2

DDR_SDQ22 DDR_DQ22

DDR_SDQ23 DDR_DQ23

DDR_SDQ25 DDR_DQ25DDR_SDQ24 DDR_DQ24

DDR_SDQ29 DDR_DQ29

DDR_SDQ31 DDR_DQ31DDR_SDQ30 DDR_DQ30

DDR_DQ27DDR_SDQ27DDR_DQS3DDR_SDQS3

DDR_DQ37DDR_SDQ37DDR_DQ32DDR_SDQ32

DDR_SDQ35 DDR_DQ35DDR_SDQ39 DDR_DQ39

DDR_SDQS4 DDR_DQS4DDR_SDQ36 DDR_DQ36

DDR_SDQ34 DDR_DQ34DDR_DQ38DDR_SDQ38

DDR_SDQ40 DDR_DQ40DDR_SDQ44 DDR_DQ44

DDR_SDQ45 DDR_DQ45

DDR_DQ43DDR_SDQ43DDR_DQ42DDR_SDQ42

DDR_SDQ41 DDR_DQ41

DDR_SDQ46 DDR_DQ46DDR_SDQ47 DDR_DQ47

DDR_DQ49DDR_SDQ49DDR_SDQ52 DDR_DQ52

DDR_DQ51DDR_SDQ51DDR_DQ54DDR_SDQ54

DDR_DQS6DDR_SDQS6DDR_SDQ50 DDR_DQ50

DDR_DQ55DDR_SDQ55DDR_SDQ48 DDR_DQ48

DDR_SDQ56 DDR_DQ56DDR_SDQ62 DDR_DQ62

DDR_DQ58DDR_SDQ58DDR_SDQ63 DDR_DQ63

DDR_DQ60DDR_SDQ60DDR_SDQ61 DDR_DQ61

DDR_SDQ59 DDR_DQ59DDR_SDQ57 DDR_DQ57

DDR_DQ21DDR_SDQ21

DDR_SDQ26 DDR_DQ26

DDR_SDQ33 DDR_DQ33

DDR_DQ53DDR_SDQ53DDR_F_SMA0

DDR_MMA9DDR_F_SMA12

DDR_F_SMA8

DDR_MMA7

DDR_F_SMA4

DDR_F_SMA2

DDR_F_SMA10

DDR_MMA12

DDR_MMA1DDR_MMA2

DDR_F_SMA9

DDR_MMA4DDR_MMA5

DDR_F_SMA1

DDR_MMA0DDR_MMA10

DDR_F_SMA7

DDR_F_SMA5

DDR_F_SRAS#DDR_SRAS#

DDR_F_SMA11DDR_MMA11

DDR_MMA6 DDR_F_SMA6

DDR_F_SWE#DDR_SWE#DDR_F_SMA3DDR_MMA3

DDR_F_SBS1DDR_SBS1

DDR_F_SCAS#DDR_SCAS#

DDR_F_SBS0DDR_SBS0

DDR_CB0 DDR_F_CB0

DDR_F_CB7

DDR_CB6DDR_F_CB2DDR_CB2DDR_F_CB6

DDR_CB4 DDR_F_CB4DDR_F_CB5DDR_CB5

DDR_F_CB1DDR_CB1DDR_CB3 DDR_F_CB3

DDR_SDQS8 DDR_DQS8DDR_CB7

DDR_DQS3

DDR_DQS2

DDR_DQS4

DDR_DQ4DDR_DQ5DDR_DQ6DDR_DQ0

DDR_DQ1DDR_DQ3

DDR_DQ2DDR_DQ7DDR_DQ8DDR_DQ13

DDR_DQ12DDR_DQ9

DDR_DQ14DDR_DQ15DDR_DQ11DDR_DQ10

DDR_DQ16DDR_DQ20DDR_DQ17DDR_DQ21

DDR_DQ22DDR_DQ18

DDR_DQ23DDR_DQ19DDR_DQ24DDR_DQ25

DDR_DQ29DDR_DQ28

DDR_DQ26DDR_DQ27DDR_DQ30DDR_DQ31

DDR_DQ32DDR_DQ37DDR_DQ36DDR_DQ33

DDR_DQ38DDR_DQ34

DDR_DQ39DDR_DQ35DDR_DQ44DDR_DQ40

DDR_DQ41DDR_DQ45

DDR_DQ42DDR_DQ43DDR_DQ47DDR_DQ46

DDR_DQ52DDR_DQ49DDR_DQ48DDR_DQ55

DDR_DQ53DDR_DQ50

DDR_DQ54DDR_DQ51DDR_DQ63DDR_DQ58

DDR_DQ57DDR_DQ59

DDR_DQ62DDR_DQ56DDR_DQ61DDR_DQ60

DDR_SDQ28 DDR_DQ28

+2.5V

+3VS

+2.5V

+1.25VS_SDREF_R

RP23

10_4P2R_0404_5%

1 42 3

R206 10_0402_5%12

RP31

10_4P2R_0404_5%

1 42 3

RP26

10_4P2R_0404_5%

1 42 3

RP37

10_4P2R_0404_5%

1 42 3

RP57

10_4P2R_0404_5%

1 42 3

C2220.1U_0402_16V4Z

1

2

RP21

10_4P2R_0404_5%

1 42 3

RP60

10_4P2R_0404_5%

1 42 3

RP20

10_4P2R_0404_5%

1 42 3

R207 10_0402_5%12

RP48

10_4P2R_0404_5%

1 42 3

RP29

10_4P2R_0404_5%

1 42 3

RP41

10_4P2R_0404_5%

1 42 3

RP39

10_4P2R_0404_5%

1 42 3

RP46

10_4P2R_0404_5%

1 42 3

R208 10_0402_5%12

RP35

10_4P2R_0404_5%

1 42 3

RP28

10_4P2R_0404_5%

1 42 3

RP22

10_4P2R_0404_5%

1 42 3

RP19

10_4P2R_0404_5%

1 42 3

RP27

10_4P2R_0404_5%

1 42 3

R222 10_0402_5%12

RP24

10_4P2R_0404_5%

1 42 3

RP25

10_4P2R_0404_5%

1 42 3

R224 10_0402_5%12

RP32

10_4P2R_0404_5%

1 42 3

R201 10_0402_5%12

R205 10_0402_5%12

RP58

10_4P2R_0404_5%

1 42 3

RP40

10_4P2R_0404_5%

1 42 3

RP49

10_4P2R_0404_5%

1 42 3

R203 10_0402_5%12

RP52

10_4P2R_0404_5%

1 42 3

R223 10_0402_5%12

RP54

10_4P2R_0404_5%

1 42 3

RP47

10_4P2R_0404_5%

1 42 3

RP18

10_4P2R_0404_5%

1 42 3

RP45

10_4P2R_0404_5%

1 42 3

RP33

10_4P2R_0404_5%

1 42 3

RP50

10_4P2R_0404_5%

1 42 3

R202 10_0402_5%12

RP42

10_4P2R_0404_5%

1 42 3

RP44

10_4P2R_0404_5%

1 42 3

JP30

AMP1565618_1_REVERSE4.0

13579

111315171921232527293133353739

414345474951535557596163656769717375777981838587899193959799

101103105107109111113115117119121123125127129131133135137139141143

246810121416182022242628303234363840

4244464850525456586062646668707274767880828486889092949698100102104106108110112114116118120122124126128130132134136138140142144

145147149151153155157159161163165167169171173175177179181183185187189191193195197199

146148150152154156158160162164166168170172174176178180182184186188190192194196198200

VREFVSSDQ0DQ1VDDDQS0DQ2VSSDQ3DQ8VDDDQ9DQS1VSSDQ10DQ11VDDCK0CK0#VSS

DQ16DQ17VDDDQS2DQ18VSSDQ19DQ24VDDDQ25DQS3VSSDQ26DQ27VDDCB0CB1VSSDQS8CB2VDDCB3DUVSSCK2CK2#VDDCKE1DU/A13A12A9VSSA7A5A3A1VDDA10/APBA0WE#S0#DUVSSDQ32DQ33VDDDQS4DQ34VSSDQ35DQ40VDD

VREFVSSDQ4DQ5VDDDM0DQ6VSSDQ7

DQ12VDD

DQ13DM1VSS

DQ14DQ15VDDVDDVSSVSS

DQ20DQ21VDDDM2

DQ22VSS

DQ23DQ28VDD

DQ29DM3VSS

DQ30DQ31VDDCB4CB5VSSDM8CB6VDDCB7

DU/RESET#VSSVSSVDDVDD

CKE0DU/BA2

A11A8

VSSA6A4A2A0

VDDBA1

RAS#CAS#

S1#DU

VSSDQ36DQ37VDDDM4

DQ38VSS

DQ39DQ44VDD

DQ41DQS5VSSDQ42DQ43VDDVDDVSSVSSDQ48DQ49VDDDQS6DQ50VSSDQ51DQ56VDDDQ57DQS7VSSDQ58DQ59VDDSDASCLVDD_SPDVDD_ID

DQ45DM5VSS

DQ46DQ47VDD

CK1#CK1VSS

DQ52DQ53VDDDM6

DQ54VSS

DQ55DQ60VDD

DQ61DM7VSS

DQ62DQ63VDDSA0SA1SA2DU

R204 10_0402_5%12

RP53

10_4P2R_0404_5%

1 42 3

RP36

10_4P2R_0404_5%

1 42 3

RP59

10_4P2R_0404_5%

1 42 3

R200 10_0402_5%12

RP30

10_4P2R_0404_5%

1 42 3

RP55

10_4P2R_0404_5%

1 42 3

RP51

10_4P2R_0404_5%

1 42 3

RP38

10_4P2R_0404_5%

1 42 3

R221 10_0402_5%12

RP34

10_4P2R_0404_5%

1 42 3

RP56

10_4P2R_0404_5%

1 42 3

RP43

10_4P2R_0404_5%

1 42 3

DDR_CB[0..7] <7>

DDR_SDQS[0..8] <7>

DDR_SDQ[0..63] <7>

DDR_F_CB[0..7] <10>

DDR_MMA[0..12] <7,10>

DDR_DQS[0..8] <10>

DDR_DQ[0..63] <10>

SMB_DATA<10,12,15>SMB_CLK<10,12,15>

DDR_CLK0<7>DDR_CLK0#<7>

DDR_CLK2#<7>DDR_CLK2<7>

DDR_CKE1<7,10>

DDR_SCS#1 <7,10>DDR_SCS#0<7,10>

DDR_CKE0 <7,10>

DDR_CLK1# <7>DDR_CLK1 <7>

DDR_SRAS#<7,10>

DDR_SWE#<7,10>

DDR_SBS1<7,10>

DDR_SCAS#<7,10>

DDR_SBS0<7,10>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

DIMM1

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LA-1701 1.0

DDR-SODIMM SLOT1

10 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

DDR_SCS#2DDR_SCS#3

DDR_DQS4

DDR_DQS0

DDR_DQS7

DDR_DQS5

DDR_DQS3DDR_DQS2

DDR_CKE1DDR_CKE0

DDR_CKE2DDR_CKE3

DDR_CKE3

DDR_SWE#

DDR_F_CB0

DDR_SBS0

DDR_F_CB3

DDR_DQS8DDR_F_CB2

DDR_F_CB1

DDR_SCS#2

DDR_SBS1

DDR_SCAS#

DDR_F_CB5

DDR_F_CB6

DDR_F_CB7

DDR_F_CB4

DDR_SCS#3

DDR_CKE2

DDR_SRAS#

DDR_DQS[0..8]

DDR_DQ[0..63]

DDR_CB[0..7]

DDR_SDQ[0..63]

DDR_SDQS[0..8]

DDR_MMA[0..12]

DDR_F_CB[0..7]

DDR_DQS8

DDR_MMA6

DDR_MMA12

DDR_MMA7

DDR_MMA8

DDR_MMA10

DDR_MMA9

DDR_MMA3DDR_MMA5

DDR_MMA2DDR_MMA4

DDR_MMA1 DDR_MMA0

DDR_MMA11

DDR_DQS1

DDR_DQ6

DDR_DQ12

DDR_DQ14

DDR_DQ2

DDR_DQ11

DDR_DQ1

DDR_DQ4

DDR_DQS0

DDR_DQ8

DDR_DQ29

DDR_DQ24

DDR_DQS2

DDR_DQ30

DDR_DQ16DDR_DQ17

DDR_DQ23

DDR_DQ26

DDR_DQ22

DDR_DQS3

DDR_DQ44

DDR_DQ38

DDR_DQS5

DDR_DQ63

DDR_DQ47

DDR_DQ32

DDR_DQ57

DDR_DQ36

DDR_DQ41

DDR_DQ39

DDR_DQ54

DDR_DQS7

DDR_DQ42

DDR_DQS4

DDR_DQ52DDR_DQ48

DDR_DQ61

DDR_DQ53

DDR_DQ62

DDR_DQ51

DDR_DQ60

DDR_DQ49

DDR_DQ59

DDR_DQ56

DDR_DQ55

DDR_DQ58

DDR_DQ50

DDR_DQ40

DDR_DQ45

DDR_DQ34

DDR_DQ33

DDR_DQ43

DDR_DQ37

DDR_DQ46

DDR_DQ35

DDR_DQ25

DDR_DQ20

DDR_DQ5

DDR_DQ3

DDR_DQ21

DDR_DQ9

DDR_DQ19

DDR_DQ10

DDR_DQ18

DDR_DQ7

DDR_DQ28

DDR_DQ13

DDR_DQ0

DDR_DQ31DDR_DQ27

DDR_DQ15

DDR_DQ2

DDR_DQ4

DDR_DQ6

DDR_DQ5

DDR_DQ0

DDR_DQ3DDR_DQ1

DDR_DQ7

DDR_DQ19

DDR_DQ16

DDR_DQ18DDR_DQ22

DDR_DQ20

DDR_DQ23

DDR_DQ30

DDR_DQ34DDR_DQ38

DDR_DQ32

DDR_DQ31

DDR_DQ37

DDR_MMA12

DDR_MMA1

DDR_MMA9

DDR_MMA6

DDR_SCAS#

DDR_MMA10

DDR_MMA2

DDR_SWE#

DDR_MMA8

DDR_MMA5

DDR_MMA11

DDR_SRAS#

DDR_MMA7

DDR_MMA3

DDR_MMA0

DDR_SBS1DDR_SBS0

DDR_MMA4

DDR_SCS#1DDR_SCS#0

DDR_DQ21DDR_DQ17

DDR_F_CB1DDR_F_CB5

DDR_F_CB2DDR_F_CB6

DDR_F_CB0DDR_F_CB4

DDR_DQ11DDR_DQ10

DDR_DQ15DDR_DQ14

DDR_DQ13DDR_DQ8

DDR_DQ9DDR_DQ12

DDR_DQ29DDR_DQ28

DDR_DQ24DDR_DQ25

DDR_DQ27DDR_DQ26

DDR_DQ35DDR_DQ39

DDR_DQ36DDR_DQ33

DDR_DQ41DDR_DQ45

DDR_DQ43DDR_DQ42

DDR_DQ46DDR_DQ47

DDR_DQ48DDR_DQ55

DDR_DQ49DDR_DQ52

DDR_DQ50DDR_DQ53

DDR_DQ54DDR_DQ51

DDR_DQ63DDR_DQ58

DDR_DQ62DDR_DQ56

DDR_DQ57DDR_DQ59

DDR_DQ60DDR_DQ61

DDR_DQS6

DDR_DQS6

DDR_DQS1

DDR_F_CB7DDR_F_CB3

DDR_DQ40DDR_DQ44

+1.25VS+1.25VS

+3VS

+2.5V

+SDREF

+2.5V

+1.25VS_SDREF_R

+3VS

RP107

56_4P2R_0404_5%

1 42 3

RP110

56_4P2R_0404_5%

1 42 3

RP75

56_4P2R_0404_5%

1423

RP99

56_4P2R_0404_5%

1 42 3

RP103

56_4P2R_0404_5%

1 42 3

RP90

56_4P2R_0404_5%

1 42 3

RP87

56_4P2R_0404_5%

1 42 3

RP83

56_4P2R_0404_5%

1423 RP93

56 _8P4R_0804_5%

18273645

RP106

56_4P2R_0404_5%

1 42 3

R232 56_0402_5%12

RP94

56 _8P4R_0804_5%

18273645

RP76

56_4P2R_0404_5%

1423

RP98

56_4P2R_0404_5%

1 42 3

R230 56_0402_5%12

R343 0_0805_5%1 2

R233 56_0402_5%12

RP92

56_4P2R_0404_5%

1423

RP85

56_4P2R_0404_5%

1423

RP80

56_4P2R_0404_5%

1423

R231 56_0402_5%12

RP105

56_4P2R_0404_5%

1 42 3

RP63

56_4P2R_0404_5%

1423

R228 56_0402_5%12

RP78

56_4P2R_0404_5%

1423

RP88

56_4P2R_0404_5%

1 42 3

RP65

56_4P2R_0404_5%

1423

RP111

56_4P2R_0404_5%

1 42 3

RP91

56_4P2R_0404_5%

1423

RP86

56_4P2R_0404_5%

1423

RP79

56_4P2R_0404_5%

1423

R229 56_0402_5%12

R236 56_0402_5%1 2

RP104

56_4P2R_0404_5%

1 42 3

RP102

56_4P2R_0404_5%

1 42 3

R234 56_0402_5%12

RP64

56_4P2R_0404_5%

1423

RP68

56_4P2R_0404_5%

1423

RP109

56_4P2R_0404_5%

1 42 3

RP81

56_4P2R_0404_5%

1423

RP95

56 _8P4R_0804_5%

18273645

RP82

56_4P2R_0404_5%

1423

RP97

56_4P2R_0404_5%

1 42 3

RP101

56_4P2R_0404_5%

1 42 3

R235 56_0402_5%12

RP67

56 _8P4R_0804_5%

18273645

RP62

56_4P2R_0404_5%

1423

C2340.1U_0402_16V4Z

1

2

RP66

56_4P2R_0404_5%

1423

RP108

56_4P2R_0404_5%

1 42 3

JP22

AMP11376408_STANDARD5.2

13579

111315171921232527293133353739

414345474951535557596163656769717375777981838587899193959799

101103105107109111113115117119121123125127129131133135137139141143

246810121416182022242628303234363840

4244464850525456586062646668707274767880828486889092949698100102104106108110112114116118120122124126128130132134136138140142144

145147149151153155157159161163165167169171173175177179181183185187189191193195197199

146148150152154156158160162164166168170172174176178180182184186188190192194196198200

VREFVSSDQ0DQ1VDDDQS0DQ2VSSDQ3DQ8VDDDQ9DQS1VSSDQ10DQ11VDDCK0CK0#VSS

DQ16DQ17VDDDQS2DQ18VSSDQ19DQ24VDDDQ25DQS3VSSDQ26DQ27VDDCB0CB1VSSDQS8CB2VDDCB3DUVSSCK2CK2#VDDCKE1DU/A13A12A9VSSA7A5A3A1VDDA10/APBA0WE#S0#DUVSSDQ32DQ33VDDDQS4DQ34VSSDQ35DQ40VDD

VREFVSSDQ4DQ5VDDDM0DQ6VSSDQ7

DQ12VDD

DQ13DM1VSS

DQ14DQ15VDDVDDVSSVSS

DQ20DQ21VDDDM2

DQ22VSS

DQ23DQ28VDD

DQ29DM3VSS

DQ30DQ31VDDCB4CB5VSSDM8CB6VDDCB7

DU/RESET#VSSVSSVDDVDD

CKE0DU/BA2

A11A8

VSSA6A4A2A0

VDDBA1

RAS#CAS#

S1#DU

VSSDQ36DQ37VDDDM4

DQ38VSS

DQ39DQ44VDD

DQ41DQS5VSSDQ42DQ43VDDVDDVSSVSSDQ48DQ49VDDDQS6DQ50VSSDQ51DQ56VDDDQ57DQS7VSSDQ58DQ59VDDSDASCLVDD_SPDVDD_ID

DQ45DM5VSS

DQ46DQ47VDD

CK1#CK1VSS

DQ52DQ53VDDDM6

DQ54VSS

DQ55DQ60VDD

DQ61DM7VSS

DQ62DQ63VDDSA0SA1SA2DU

RP77

56_4P2R_0404_5%

1423

RP96

56_4P2R_0404_5%

1 42 3

RP100

56_4P2R_0404_5%

1 42 3

RP89

56_4P2R_0404_5%

1 42 3

RP84

56_4P2R_0404_5%

1423

RP61

56_4P2R_0404_5%

1423

SMB_DATA<9,12,15>SMB_CLK<9,12,15>

DDR_SWE#<7,9> DDR_SCAS# <7,9>DDR_SRAS# <7,9>

DDR_SDQS[0..8] <7,9>

DDR_SDQ[0..63] <7,9>

DDR_DQS[0..8] <9>

DDR_MMA[0..12] <7,9>

DDR_CB[0..7] <7,9>

DDR_F_CB[0..7] <9>

DDR_DQ[0..63] <9>

DDR_CLK3#<7>DDR_CLK3<7>

DDR_CLK5<7>DDR_CLK5#<7>

DDR_CKE3<7>

DDR_SCS#2<7> DDR_SCS#3 <7>

DDR_CLK4 <7>DDR_CLK4# <7>

DDR_CKE2 <7>

DDR_CKE0 <7,9>DDR_CKE1 <7,9>

DDR_SBS1 <7,9>DDR_SBS0 <7,9>

DDR_SCS#0 <7,9>DDR_SCS#1 <7,9>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Place one cap close to every 2 pull up resistors termination to+1.25V

Layout note :

Layout note :

Distribute as close as possible to DDR-SODIMM.

LA-1701 1.0

DDR SODIMM Decoupling

11 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

+1.25VS

+1.25VS

+2.5V

+1.25VS

+1.25VS

+2.5V

+1.25VS

+2.5V

+1.25VS

C2230.1U_0402_16V4Z

1

2

C5440.1U_0402_16V4Z

1

2

C2410.1U_0402_16V4Z

1

2

C5410.1U_0402_16V4Z

1

2

C5220.1U_0402_16V4Z

1

2

C5140.1U_0402_16V4Z

1

2

C5400.1U_0402_16V4Z

1

2

C2370.1U_0402_16V4Z

1

2

C5210.1U_0402_16V4Z

1

2

C5270.1U_0402_16V4Z

1

2

C5000.1U_0402_16V4Z

1

2

C2430.1U_0402_16V4Z

1

2

C2420.1U_0402_16V4Z

1

2

C5390.1U_0402_16V4Z

1

2

C2240.1U_0402_16V4Z

1

2

C5190.1U_0402_16V4Z

1

2

C5100.1U_0402_16V4Z

1

2

C5310.1U_0402_16V4Z

1

2

C4990.1U_0402_16V4Z

1

2

C5330.1U_0402_16V4Z

1

2

C5360.1U_0402_16V4Z

1

2

C2250.1U_0402_16V4Z

1

2

C5170.1U_0402_16V4Z

1

2

C5340.1U_0402_16V4Z

1

2

C5040.1U_0402_16V4Z

1

2

C2260.1U_0402_16V4Z

1

2

C5380.1U_0402_16V4Z

1

2

C5350.1U_0402_16V4Z

1

2

C5230.1U_0402_16V4Z

1

2

C2270.1U_0402_16V4Z

1

2

C5300.1U_0402_16V4Z

1

2

C4970.1U_0402_16V4Z

1

2

C5260.1U_0402_16V4Z

1

2

C2290.1U_0402_16V4Z

1

2

C5280.1U_0402_16V4Z

1

2

C5240.1U_0402_16V4Z

1

2

C5420.1U_0402_16V4Z

1

2

C2280.1U_0402_16V4Z

1

2

C5430.1U_0402_16V4Z

1

2

C5130.1U_0402_16V4Z

1

2

C4980.1U_0402_16V4Z

1

2

C5030.1U_0402_16V4Z

1

2

C2300.1U_0402_16V4Z

1

2

C5250.1U_0402_16V4Z

1

2

C2460.1U_0402_16V4Z

1

2

C5010.1U_0402_16V4Z

1

2

C2310.1U_0402_16V4Z

1

2

C5200.1U_0402_16V4Z

1

2

+C505150U_D2_6.3VM

1

2

C2450.1U_0402_16V4Z

1

2

C5150.1U_0402_16V4Z

1

2

C5020.1U_0402_16V4Z

1

2

+C221150U_D2_6.3VM

1

2

C5320.1U_0402_16V4Z

1

2

C5160.1U_0402_16V4Z

1

2

C5180.1U_0402_16V4Z

1

2

C2390.1U_0402_16V4Z

1

2

C5120.1U_0402_16V4Z

1

2

C2480.1U_0402_16V4Z

1

2

C2380.1U_0402_16V4Z

1

2

C2440.1U_0402_16V4Z

1

2

C2490.1U_0402_16V4Z

1

2

C2360.1U_0402_16V4Z

1

2

C2470.1U_0402_16V4Z

1

2

C5090.1U_0402_16V4Z

1

2

C2400.1U_0402_16V4Z

1

2

C5070.1U_0402_16V4Z

1

2

C5370.1U_0402_16V4Z

1

2

C5110.1U_0402_16V4Z

1

2

C5290.1U_0402_16V4Z

1

2

C5460.1U_0402_16V4Z

1

2

C5080.1U_0402_16V4Z

1

2

C5450.1U_0402_16V4Z

1

2

A

A

B

B

C

C

D

D

E

E

F

F

G

G

H

H

1 1

2 2

3 3

4 4

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

200.001100.00100.00

133.33

1

Width=40 mils

SEL1166.67

1

0166.670

133.33

SEL0

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0SEL2 CPUCLKC[0..2]

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Clock Generator

0 1

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

0

CPUCLKT[0..2]

200.000

0

0

LA-1701 1.0

Clock Generator

12 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

XTALIN

ICH_66M

PCI_PCM

PCI_SIO

PCI_LAN

CLK_MCH#

CLK_MCH

CLK_BCLK

CLK_ICH14M

CLK_ITP#

PCI_LPC

CLK_BCLK#

CLK_SD48MPCI_1394

XTALOUT

+3V_VDD

CLK_ICH48M

CLK_ITP

PCI_SD

PCI_MINI

PCI_ICH

AGP_66MMCH_66M

+3VS

+3VS

+3VS

+3VS

+3VS

+3V_CLK

+3VS

R17233_0402_5%

1 2

R15533_0402_5%

1 2

R180 33_0402_5%1 2

R15033_0402_5%

1 2

R364 475_0402_1%1 2

R139@1K_0402_5%

1 2R17049.9_0402_1%

1 2

R158 33_0402_5%1 2

L14CHB2012U121_08051 2

R173 49.9_0402_1%1 2

R178 33_0402_5%1 2

R16149.9_0402_1%1 2

U18

ICS950810CG_TSSOP56

1 8 14 19 32 37 46 50

26

4 9 15 20 31 36 41 47

273

2

405554

253453

28

43

2930

3335

42

45

44

49

48

52

51

24

232221

765

18171613121110

39

38

56

VD

D_R

EF

VD

D_P

CI_

0V

DD

_PC

I_1

VD

D_3

V66

_0V

DD

_3V

66_1

VD

D_4

8MH

ZV

DD

_CP

U_0

VD

D_C

PU

_1

VDDA

GN

D_R

EF

GN

D_P

CI_

0G

ND

_PC

I_1

GN

D_3

V66

_0G

ND

_3V

66_1

GN

D_4

8MH

ZG

ND

_IR

EF

GN

D_C

PU

VSSAXTAL_OUT

XTAL_IN

SEL2SEL1SEL0

PWR_DWN#PCI_STOP#CPU_STOP#

VTT_PWRGD#

MULT0

SDATASCLK

3V66_03V66_1/VCH_CLK

IREF

CPUCLKT2

CPU_CLKC2

CPUCLKT1

CPUCLKC1

CPUCLKT0

CPUCLKC0

3V66_5

3V66_43V66_33V66_2

PCICLK_F2PCICLK_F1PCICLK_F0

PCICLK6PCICLK5PCICLK4PCICLK3PCICLK2PCICLK1PCICLK0

48MHZ_USB

48MHZ_DOT

REF

C144

0.1U_0402_16V4Z

1

2

R167 49.9_0402_1%1 2

C186

0.1U_0402_16V4Z

1

2

R15149.9_0402_1%

1 2

C462

0.1U_0402_16V4Z

1

2

C19210U_1206_10V4Z

1

2

R156 49.9_0402_1%1 2

C471

0.1U_0402_16V4Z

1

2

C166

0.1U_0402_16V4Z

1

2

C181

0.1U_0402_16V4Z

1

2

C464

0.1U_0402_16V4Z

1

2

C184@10P_0402_50V8K

1

2

C465

0.1U_0402_16V4Z

1

2

C19110U_1206_10V4Z

1

2

R16933_0402_5%

1 2

L13CHB2012U121_08051 2

C142@10P_0402_50V8K

1

2

R185 33_0402_5%1 2R188 33_0402_5%1 2

R128 33_0402_5%1 2

R127 33_0402_5%1 2

R191 33_0402_5%1 2

C180@10P_0402_50V8K

1

2

R1401K_0402_5%

12

C187

0.1U_0402_16V4Z

1

2

R362 10K_0402_5%1 2

R164 33_0402_5%1 2

Y214.318MHZ_16PF_DSX840GA

12

R133@1K_0402_5%

12

R157 33_0402_5%1 2R126 33_0402_5%1 2

C177@10P_0402_50V8K

1

2

R171 33_0402_5%1 2

C154@10P_0402_50V8K

1 2

C151@10P_0402_50V8K

1 2

C171@10P_0402_50V8K

1

2

R186 33_0402_5%1 2

R16633_0402_5%

1 2

R16033_0402_5%

1 2

R198 10K_0402_5%1 2

R179 33_0402_5%1 2

R1321K_0402_5%

1 2

R165 33_0402_5%1 2

R366 1K_0402_5%1 2

R168 33_0402_5%1 2

G

D

S

Q29@2N7002 1N_SOT23

2

13

CLK_PCI_SD <31>

CLK_14M_SIO<22>

CLK_CPU_ITP# <4>

CLK_PCI_ICH <15>

CLK_PCI_LPC <29>

CLK_ICH_66M <15>

CLK_PCI_MINI <25>CLK_14M_CODEC<23>

SLP_S1#<16,29> CLK_CPU_BCLK# <4>

CLK_MCH_66M <6>

CLK_SD_48M<31>

CLK_ICH_14M<16>

VGATE<16,32,41>

CLK_MCH_BCLK# <6>

CLK_PCI_LAN <19>

SMB_DATA<9,10,15>

CLK_PCI_SIO <22>

CLK_CPU_ITP <4>

STP_PCI#<16>

CLK_PCI_PCM <21>

CLK_PCI_1394 <20>

CLK_ICH_48M<16>

STP_CPU#<16,41> CLK_MCH_BCLK <6>

CLK_CPU_BCLK <4>

SMB_CLK<9,10,15>

CLK_AGP_66M <13>

CLKEN#<41>

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AGP CONN

LCD POWER CIRCUIT

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1701 1.0

AGP & LCD CONN

Custom13 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

ENAVDD

ENABLT#

DISPOFF#

AGP_STOP#

AGP_SBA7

AGP_CBE#[0..3]

AGP_ADSTB1#

AGP_WBF#

DAC_BRIG

VSYNC

AGP_AD13

AGP_TRDY#

AGP_AD21

AGP_DEVSEL#

AGP_AD1

AGP_AD19

AGP_GNT#

BLUE

AGP_FRAME#

AGP_AD14

AGP_AD[0..31]

CRMA

AGP_AD29

AGP_ST0

AGP_IRDY#

AGP_AD10

AGP_SBA0

AGP_AD25

AGP_SBA6

AGP_ADSTB0#

AGP_AD7

AGP_AD31

RED

AGP_SBA5

HSYNC

AGP_AD3

AGP_ADSTB1

AGP_SBA[0..7]

INVT_PWM

LUMA

AGP_AD2

AGP_AD0

AGP_PAR

ENAVDD

AGP_SBA3

AGP_AD26

AGP_AD23

AGP_CBE#0ENABLT#

AGP_AD17

AGP_AD22

AGP_SBSTB#

AGP_AD9AGP_AD24

AGP_AD16

AGP_AD11

AGP_ST1

AGP_SBA1

AGP_SBSTB

DISPOFF#

AGP_CBE#3

AGP_CBE#2

AGP_AD6

AGP_SBA2

AGP_CBE#1

GREENAGP_AD18

AGP_AD8

COMPSAGP_AD28

AGP_ST2

AGP_AD20

AGP_REQ#

AGP_SBA4

AGP_AD27

AGP_ST[0..2]

AGP_AD12

AGP_AD4AGP_AD5

AGP_AD15AGP_AD30

AGP_RBF#

AGP_ADSTB0

LCDVDD

+3VS +1.5VS

LCDVDD

+12VALW

+3VS

+2.5VS

+12VALW

+1.8VS

+3VS

+1.5VS

+3VS

+1.5VS

+1.8VS

CPUB++

LCDVDD

CPUB++_L

+1.8VS

+2.5VS +2.5VS

C940.1U_0402_16V4Z

1

2

L6

KC FBM-L11-201209-221LMAT_08051 2

JP12

FOXCONN-100P

24681012141618202224262830323436384042444648505254565860626466687072747678808284868890

13579

1113151719212325272931333537394143454749515355575961636567697173757779818385878991 9293 9495 9697 9899 100

GND468

101214161820

GND242628303234363840

GND444648505254565860

GND646668707274767880

GND84868890

GND35791113151719GND232527293133353739GND434547495153555759GND636567697173757779GND8385878991 9293 9495 9697 98GND GND

R524.7K_0402_5%

12

C1110.1U_0402_16V4Z

1

2

C3020.1U_0402_16V4Z

1

2

R16100K_0402_5%

12

C890.1U_0402_16V4Z

1

2

R14100_0402_5%

12

G

D

S

Q72N7002 1N_SOT23

2

13

C25

0.047U_0402_16V4Z

1

2

C274.7U_0805_10V4Z

1

2

R15100K_0402_5%

12

C244.7U_0805_10V4Z

1

2

G

DS

Q8SI2302DS 1N_SOT23

2

13

JP13

FOXCONN-100P

24681012141618202224262830323436384042444648505254565860626466687072747678808284868890

13579

1113151719212325272931333537394143454749515355575961636567697173757779818385878991 9293 9495 9697 9899 100

GND468

101214161820

GND242628303234363840

GND444648505254565860

GND646668707274767880

GND84868890

GND35791113151719GND232527293133353739GND434547495153555759GND636567697173757779GND8385878991 9293 9495 9697 98GND GND

G

D

S Q52N7002 1N_SOT23

2

13

22K

22K Q6

DTC124EK_SOT23

2

13

R17

150K_0402_5%

12

G

D

S

Q152N7002 1N_SOT23

2

13

C4568P_0402_50V8J

1

2

C28

0.1U_0402_16V7K

1

2

D10

RB751V_SOD323

21BKOFF#<29>

ENABLT#<29>

COMPS<14,33>

INVT_PWM <29>

PID1<22>

VSYNC<14>

PCIRST# <7,15,19,20,21,22,25,31>

AGP_STOP# <6>

C3_STAT#<16>

AGP_DEVSEL# <6>

VB2 <16>

PID0<22>

DDCCLK<14>

AGP_AD[0..31]<6>

VB0 <16>

AGP_ST[0..2]<6>

AGP_SBA[0..7]<6>

AGP_WBF# <6>

VB1<16>

AGP_ADSTB0 <6>AGP_ADSTB1<6>

AGP_SBSTB<6>

CLK_AGP_66M<12> RED<14,33>

AGP_ADSTB1#<6>

HSYNC<14>

AGP_REQ# <6>

PID2<22>

PCI_PIRQA# <15,20>

BLUE<14,33>

AGP_PAR <6>

CRMA<14,33>

AGP_CBE#[0..3]<6>

LUMA<14,33>

SUS_STAT#<16,30>

AGP_BUSY#<16>

AGP_TRDY# <6>

AGP_IRDY# <6>

GREEN<14,33>

AGP_FRAME# <6>

DDCDATA<14>

AGP_SBSTB#<6>

AGP_ADSTB0# <6>

MSEN#<14,29,33>

AGP_GNT# <6>

AGP_RBF# <6>

PID3<22>

DAC_BRIG <29>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

W=40mils

TV-Out Connector

S-Video

CRT Connector

DDC_MD2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

Unused GATE

LA-1701 1.0

CRT & TVout Connector

14 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

COMPS_CL

RED_L

D_VSYNC_L

GREEN_L

BLUE_L

D_HSYNC_L

CRMA_CL

LUMA_CL

+3VS

+3VS

CRTVDD

CRTVDD

CRTVDD+RCRT_VCC

CRTVDD

+3VS

+5VS+3VS

+5VS

+5VS

+5VS+5VS

CF11

H18HOLEA

1

H24HOLEA

1

C15

150P_0402_50V8J

1

2

C8

270P_0402_50V7K

1

2

C256270P_0402_50V7K

1

2

H5HOLEA

1

H15HOLEA

1

D16

RB411D_SOT23

2 1

H1HOLEA

1

F1

POLYSWITCH_1A

H20HOLEA

1

D2DAN217_SOT23

2 31

H9HOLEA

1

L20FCM2012C-800_0805

1 2

R25875_0402_1%

12

D3DAN217_SOT23

2 31

D1DAN217_SOT23

2 31

L21FCM2012C-800_0805

1 2

H26HOLEA

1

C263

@22P_0402_25V8K

1

2

U43A

SN74AHCT126PWR_TSSOP14

2 3

17

14

A Y

OE

GP

JP3

S CONN._SUYIN

1234567

H3HOLEA

1

C6

100P_0402_50V8J

1

2

H13HOLEA

1

C418P_0402_50V8J

1

2

C118P_0402_50V8J

1

2

C5268P_0402_50V8K

1

2

L22FCM2012C-800_0805

1 2

H10HOLEA

1

H7HOLEA

1

R256

75_0402_1%

12

H14HOLEA

1

C2550.1U_0402_16V7K

1

2

C573

0.1U_0402_16V4Z

1

2

H25HOLEA

1

C5

10P_0402_50V8K

1

2

L19 FBM-L10-160808-300LM-T1 2

H19HOLEA

1

G

D S

Q2

BSN20_SOT23

2

1 3

C218P_0402_50V8J

1

2

D14DAN217_SOT23

2 31

H17HOLEA

1

D13DAN217_SOT23

2 31

L2 FCM1608C-121T_06031 2

G

D S

Q1

BSN20_SOT23

2

1 3

D15DAN217_SOT23

2 31

R2644.7K_0402_5%

12

U43C

SN74AHCT126PWR_TSSOP14

9 8

107

14

A Y

OE

GP

H8HOLEA

1

FM21

JP1CRT-15P

611

17

1228

1339

144

1015

5

H22HOLEA

1

FM11

C1147P_0402_50V8J

1 2

FM51

C13150P_0402_50V8J

1

2

C264@22P_0402_25V8K

1

2

CF21

FM31

C7270P_0402_50V7K

1

2

R2654.7K_0402_5%

12

R257

75_0402_1%

12

L1 FCM1608C-121T_06031 2

CF91

FM41

H2HOLEA

1

R775_0402_1%

12

FM61

CF31

H4HOLEA

1

U43D

SN74AHCT126PWR_TSSOP14

12 11

137

14

A Y

OE

GP

R8

75_0402_1%

12

CF61

C25768P_0402_50V8K

1

2

H23HOLEA

1

CF101

C14150P_0402_50V8J

1

2

R254@10K_0402_5%

12

H11HOLEA

1

CF141

C265

@22P_0402_25V8K

1

2

R2462.2K_0402_5%

12

CF51

C10

47P_0402_50V8J

1 2

C3

10P_0402_50V8K

1

2

CF81

H12HOLEA

1

R269

10K_0402_5%1 2

CF121

H16HOLEA

1

L18 FBM-L10-160808-300LM-T1 2

CF161

H21HOLEA

1

CF111

CF71

H6HOLEA

1

U43B

SN74AHCT126PWR_TSSOP14

5 6

47

14

A Y

OE

GP

L3 FCM1608C-121T_06031 2

CF151

R255@10K_0402_5%

12

CF41

C1247P_0402_50V8J

1 2

R2452.2K_0402_5%

12

R6

75_0402_1%

12

CF131

BLUE<13,33>

D_DDCCLK <33>

DDCDATA <13>

D_DDCDATA <33>

DDCCLK <13>

VSYNC<13>

HSYNC<13>

D_VSYNC <33>

LUMA<13,33>

CRMA<13,33>

RED<13,33>MSEN#<13,29,33>

GREEN<13,33>

D_HSYNC <33>

COMPS<13,33>

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

Note:R122,R123 placementcenter of MCH andICH4M

PCI Pullups

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

LA-1701 1.0

ICH4-M(1/3)

15 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

PCI_DEVSEL#

PCI_LOCK#

PCI_REQ#4

SMLINK1

PCI_AD11

PCIRST#

PCI_REQ#3

SIRQ

PCI_GNT#3

PCI_SERR#

PCI_GNT#1

HUB_PD8

PCI_PIRQC#

PCI_DEVSEL#

PCI_AD4

PCI_AD9

PCI_AD6

PCI_AD0

PCI_REQ#0

PCI_AD19PCI_AD20

SMLINK0

PCI_PIRQH#

PCI_AD16

PCI_IRDY#

APICD1

PCI_AD25

PCI_SERR#

SMB_DATA

PCI_PIRQB#

HUB_PD5

HUB_PD10

SIRQ

PCI_AD12

PCI_AD30

PCI_GNT#4

PCIRST#

PCI_AD3

PCI_AD18

PCI_AD5

PCI_AD24

PCI_FRAME#

GPI11

PCI_AD[0..31]

PCI_PIRQD#

PCI_IRDY#

PCI_AD17

PCI_PIRQA#

PCI_PIRQG#

PCI_REQA#

PCI_C/BE#3

PCI_STOP#

PCI_AD2

HUB_PD6

SMB_CLK

PCI_PIRQF#

PCI_C/BE#1

PCI_REQB#

HUB_PD1

PCI_REQ#2

CLK_ICH_66M

PCI_PIRQE#

PCI_AD7

PCI_PERR#

PCI_PIRQD#

PCI_PIRQE#

INTRUDER#

PCI_TRDY#

PCI_REQ#1

PCI_PIRQC#

PCI_STOP#

PCI_REQ#2

PIDERST#PCI_REQB#

HUB_PD9

PCI_REQA#

PCI_AD21

PCI_REQ#0

H_FERR#

APICCLK

PCI_AD13

PCI_AD22

PCI_C/BE#2

SMB_CLK

PCI_REQ#1

PCI_PIRQA#PCI_PERR#

GPI11

SD_IRQ15

SD_IRQ15

PCI_PIRQG#

PCI_FRAME#

H_FERR#

HUB_PD2

PCI_TRDY#

PCI_PIRQF#

PCI_PIRQH#

HUB_PD[0..10]

HUB_PD4

PCI_AD23

HUB_PD7

PCI_LOCK#

PCI_AD27

PCI_AD1

HUB_RCOMP_ICH

HUB_PD3

APICD0

CLK_PCI_ICH

PCI_AD26

APICCLK

PCI_AD14

PCI_REQ#4

CLK_ICH_66M

PCI_GNT#0

PCI_PIRQB#

SMLINK0

INTRUDER#

PCI_AD31

PCI_AD15

CLK_PCI_ICH

PCI_AD10

PD_IRQ14

SMB_DATA

PCI_GNT#2

HUB_PD0

PIDERST#

SMLINK1

PCI_AD28

PD_IRQ14

PCI_AD29

PCI_C/BE#0

APICD0

HUB_RCOMP_ICH

PCI_AD8

APICD1

PCI_REQ#3

SIDERST#

HUB_VREF

+3VS

+3VALW

+3VS

+3VS

+3VS

+3VS

+VCCP

HUB_VREF

+3VS

+3VS

+1.8VS

+3VS

HUB_VREF

+RTCVCC

R13136.5_0402_1%

1 2

RP9

8.2K_10P8R_1206_5%

109876

12345

PCI

I/F

SM I/F

CPU I/F

HUB I/F

Inte

rrup

t I/

F

EEPROM I/F

LAN I/F

ICH4U8A

FW82801DBM_BGA421

H5J3H3K1G5J4H4J5K2G2L1G4L2H2L3F5F4N1E5N2E3N3E4M5E2P1E1P2D3R1D2P4

J2K4M4N4

B1A2B3C7B6

C1E6A7B7D6

P5

F1M3L5G1L4

M2W2U5K5F3F2

W6AC3AB1AC4AB4AA5

Y22AB23U23AA21W21V22AB22V21Y23U22U21W23V23

L19L20M19M21P19R19T20R20P23L22N22K21

T21

P21N20

R23M23R22

J19H19K20D5C2B4A3C8D7C3C4

J22

AC13AA19

D10D11A8C12

A10A9A11B10C10A12C11B11Y5

B5A6E8C5

AD0AD1AD2AD3AD4AD5AD6AD7AD8AD9AD10AD11AD12AD13AD14AD15AD16AD17AD18AD19AD20AD21AD22AD23AD24AD25AD26AD27AD28AD29AD30AD31

C/BE#0C/BE#1C/BE#2C/BE#3

REQ#0REQ#1REQ#2REQ#3REQ#4

GNT#0GNT#1GNT#2GNT#3GNT#4

PCICLK

FRAME#DEVSEL#IRDY#PARPERR#LOCK#PME#PCIRST#SERR#STOP#TRDY#

INTRUDER#SMLINK0SMLINK1

SMB_CLKSMB_DATA

SMB_ALERT#/GPI11

A20GATEA20M#

DPSLP#FERR#

IGNNE#INIT#INTRNMI

CPU_PWRGOODRCIN#

SLP#SMI#

STPCLK#

HI0HI1HI2HI3HI4HI5HI6HI7HI8HI9

HI10HI11

CLK66

HI_STBHI_STB#

HICOMPHUB_VREF

HUB_VSWING

APICCLKAPICD0APICD1PIRQA#PIRQB#PIRQC#PIRQD#

PIRQE#/GPI2PIRQF#/GPI3PIRQG#/GPI4PIRQH#/GPI5

SERIRQ

IRQ14IRQ15

EE_CSEE_IN

EE_OUTEE_SHCLK

LAN_RXD0LAN_RXD1LAN_RXD2LAN_TXD0LAN_TXD1LAN_TXD2

LAN_CLKLAN_RSTSYNC

LAN_RST#

REQA#/GPI0REQB#/GPI1/REQ5#GNTA#/GPO16GNTB#/GPO17/GNT5#

R35856_0402_5%

1 2

R123150_0402_1%

12

R35956_0402_5%1 2

R3320_0402_5%

12

R85@1K_0402_5%

1 2

R371

10K_0402_5%1 2

R33810K_0402_5%

12

RP72

8.2K _8P4R_0804_5%

1 82 73 64 5

C1410.1U_0402_16V4Z

1

2

U37

@74LVC1G125GW_SOT3535

2 4

53

1

I O

PG

OE

#

R333

10K_0402_5%

12

R346@22_0402_5%

12

R347 0_0402_5%1 2

R354330K_0402_5%

1 2

R3698.2K_0402_5%

1 2

RP74

8.2K _8P4R_0804_5%

1 82 73 64 5

C460@10P_0402_50V8K

1

2

R3708.2K_0402_5%

1 2

C447

15P_0402_50V8J

1

2

R376

4.7K_0402_5%1 2

R37210K_0402_5%

1 2

R344

10_0402_5%

12

R374

4.7K_0402_5%1 2

R37310K_0402_5%

1 2

R339@56_0402_5%1 2

R322 @1K_0402_5%1 2

R35610K_0402_5%

1 2

C453

0.01U_0402_16V7K

1

2

R122150_0402_1%

12

RP11

8.2K_10P8R_1206_5%

109876

12345

C4440.01U_0402_16V7K

1

2

PD_IRQ14 <18>

H_INTR <4>

H_STPCLK# <4>

PCI_GNT#3<25>

PCI_REQ#1<19>

H_SMI# <4>

PCI_PIRQB# <19>

HUB_PD[0..10] <6>

PCI_IRDY#<19,20,21,25>

SD_IRQ15 <18>

PCI_GNT#2<21>

PCI_PERR#<19,20,21,25>

PCI_REQ#4<25>

H_INIT# <4>

CLK_ICH_66M <12>

PCI_GNT#1<19>

H_IGNNE# <4>

B_PCIRST# <18,29>

SMB_DATA <9,10,12>

H_FERR# <4>

PCI_REQ#3<25>

PCI_CBE#1<19,20,21,25>

PIDERST#<18>

H_CPUSLP# <4>

HUB_PSTRB <6>

SMB_CLK <9,10,12>

PCIRST#<7,13,19,20,21,22,25,31>

H_CPUPWRGD <4>

PCI_PIRQD# <25>PCI_FRAME#<19,20,21,25>

GATEA20 <29>

CLK_PCI_ICH<12>

PCI_CBE#3<19,20,21,25>

RC# <29>

PCI_SERR#<19,21,25>

PCI_AD[0..31]<19,20,21,25>

PCI_CBE#2<19,20,21,25>

PCI_REQ#0<20>

PCI_PAR<19,20,21,25>

SIDERST#<18>

PCI_PIRQC# <21,25>

PCI_STOP#<19,20,21,25>

PCI_GNT#0<20>

PCI_DEVSEL#<19,20,21,25>

PCI_CBE#0<19,20,21,25>

H_NMI <4>

PCI_GNT#4<25>

PCI_TRDY#<19,20,21,25>

PCI_PIRQA# <13,20>

SIRQ <21,22,29,31>

H_A20M# <4>

PCI_REQ#2<21>

H_DPSLP# <4,7>

HUB_PSTRB# <6>

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1701 1.0

ICH4-M(2/3)

16 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

SB_SPKR

AGP_BUSY#

ICH_AC_SDOUT

CPUPERF#

ATF_INT#

ICH_AC_SDOUT

PM_RSMRST#

CLK_ICH_48M

PM_CLKRUN#

R_VBIAS

ICH_AC_SYNC

PD_D[0..15]

SD_D[0..15]

SB_SPKR

SD_A1

PD_D12

PD_D1

CLK_ICH_14M

SD_D2

PD_D10

PD_D5

PD_A0

OVCUR#5

C3_STAT#

RTCX1

SD_D4SD_D3

PD_D8PD_D7

PD_D2

PD_CS#3

SD_D11

PD_D9

PD_D4

LPC_FRAME#

THRMTRIP#

SD_CS#3

PD_D3

SD_IOR#

SD_D13

SD_D6

PD_IOR#

PM_RSMRST#

SD_D10

SD_D1

SD_IOW#

PD_IOW#

PD_A1

OVCUR#4

LPC_DRQ#0

LPC_AD2

VBIAS

SD_D15

SD_D7

SD_SIORDY

AC97_SDIN0

AC97_BITCLK

CLK_ICH_48M

SD_D12

PD_D13

PD_A2

AC97_SDIN2

RTCX2

SD_D5

SD_DREQ

LPC_AD3

LPC_AD1LPC_AD0

PM_DPRSLPVR

SD_D14

SD_CS#1SD_A2

SD_A0

PD_D15

EC_SMI#

USB_RBIAS

SUS_STAT#

AGP_BUSY#

CLK_ICH_14M

SD_DACK#

PD_CS#1

SCI#

OVCUR#0

CPUPERF#

PM_BATLOW#SYSRST#

PD_D14

PD_DACK#

OVCUR#1SD_D9

PD_DREQ

EC_RIOUT#

SD_D8

PD_D6

PD_D0

EC_LID_OUT#

AC97_SDIN1

PD_D11

PD_PIORDY

LPC_DRQ#1

OVCUR#2

RTC_RST#

ICH_AC_SDOUT

SD_D0

ATF_INT#

SLP_S5#

ICH_AC_SYNC

OVCUR#3

OVCUR#3OVCUR#2OVCUR#1

OVCUR#5

VB0VB1VB2BID0BID1BID2

BID0BID1BID2

SYSRST#

PM_DPRSLPVR

+3VS

+3VS

+RTCVCC

+3VS

+3VS

+3VS

+VCCP

+3VALW

+3VS

+3VALW

+3VS

+3VS

R38410M_0603_5%

1 2

C4610.1U_0402_16V4Z

1

2

R331@22_0402_5%

12

D27

RB751V_SOD323

2 1

R368 10K_0402_5%12

R337

@0_0402_5%

12

R385 0_0402_5%12

R19610M_0603_5%

1 2

D12

RB751V_SOD323

2 1

C438@10P_0402_50V8K

1

2

C19015P_0402_50V8J

1

2

C20315P_0402_50V8J

1

2

J2JOPEN

12

R336@22_0402_5%

12

C4810.047U_0603_16V7K

1 2

R353180K_0402_5%

1 2

R3891K_0402_5%

1 2

R383@22M_0603_5%

12

R325@10K_0402_5%

12

RP73

10K_8P4R_0804_5%

1 82 73 64 5

R115

0_0402_5%

12

R197@2.4M_0603_1%

12

R32133_0402_5%

1 2

R32033_0402_5%

1 2

U38@74AHC1G08

1

2

3

4

5

C391@22P_0402_50V8J

1

2

C390@22P_0402_50V8J

1

2

R95

22.6_0402_1%12

R98

0_0402_5%

12

R13010K_0402_5%

12

R3558.2K_0402_5%

1 2

X232.768KHz_12.5P_CM155

12

R335

0_0402_5%

12

ICH4

PM

IST

AC97 I/F

LPC I/F

USB I/F

GPIO

MISC

CLOCK

IDE I/F

GPIO

U8B

FW82801DBM_BGA421

R2Y3

AB2T3

AC2V20AA1AB6

Y1AA6W18

Y4Y2

AA2W19Y21AA4AB3

V1

J21Y20V19

B8C13D13A13B13D9C9

T2R4T4U2U3U4T5

C20D20A21B21C18D18A19B19C16D16A17B17

B15C14A15B14A14D14

A23B23

J20G22F20G20F21H20F23H22G23H21F22E23

R3V4V5W3V2W1W4

AA13AB13W13Y13AB14

AA11Y12AC12W12AB12

AB11AC11Y10AA10AA7AB8Y8AA8AB9Y9AC9W9AB10W10W11Y11

AA20AC20AC21AB21AC22

AB18AB19Y18AA18AC19

W17AB17W16AC16W15AB15W14AA14Y14AC15AA15Y15AB16Y16AA17Y17

J23F19

W7

AC7

AC6

Y6

H23

W20

AGPBUSY#SYSRST#BATLOW#C3_STAT#CLKRUN#DPRSLPVRPWRBTN#PWROKRI#RSMRST#SLP_S1#SLP_S3#SLP_S4#SLP_S5#STP_CPU#STP_PCI#SUS_CLKSUS_STAT#/LPCPD#THRM#

SSMUXSELCPUPERF#VGATE/VRMPWRGD

AC_BITCLKAC_RST#AC_SDATAIN0AC_SDATAIN1AC_SDATAIN2AC_SDATAOUTAC_SYNC

LPC_AD0LPC_AD1LPC_AD2LPC_AD3LPC_DRQ#0LPC_DRQ#1LPC_FRAME#

USBP0+USBP0-USBP1+USBP1-USBP2+USBP2-USBP3+USBP3-USBP4+USBP4-USBP5+USBP5-

OC#0OC#1OC#2OC#3OC#4OC#5

USB_RBIASUSB_RBIAS#

GPIO32GPIO33GPIO34GPIO35GPIO36GPIO37GPIO38GPIO39GPIO40GPIO41GPIO42GPIO43

GPI7GPI8

GPI12GPI13

GPIO25GPIO27GPIO28

PDA0PDA1PDA2

PDCS1#PDCS3#

PDDREQPDDACK#

PDIOR#PDIOW#PIORDY

PDD0PDD1PDD2PDD3PDD4PDD5PDD6PDD7PDD8PDD9

PDD10PDD11PDD12PDD13PDD14PDD15

SDA0SDA1SDA2

SDCS1#SDCS3#

SDDREQSDDACK#

SDIOR#SDIOW#SIORDY

SDD0SDD1SDD2SDD3SDD4SDD5SDD6SDD7SDD8SDD9

SDD10SDD11SDD12SDD13SDD14SDD15

CLK14CLK48

RTCRST#

RTCX1

RTCX2

VBIAS

SPKR

THRMTRIP#

R14110K_0402_5%

1 2

R37510K_0402_5%

12

R100

@0_0402_5%

12

R446 @10K_0402_5%12

C420@10P_0402_50V8K

1

2

R390 @10K_0402_5%1 2

R117@1K_0402_5%

1 2

C486@1U_0805_25V4Z1 2

R106

@0_0402_5%

12

R345

100K_0402_5%

12

LPC_DRQ#0<29,31>

PD_A2 <18>

PM_CLKRUN#<19,21,22,25,29>

VGATE<12,32,41>

PM_BATLOW#<29>

AC97_SDIN0<23>

SD_D[0..15] <18>

PD_CS#3 <18>

SLP_S1#<12,29> PD_A0 <18>

LPC_AD1<22,29,31>

THRMTRIP# <4>

EC_THRM# <29>

PD_PIORDY <18>

PD_A1 <18>

EC_LID_OUT# <29>

PD_DREQ <18>

LPC_AD3<22,29,31>

PD_CS#1 <18>

PD_IOW# <18>

AC97_SDIN1<28>

PWRBTN_OUT#<29>

LPC_DRQ#1<22>

AC97_RST#<23,25,28>

SLP_S3#<29,33>

EC_RIOUT#<29>

SD_A1 <18>

LPC_AD2<22,29,31>

AC97_SDOUT<23,25,28>

AC97_BITCLK<23,25,28>

AC97_SDIN2<25>

LPC_AD0<22,29,31>

STP_CPU#<12,41>

PM_POK<32>

AC97_SYNC<23,25,28>

PD_DACK# <18>

EC_FLASH# <30>

ITP_DBRESET#<4>

SD_A0 <18>

PD_D[0..15] <18>

LPC_FRAME#<22,29,31>

PD_IOR# <18>

SD_A2 <18>

CLK_ICH_14M <12>

USB20P4-<27>USB20P4+<27>

STP_PCI#<12>

SB_SPKR <23>

SD_SIORDY <18>

SD_IOR# <18>USB20P1+<27>

SD_CS#3 <18>

SCI# <29>

USB20P2-<33>

CLK_ICH_48M <12>

USB20P2+<33>

SUS_STAT#<13,30>

SD_DACK# <18>

PM_RSMRST#<21,29>

USB20P1-<27>

USB20P0+<27>

C3_STAT#<13>

OVCUR#0<27>

USB20P0-<27>

PM_DPRSLPVR<41>

SLP_S5#<29>

SD_CS#1 <18>

SLP_S4#<29>

SD_IOW# <18>

SD_DREQ <18>

AGP_BUSY#<13>EC_SMI# <29>

USB20P5+<28,31>USB20P5-<28,31>

VB1<13>VB0<13>

VB2<13>

USB20P3+<33>USB20P3-<33>

OVCUR#4<27>

ACIN <29,33,35,37>

A

A

B

B

C

C

D

D

E

E

F

F

G

G

H

H

1 1

2 2

3 3

4 4

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

VCCPLL power placeVCC1.5 power place

VCCLAN1.5 power place

VCCHI power place

W=20mils

-+

LA-1701 1.0

ICH4-M(3/3)

17 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

VCC5REFSUS VCC5REFVCC5REFSUS

VCC5REF

BATT1.2

+1.5VS

+3VS+3VS

+RTCVCC

+3VALW

+VCCP

+1.5VS

+1.8VS

+5VALW

+3VALW

+VCCP

+3VALW

+3VS

+1.5VS

+1.5VALW

+1.5VALW

+5VS

+3VALW

+1.5VALW

+1.5VS

+1.5VS

+1.8VS

+3VS

+RTCVCC

BATT1.1

RTCVREF

C4260.1U_0402_16V7K

1

2

C4500.1U_0402_16V7K

1

2

C4450.1U_0402_16V7K

1

2

C4550.1U_0402_16V7K

1

2

C435

0.1U_0402_16V7K1

2

R445

511_0603_1%

1 2

C456

0.1U_0402_16V7K

1

2

C4580.1U_0402_16V7K

1

2

C446

0.1U_0402_16V7K1

2

C437

0.1U_0402_16V7K

1

2

D191SS355_SOD323

12

C436

0.1U_0402_16V7K

1

2

C4420.1U_0402_16V7K

1

2

C4410.1U_0402_16V7K

1

2

R3231K_0402_5%

12

C459

0.1U_0402_16V7K1

2

C4230.1U_0402_16V7K

1

2

C4250.1U_0402_16V7K

1

2

C4540.1U_0402_16V7K

1

2

C4430.01U_0402_16V7K

1

2

ICH4

POWERGND

U8C

FW82801DBM_BGA421

D22E10E14E16E17E18E19E21E22

F8G19G21

G3G6H1J6

K11K13K19K23

K3L10L11L12L13L14L21M1

M11M12M13M20M22N10N11N12N13N14N19N21N23

N5P11P13P20P22

P3R18R21

R5T1

T19T23U20V15V17

V3W22

W5W8Y19

Y7A16A18A20A22

A4AA12AA16AA22

AA3AA9

AB20AB7AC1

AC10AC14AC18AC23

AC5B12B16B18B20B22

B9C15C17C19C21C23

C6D1

D12D15D17D19D21D23

D4D8A1

A5AC17AC8B2H18H6J1J18K6M10P12P6U1V10V16V18

E11F10F15F16F17F18K14V7V8V9

K10K12K18K22P10T18U19V14

E12E13E20F14G18R6T6U6

E7V6

E15

L23M14P18T22

AA23P14U18

C22

AB5

E9F9

F6F7

VSS0VSS1VSS2VSS3VSS4VSS5VSS6VSS7VSS8VSS9VSS10VSS11VSS12VSS13VSS14VSS15VSS16VSS17VSS18VSS19VSS20VSS21VSS22VSS23VSS24VSS25VSS26VSS27VSS28VSS29VSS30VSS31VSS32VSS33VSS34VSS35VSS36VSS37VSS38VSS39VSS40VSS41VSS42VSS43VSS44VSS45VSS46VSS47VSS48VSS49VSS50VSS51VSS52VSS53VSS54VSS55VSS56VSS57VSS58VSS59VSS60VSS61VSS62VSS63VSS64VSS65VSS66VSS67VSS68VSS69VSS70VSS71VSS72VSS73VSS74VSS75VSS76VSS77VSS78VSS79VSS80VSS81VSS82VSS83VSS84VSS85VSS86VSS87VSS88VSS89VSS90VSS91VSS92VSS93VSS94VSS95VSS96VSS97VSS98VSS99VSS100VSS101

VCC3.3_0VCC3.3_1VCC3.3_2VCC3.3_3VCC3.3_4VCC3.3_5VCC3.3_6VCC3.3_7VCC3.3_8VCC3.3_9

VCC3.3_10VCC3.3_11VCC3.3_12VCC3.3_13VCC3.3_14VCC3.3_15

VCCSUS3.3_0VCCSUS3.3_1VCCSUS3.3_2VCCSUS3.3_3VCCSUS3.3_4VCCSUS3.3_5VCCSUS3.3_6VCCSUS3.3_7VCCSUS3.3_8VCCSUS3.3_9

VCC1.5_0VCC1.5_1VCC1.5_2VCC1.5_3VCC1.5_4VCC1.5_5VCC1.5_6VCC1.5_7

VCCSUS1.5_0VCCSUS1.5_1VCCSUS1.5_2VCCSUS1.5_3VCCSUS1.5_4VCCSUS1.5_5VCCSUS1.5_6VCCSUS1.5_7

VCC5REF1VCC5REF2

VCC5REFSUS1

VCCHI_0VCCHI_1VCCHI_2VCCHI_3

VCC_CPU_IO_0VCC_CPU_IO_1VCC_CPU_IO_2

VCCPLL

VCCRTC

VCCLAN3.3_0VCCLAN3.3_1

VCCLAN1.5_0VCCLAN1.5_1

C4670.1U_0402_16V7K

1

2

C4150.1U_0402_16V7K

1

2

C4140.1U_0402_16V7K

1

2

R310

100_0603_1%

1 2

R3191K_0402_5%

12

C4490.1U_0402_16V7K

1

2

D25

DAN202U_SC70

2

31

D201SS355_SOD323

12

C4570.1U_0402_16V7K

1

2

JP27

ML1220

1 2

C4510.1U_0402_16V7K

1

2

C4520.1U_0402_16V7K

1

2

C4240.1U_0402_16V7K

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Place component's closely IDE CONN.

Place component's closely IDE CONN.

W=80mils

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

Unused GATE

LA-1701 1.0

HDD & CDROM Connector

18 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

PD_D[0..15]

PD_IOW#

PD_CS#3

PD_A1

PD_D6

PD_CS#1

PD_D14

HDD_LED#

PD_DREQ

PD_IOR#

SD_D[0..15]

PD_A0

PD_D15

PD_D8

PD_D1

PD_D10

PD_D7

PD_IRQ14

PD_D11

PD_CSEL

PD_D13

HD_RST#

PD_PIORDY

PD_D0

PD_D2

PD_D4

PD_DACK#

PD_D12

PD_D9

PD_A2

PD_D5

PD_D3

CDROM_L

SD_CSEL

SD_D14

CD_RST#

SD_D15

SD_D3

SD_IOW#

SD_D10

SD_CS#3

SD_D9SD_D7

SD_D1

SD_D13

SD_CS#1

SD_D12

SD_D2

SD_IRQ15SD_DACK#

CDROM_R

SD_D0

SD_D8

SD_D4

PDIAG#

SD_IOR#

SD_D5

CD_AGND

SD_D11

SD_DREQ

SD_D6

ODD_LED#

B_PCIRST#HD_RST#

B_PCIRST#CD_RST#

ODD_LED#

HDD_LED#

+5VS

+5VS

+5VS

+5VS

+5VS

+3VS

+5VS

+5VS

+3VS

+5VS +5VS

+5VS

+5VS

+5VS+5VS

+5VS

R396 100K_0402_5%1 2

C235

10U_1206_6.3V6M

12

U40B

74HCT08PW_TSSOP14

4

56I0

I1O

R237 @10K_0402_5%12

R2394.7K_0402_5%

1 2

C5520.1U_0402_16V7K

1

2

JP23

CD-ROM CONN.

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 50

C5511000P_0402_50V7K

1

2

R240 100K_0402_5%1 2

C5491U_0603_10V6K

1

2

C250 0.1U_0402_16V7K

12

C55010U_1206_16V4Z

1

2

R241 100K_0402_5%1 2

C5541000P_0402_50V7K

1

2

R400 470_0402_5%1 2

R398 100K_0402_5%1 2

R242470_0402_5%

12

C55310U_1206_16V4Z

1

2

U40C

74HCT08PW_TSSOP14

9

108I0

I1O

C5550.1U_0402_16V7K

1

2

U40A

74HCT08PW_TSSOP14

1

23

147

I0

I1O

PG

U40D

74HCT08PW_TSSOP14

12

1311I0

I1O

JP25

HDD CONN

1 23 45 67 89 10

11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 44

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 44

R3994.7K_0402_5%

1 2

R397

@10K_0402_5%1 2

PD_A1<16>

PD_IOW#<16>PD_IOR#<16>

SD_D[0..15]<16>

PD_CS#1<16>

PD_D[0..15]<16>

PD_CS#3 <16>

PD_PIORDY<16>

PD_A0<16>

PD_IRQ14<15>PD_DACK#<16>

PD_A2 <16>

PD_DREQ<16>

SD_A2 <16>SD_A1<16>

SD_DREQ <16>

SD_IRQ15<15>

SD_A0<16>SD_CS#1<16>

CD_AGND <23>

SD_IOW#<16>

CDROM_L<23> CDROM_R <23>

SD_IOR# <16>

SD_CS#3 <16>

SD_DACK# <16>

SD_SIORDY<16>

B_PCIRST#<15,29>

PIDERST#<15>

SIDERST#<15>

DEV_LED# <28>

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

GREEN-LINK

YELLOW-ACT

1:1

CHASSIS GND

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1701 1.0

LAN RealTech8139CL+

19 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

RJ45_RXX+

LANGND_1

LINK_CR

RJ45_TXX+RJ45_TXX-

RJ45_TXX+

RJ45_RXX-

RJ45_RXX+LAN_RX-

RJ45_TXX-

LANGND

MOD_TIP

LAN_RX+

LANGND_2

LANGND

MOD_RING

LAN_TX+

MOD_TIP

LAN_LED0#

LANGND

LAN_TX-

ACT_CR

LAN_LED1#

MOD_RING

RJ45_RXX-

PCI_AD14

PCI_AD12

PCI_AD19

PCI_AD15

PCI_AD[0..31]

PCI_CBE#0

PCI_AD6

PCI_AD17

PCI_CBE#[0..3]

PCI_AD24

PCI_AD9

PCI_CBE#2PCI_CBE#3

PCI_AD0

PCI_AD28

PCI_AD7

PCI_AD20

PCI_AD22

PCI_AD1

PCI_AD18

PCI_AD30

PCI_AD11

PCI_AD31

PCI_AD5PCI_AD4

PCI_AD29

PCI_CBE#1

PCI_AD21

PCI_AD13

PCI_AD26

PCI_AD16PCI_AD17

PCI_AD23

PCI_AD3

PCI_AD10

PCI_AD25

PCI_AD8

PCI_AD2

PCI_AD27

LAN_RX+

CLKOUT

LAN_TX+LAN_TX-

ISOB

LAN_RX-

XTALFB

LAN_LED0#

EEDO

EECSEESK

EECS

EEDI

LAN_LED1#

CLKOUT XTALFB

LANVDD +3VALW

LANVDD

+3VS

LANVDD

LANVDD

LANVDD

LANVDD

LANVDD

C480.1U_0402_10V6K

1

2

R262

330_0402_5%12

C377

0.1U_0402_10V6K

1

2

C314

0.1U_0402_10V6K1

2

C3310.1U_0402_10V6K

1

2

R83 100_0402_5%1 2

R4049.9_0402_1%

12

C375

0.1U_0402_10V6K

1

2

C5727P_0402_50V8J

1

2

R2760_0402_5%

12

C354

0.1U_0402_10V6K

1

2

C4727P_0402_50V8J

1

2

Q32SI2301DS_SOT23

2

1 3

R58

10_0402_5%

12

C312

0.1U_0402_10V6K1

2

R1275_0402_1%

12

JP4

RJ-45 & RJ-11

8

7

6

5

4

3

2

1

9

10

11

12

13

14

16

17

15

18

TX+

TX-

RX+

N/C1

N/C2

RX-

N/C3

N/C4

N/C5

RING

TIP

N/C6

NC

NC

CATHODE1

CATHODE2

ANODE1

ANODE2

C318

0.1U_0402_10V6K1

2

PCI

I/F

Power

LAN

I/F

U5

RTL8139CL_LQFP128

45444342413938373433323129282726131110

98654

128127126125123122121120

2

3

14

1516171920

2122

23

2436

95

50

84

81

76

999897

7978

114

115

116

117118

92918786

4748495152535760616364656667686970

75

108107105104103102101100

8988

83

82

110

1122535465859

9077

96106109119

5471727394

718304055566274808593

111112113124

AD0AD1AD2AD3AD4AD5AD6AD7AD8AD9AD10AD11AD12AD13AD14AD15AD16AD17AD18AD19AD20AD21AD22AD23AD24AD25AD26AD27AD28AD29AD30AD31

C/BE#3

IDSEL

C/BE#2

FRAME#IRDY#TRDY#DEVSEL#STOP#

PERR#SERR#

PAR

C/BE#1C/BE#0

ISOLATE#

EECS

RTSET

RTT3

PME#

LED0LED1LED2

X1X2

INTA#

RST#

CLK

GNT#REQ#

TXD+TXD-

RXIN+RXIN-

MA0/EEDOMA1/EEDI

MA2/EESKMA3MA4MA5

MA6/9356SELMA7

MA8/Aux. PWRMA9

MA10MA11MA12MA13MA14MA15MA16

CLKRUN#

MD0MD1MD2MD3MD4MD5MD6MD7

WE#OE#

LWAKE

RTT2

ROMCS#

VDDVDDVDDVDDVDDVDDVDD

VDDVDD

VDDVDDVDDVDD

NCNCNCNCNC

GNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGND

JP9

MODEM CONN.

12

Y1

25MHz_25ppmCRYSTAL

VH1DSSA-P3100SB

12

12

R24975_0402_1%1 2

C329

0.1U_0402_10V6K1

2

R39 1K_0402_5%12

R261

330_0402_5%12

R3449.9_0402_1%

12

C378

0.1U_0402_10V6K1

2

C161000P_1206_2KV7K

1

2

R294 5.6K_0402_5%1 2

C80

0.1U_0402_10V6K

1

2

R24875_0402_1%1 2

C259220P_1808_3KV8K

1

2

R4149.9_0402_1%

12

C313

0.1U_0402_10V6K1

2

C260220P_1808_3KV8K

1

2

R3349.9_0402_1%

12

R1375_0402_1%

12

C2671000P_0402_50V7K

1

2

C2850.1U_0402_10V6K

1

2

C66

0.1U_0402_10V6K1

2

R44 15K_0402_5%1 2

C63

0.1U_0402_10V6K1

2

C2681000P_0402_50V7K

1

2

C400.1U_0402_10V6K

1 2

R43 1.69K_0603_1%12

C31710U_0805_10V4Z

1

2

U34

AT93C46-10SI-2.7_SO8

1234

8765

CSSKDIDO

VCCNCNC

GND

C376

0.1U_0402_10V6K

1

2

U1

NS0013_16P

123

678 9

1011

141516RD+

RD-CT

CTTD+TD- TX-

TX+CT

CTRX-RX+

C73

10P_0402_50V8K

1

2

EN_WOL# <29>

RJ45_TXX+<33>

RJ45_RXX+<33>

RJ45_TXX-<33>

RJ45_RXX-<33>

PCIRST#<7,13,15,20,21,22,25,31>

PCI_FRAME#<15,20,21,25>PCI_IRDY#<15,20,21,25>

CLK_PCI_LAN<12>

PCI_DEVSEL#<15,20,21,25>

PCI_PAR<15,20,21,25>

ONBD_LAN_PME#<21,25,29>

PCI_PERR#<15,20,21,25>

PCI_TRDY#<15,20,21,25>

PCI_REQ#1<15>

PCI_SERR#<15,21,25>

PCI_STOP#<15,20,21,25>

PCI_AD[0..31]<15,20,21,25>

PCI_PIRQB#<15>

PCI_CBE#[0..3]<15,20,21,25>

PCI_GNT#1<15>

PM_CLKRUN#<16,21,22,25,29>

LAN_LED0# <33>LAN_LED1# <33>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Place close to 1394 CONN.

Place close to 1394 chip

LA-1701 1.0

IEEE1394 Controller & PHY

20 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

PCI_AD0

PCI_AD10

XTPA0-

PCI_AD13

PCI_AD6

PCI_AD4

PCI_AD29

XTPBIAS0

XTPA0+

PCI_AD23

XTPB1+

XTPA0-

PCI_AD25

PCI_AD11

PCI_CBE#1

PCI_AD18

PCI_AD8

PCI_CBE#[0..3]

XTPB0+

PCI_AD17

PCI_AD21

PCI_AD16

PCI_AD31

PCI_AD7

PCI_AD2

XTPA0-

XTPBIAS1

EECK_1394

PCI_AD14

PCI_CBE#0

EEDI_1394

XTPB0-

PCI_AD24

XTPB0+

PCI_AD26

PCI_AD22

XTPB1+

PCI_AD1

EEDI_1394

PCI_CBE#3

PCI_AD9

1394_XREXT

PCI_AD28

CLK_PCI_1394

PCI_AD[0..31]

XTPB0-

XTPB1-

XTPA0+

PCI_AD15

PCI_AD20

XTPA1-

XTPBIAS1

PCI_CBE#2XTPB0-

XTPB0+

PCI_AD12

PCI_AD3

XTPA1+

XTPB1-

XTPBIAS0

PCI_AD16

PCI_AD5

XTPA1+

XTPA0+

XTPA1-

PCI_AD30

PCI_AD19

EECK_1394

PCI_AD27

XO

XI

XI XO

+3VS

+3VS+3VS

+3VS

+3VS

+3VS

+3VS +3VS

+3VS

R251

1394@54.9_0402_1%

12

C282

1394@0.1U_0402_10V6K

1

2

C291394@0.33U_0805_16V7K

1

2

C277

1394@10P_0402_50V8K1

2

C2881394@0.1U_0402_10V6K

1

2

C43

1394@0.1U_0402_10V6K

1

2

C2931394@0.1U_0402_10V6K

1

2

C21

1394@0.1U_0402_10V6K

1

2

C181394@0.1U_0402_10V6K

1

2

R20

1394@54.9_0402_1%

12

C53

1394@0.1U_0402_10V6K

1

2

U28

1394@AT24C02N-10SC-2.7_SO8

12

56

8

34

7A0A1

SDASCL

VCC

A2GND

WC

C541394@0.1U_0402_10V6K

1

2

R274

1394@6.34K_0603_1%

12

C551394@0.1U_0402_10V6K

1

2

R2471394@510_0402_5%

12

TVS9

@SF10402ML080C

1

2

C276

1394@10P_0402_50V8K1

2

R26

1394@54.9_0402_1%

12

C262

1394@270P_0402_25V8K

1

2

R2731394@4.7K_0402_5%

12

C171394@0.1U_0402_10V6K

12

C231394@270P_0402_50V7K

1

2

R35

10_0402_5%

12

TVS8

@SF10402ML080C

1

2

C42

22P_0402_50V8J

1

2

C2581394@0.33U_0805_16V7K

1

2

R21

1394@54.9_0402_1%

12

R191394@5.1K_0603_1%

12

JP5

1394@1394_FOX

1234

C19 1394@0.1U_0402_10V6K

1

2

C26

1394@0.1U_0402_10V6K

12

TVS7

@SF10402ML080C

1

2

C284 1394@0.1U_0402_10V6K

1

2

R491394@100_0402_5%1 2

C287 1394@0.1U_0402_10V6K

1

2

C20 1394@0.1U_0402_10V6K12

R25

1394@54.9_0402_1%

12

R2721394@1K_0402_5%

12

C295 1394@0.1U_0402_10V6K

1

2

IEEE 1394VT6307S

U2

VT6307S-CD_LQFP128

9897969594

234789

10111415161819202425

101102103106107109113114115116117

112

104119

99 110

122

5 17 32 21 111

91100

108

118

126

6132333112

22

105120121123124125127128

9392888990

353741424344454849505152535464

8584838281

7877767574

7170696867

63

60

5857

343940

26272829

36 46 47 3830

31

55

59 56 73 66

87

8062

6172

6586

79

AD27AD28AD29AD30AD31

AD15AD14AD13AD12AD11AD10AD9AD8AD7AD6AD5AD4AD3AD2AD1AD0

AD26AD25AD24AD23AD22AD21AD20AD19AD18AD17AD16

CBE1#CBE0#

CBE3#CBE2#

VD

D1

VD

D2

VD

D3

VD

D4

VD

D5

VD

D6

VD

DC

2V

DD

C1

VS

S1

VS

S2

VS

S3

VS

S4

VS

S5

VS

S6

VS

S7

VS

S8

VS

S9

VS

SC

1V

SS

C2

IDSELFRAME#IRDY#TRDY#DEVSEL#STOP#PERR#PARREQ#GNT#INTA#PCIRST#PCICLK

NC

8N

C9

NC

10N

C11

I2C

EE

EN

AN

C12

NC

13N

C14

NC

15N

C16

NC

17N

C18

NC

19N

C20

NC

21

NC7NC6NC5NC4NC3

XTPBIAS1XTPA1PXTPA1MXTPB1PXTPB1M

XTPBIAS0XTPA0PXTPA0MXTPB0PXTPB0M

XREXT

XCPS

XO

XI

PME#NC1NC2

EECSEEDO

SDA/EEDISCL/EECK

PV

DD

1P

VD

D2

PG

ND

2P

GN

D1

RA

MV

DD

RA

MV

SS

PHYRESET

VD

DA

TX0

GN

DA

TX0

VD

DA

TX1

GN

DA

TX1

VDDATX2

GNDATX2VDDARX0

GNDARX0VDDARX1

GNDARX1VDDARX2

GNDARX2

R2751394@1M_0402_1%

1 2

C56 1394@0.1U_0402_10V6K12

R2701394@1K_0402_5%

12

C31

1394@0.1U_0402_10V6K12

C283

1394@47P_0402_50V8J1

2

TVS6

@SF10402ML080C

1

2

R252

1394@54.9_0402_1%

12

X3

1394@24.576MHz_16P_3XG-24576-43E1

12

R260

1394@5.1K_0603_1%

12

R2531394@54.9_0402_1%

12

R250

1394@54.9_0402_1%

12

PCI_GNT#0<15>

PCIRST#<7,13,15,19,21,22,25,31>

PCI_STOP#<15,19,21,25>

PCI_IRDY#<15,19,21,25>

CLK_PCI_1394<12>

XTPB1+ <33>

PCI_FRAME#<15,19,21,25>

PCI_TRDY#<15,19,21,25>

PCI_PIRQA#<13,15>

XTPB1- <33>

PCI_REQ#0<15>PCI_PAR<15,19,21,25>

XTPA1- <33>

PCI_PERR#<15,19,21,25>

PCI_CBE#[0..3]<15,19,21,25>

PCI_AD[0..31]<15,19,21,25>

XTPA1+ <33>

PCI_DEVSEL#<15,19,21,25>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1701 1.0

CardBus Controller CB1410 & Socket

21 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

S1_BVD1

S1_A16

PCM_RI#

S1_VS2

PCI_AD3

S1_A0

S1_CD2#

S1_D0

S1_A2

PCI_AD2S1_D4

S1_A6

S1_OE#

S1_A15

S1_D2

PCI_AD20

PCI_AD26

S1_OE#

VCCD1#

S1_D11

S1_A4

S1_A11

PCM_RI#

S1_IOWR#

S1_INPACK#

PCI_AD7

VCCD0#

S1_A23

PCI_CBE#2

PCI_AD5

S1_D10

S1_A3

S1_RDY#

S1_VS1

PCI_AD0 S1_A23

S1_D7

S1_A3

S1_D0

VPPD0

S1_CD1#

S1_REG#

CLK_PCI_PCM

S1_D4

PCI_AD12

S1_A18

S1_VS2

PCI_AD14

S1_D14

CB_REQ#

S1_A13

S1_A12

S1_IORD#

S1_A7

S1_INPACK#

S1_WP

S1_RST

PCI_AD19

PCI_AD29

S1_A17

S1_A1

S1_CE1#

S1_VS1

CLK_PCI_PCM

PCI_AD24

PCI_AD30

S1_D2

S1_D12

PCI_CBE#[0..3]

PCI_AD15

PCI_AD17

S1_A21

S1_D15

S1_BVD2PCI_AD25

S1_WP

PCI_AD27

S1_A14

S1_D10

S1_A8

S1_A15

S1_A19

S1_A10

PCI_AD1

S1_D6

S1_CD2#

VPPD0

S1_D11

S1_REG#

PCI_AD28

S1_D12

S1_A17

PCI_AD21

PCI_AD20

S1_A9

PCI_CBE#3

S1_WAIT#

S1_A22

S1_D9

S1_D5

S1_A20

S1_A8

PCI_AD[0..31]

S1_D13

S1_CE2#

S1_CE1#

S1_WE#

S1_WP

S1_A25

PCI_AD31S1_D9

S1_D1

S1_D6

S1_A6

PM_RSMRST#

S1_D7

VCCD1#

S1_CE2#

S1_A5

S1_D3

S1_A11

PCI_AD22

S1_A22

VPPD1

S1_A9

PCI_AD8

S1_A1S1_A2

S1_IORD#

S1_IOWR#

S1_A18

PCI_AD18

S1_D1

S1_A24

VCCD0#

PCI_CBE#0

S1_D3

S1_WE#

S1_A0

PCI_AD4

S1_A23

S1_A16

S1_D8

CB_REQ#S1_A10S1_A13

S1_A20

S1_D14

S1_D13

S1_A24

PCI_AD16

S1_CD1#

VPPD1

PCI_AD10

S1_A12 S1_A14

S1_RST

PCI_CBE#1

PCI_AD9

PCI_AD13

PCI_AD23S1_A4

PM_RSMRST#

S1_WAIT#

S1_A7

S1_D5

S1_D8

PCI_AD11

PCI_AD6

S1_D15

S1_BVD2

S1_A5

S1_A25

S1_BVD1

S1_A21S1_RDY#

S1_A19

S1_RST

S1_CE1#

S1_CE2#

+3V_CB

+12VS

+3VS

+3VALW

S1_VCC

+3VALW

S1_VCC

S1_VPP

+5VALW

S1_VCC

+3VALW

S1_VCC

S1_VPP

S1_VCC

+3V_CB

+3VALW

+12VALW

S1_VCC

S1_VPP

C275

0.1U_0402_16V7K

1

2

C294

@15P_0402_50V8J

1

2

C289

0.1U_0402_16V7K

1

2

C581000P_0402_50V7K

1

2

C286

1000P_0402_50V7K

1

2

C274 0.1U_0402_16V7K1 2

C296

0.1U_0402_16V7K1

2

R448 @47K_0402_5%1 2

C297

0.1U_0402_16V7K

1

2

C364.7U_0805_10V4Z

1

2

R281

@10_0402_5%

12

J11

CARDBUS HOUSING

C59

0.1U_0402_16V7K

1

2

C600.1U_0402_16V7K

1

2

R449 @47K_0402_5%1 2

C330.1U_0402_16V7K

1

2

R271 22K_0402_5%1 2

R23@0_1206_5%

1 2

C460.1U_0402_16V7K

1

2

R50 @22K_04021 2

R289 33_0402_5%1 2

C390.1U_0402_16V7K

1

2

R51 @22K_04021 2

C444.7U_0805_10V4Z

1

2

C3550.1U_0402_16V4Z

1

2

U3

CP-2211_SSOP16

12

34

56

78

9

10

111213

1415

16

VCCD0VCCD1

3.3V3.3V

5V5V

GN

DOC

12V

VPP

VCCVCCVCC

VPPD1VPPD0

SH

DN

PCMC68PIN

JP11

a1

a2

a3

a4

a5

a6

a7

a8

a9

a10

a11

a12

a13

a14

a15

a16

a17

a18

a19

a20

a21

a22

a23

a24

a25

a26

a27

a28

a29

a30

a31

a32

a33

a34

a35

a36

a37

a38

a39

a40

a41

a42

a43

a44

a45

a46

a47

a48

a49

a50

a51

a52

a53

a54

a55

a56

a57

a58

a59

a60

a61

a62

a63

a64

a65

a66

a67

a68

7374757680818283

a1

a2

a3

a4

a5

a6

a7

a8

a9

a10

a11

a12

a13

a14

a15

a16

a17

a18

a19

a20

a21

a22

a23

a24

a25

a26

a27

a28

a29

a30

a31

a32

a33

a34

a35

a36

a37

a38

a39

a40

a41

a42

a43

a44

a45

a46

a47

a48

a49

a50

a51

a52

a53

a54

a55

a56

a57

a58

a59

a60

a61

a62

a63

a64

a65

a66

a67

a68

7374757680818283

R30 0_1206_5%1 2

C350.1U_0402_16V7K

1

2

R447 @47K_0402_5%1 2

C3584.7U_1206_25VFZ

1

2

R285 100_0402_5%1 2

C299

0.1U_0402_16V7K

1

2

C304

0.1U_0402_16V7K

1

2

C34310U_1206_16V4Z

1

2

C22

0.1U_0402_16V7K

1

2

G

DS

Q36

2N7002 1N_SOT23

2

13

C3390.1U_0402_16V7K

1

2

C61

0.1U_0402_16V7K

1

2

R28247K_0402_5%

12

PQFP 14422.2 X 22.2 X 1.60

U31

CB1410_LQFP144

12

345

6

789

1011

12

13

14

151617

18

19

20

21

22

23242526

27

2829

30

313233343536

37

38394041

42

43

44

454647

48

49

50

51525354555657

58

59

6061

62

63

6465

66

676869

70

71727374

75

76

77

78

79

8081

8283

84

85

86

87

88

89

90

9192

93

94

95

9697

98

99

100

101

102

103

104105

106

107

108

109110111

112

113

114

115116

117

118

119

120121

122

123

124

125

126

127128129

130

131

132

133

134

135136

137

138

139140141142

143

144

REQ#GNT#

AD31AD30AD29

GN

D1

AD28AD27AD26AD25AD24

C/BE3#

IDSEL

VC

C7

AD23AD22AD21

VC

CP

1

AD20

RST#

PCLK

GN

D2

AD19AD18AD17AD16

C/BE2#

FRAME#IRDY#

VC

C6

TRDY#DEVSEL#STOP#PERR#SERR#PAR

C/BE1#

AD15AD14AD13AD12

GN

D3

AD11

VC

CP

0

AD10AD9AD8

C/BE0#

AD7

VC

C5

AD6AD5AD4AD3AD2AD1AD0

GN

D4

RI_OUT#/PME#

MFUNC0MFUNC1

SPKOUT

VC

CI

MFUNC2MFUNC3

VCC/GRST#

MFUNC4MFUNC5MFUNC6

SUSPEND#

VP

PD

0V

PP

D1

VC

CD

0#V

CC

D1#

CCD1#/CD1#

CAD0/D3

CAD2/D11

GN

D5

CAD1/D4

CAD4/D12CAD3/D5

CAD6/D13CAD5/D6

RS

VD

/D14

CAD7/D7

VC

C4

CAD8/D15

CC/BE0#/CE1#

CAD9/A10

VC

CS

K1

CAD10/CE2#CAD11/OE#

CAD13/IORD#

GN

D6

CAD12/A11

CAD15/IOWR#CAD14/A9

CAD16/A17

CC/BE1#/A8

RS

VD

/A18

CPAR/A13

VC

C3

CBLOCK#/A19

CPERR#/A14CSTOP#/A20

CGNT#/WE#

CDEVSEL#/A21

CCLK/A16

CTRDY#/A22CIRDY#/A15

CFRAME#/A23

CC/BE2#/A12

CAD17/A24

GN

D7

CAD18/A7CAD19/A25

CVS2/VS2#

CAD20/A6

CRST#/RESET

CAD21/A5CAD22/A4

VC

C2

CREQ#/INPACK#

CAD23/A3

CC/BE3#/REG#

VC

CS

K0

CAD24/A2CAD25/A1CAD26/A0

GN

D8

CVS1/VS1#

CINT#/READY

CSERR#/WAIT#

CAUDIO/BVD2

CSTSCHG/BVD1CCLKRUN#/WP

CCD2#/CD2#

VC

C1

CAD27/D0CAD28/D8CAD29/D1CAD30/D9

RS

VD

/D2

CAD31/D10

CLK_PCI_PCM<12>

PCI_IRDY#<15,19,20,25>

PM_RSMRST#<16,29>

PCI_TRDY#<15,19,20,25>

PCI_REQ#2<15>

PM_CLKRUN#<16,19,22,25,29>

PCI_PIRQC#<15,25>

PCI_SERR#<15,19,25>

PCM_RI#<30>

PCI_GNT#2<15>

PCM_PME#<19,25,29>PCM_SUSP#<29>

PCM_SPK# <23>

PCI_DEVSEL#<15,19,20,25>

PCI_PAR<15,19,20,25>

PCIRST#<7,13,15,19,20,22,25,31>

PCI_STOP#<15,19,20,25>

PCI_CBE#[0..3]<15,19,20,25>

PCI_FRAME#<15,19,20,25>

PCI_PERR#<15,19,20,25>

SIRQ<15,22,29,31>

PCI_AD[0..31]<15,19,20,25>

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

H H

G G

F F

E E

D D

C C

B B

A A

0 = 02Eh

Base I/O Address

1 = 04Eh*

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

For SW debug use when no seial port

LA-1701 1.0

LA-XXXX

Custom22 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

DSKCHG#

LPTSTB#

WDATA#

CLK_14M_SIO

LPD6

FDDIR#

LPTBUSY

STEP#

LPD0

TRACK0#

WGATE#

INDEX#

LPTSLCT

PID3

LPD3

DSR2#

HDSEL#

IRMODE

LPTINIT#

WDATA#

LPD5

RDATA#

RI2#

FDDIR#

WGATE#

LPC_PME#

CTS1#

CLK_PCI_SIO

LPTPE

DCD2#

RXD2

WP#

MTR0#

DTR1#

LPC_SMI#

LPD4

LPTSLCTIN#

RXD2

LPC_SMI#

LPTACK#

LPD1

DRV0#

LPTAFD#

3MODE#

DCD2#

PID2

LPC_AD1

DCD#1

PID1

LPC_FRAME#

LPC_AD3

CTS2#

LPD2

RXD1

3MODE#MTR0#

RI1#

DSR1#RTS1#

PID0

LPC_AD0

PID2

IRTXOUT

LPC_AD2

PID3

CTS2#

LPC_PME#

RI2#

DRV0#

LPD[0..7]

STEP#

CLK_14M_SIO

RXD1

PID1

CLK_PCI_SIO

LPTERR#

PID0

TXD1

IRRX

LPD7

DSR2#

HDSEL#

SIRQ

RDATA# RI1#

DSR1#RTS1#

DCD#1

CTS1#

RXD1

DTR1#

TXD1

INDEX#

WP#

DSKCHG#

TRACK0#

RI1#

DSR1#CTS1#

DCD#1

+3VS

+3VS

+5VS

+5VS

+5VS

+3VS

+3VS

+3VS

+3VS

+5VS

+5VS

+5VS

+3VS

+3VS

RP4

4.7K_8P4R_0804_5%

1 82 73 64 5

C3420.1U_0402_10V6K

1

2

R312 10K_0402_5%1 2

R53 1K_0402_5%12

R307 10K_0402_5%1 2

U33

SMsC LPC47N227

3028

1

13

3

5

89

1011

1415

16

12

4

2

8382

81

66

67

80

797877

6869707172737475

19

95

92

96

94

979899100

849190

8586878889

7316076

65

29

636162

53

20212223

2425

2627

18

17

93

632333435363738394041424344454647

48

49

50

5152

545556575859

64

SIRQCLKRUN#

DRVDEN0

INDEX#

MTR0#

DS0#

DIR#STEP#

WDATA#WGATE#

TRK0#WRTPRT#

RDATA#

HDSEL#

DSKCHG#

DRVDEN1

STROBE#/DS0#AUTOFD#/DRVDEN0#

ERROR#/HDSEL#

INIT#/DIR#

SLCTIN#/STEP#

ACK#/DS1#

BUSY/MTR1#PE/WDATA#

SLCT/WGATE#

PD0/INDEX#PD1/TRK0

PD2/WRTPRT#PD3/RDATA#

PD4/DSKCHG#PD5

PD6/MTR0#PD7

CLK14

RXD2

RI2#

TXD2

DCD2#

DSR2#RTS2#CTS2#DTR2#

RXD1DCD1#

RI1#

TXD1DSR1#RTS1#CTS1#DTR1#

VSSVSSVSSVSS

VCC

PCICLK

IRMODE/IRRX3IRRX2IRTX2

VCC

LAD0LAD1LAD2LAD3

LFRAME#LDRQ#

PCIRST#LPCPD#

VTR

IO_PME#

VCC

GPIO24GPIO30GPIO31GPIO32GPIO33GPIO34GPIO35GPIO36GPIO37GPIO40GPIO41GPIO42GPIO43GPIO44GPIO45GPIO46GPIO47

GPIO10

GPIO11/SYSOPT

GPIO12/IO_SMI#

GPIO13/IRQIN1GPIO14/IRQIN2

GPIO15GPIO16GPIO17GPIO20GPIO21GPIO22

GPIO23/FDC_PP

C65

0.1U_0402_10V6K

1

2

C370

0.1U_0402_10V6K

1

2

R63 10K_0402_5%1 2

RP3

4.7K_8P4R_0804_5%

1 82 73 64 5

R297 10K_0402_5%12

C360

0.1U_0402_10V6K

1

2

R78 10K_0402_5%1 2

R54 1K_0402_5%1 2

R401 10K_0402_5%1 2

C854.7U_0805_10V4Z

1

2

R811K_0402_5%

12

R309@10_0402

12

R324@33_0402

12

JP10

@96212-1011S

123456789

10

12345678910

R225

@1K_0402_5%

12

RP71

100K_8P4R_0804_5%

1 82 73 64 5

RP70

1K_8P4R_0804_5%

1 82 73 64 5

C369@15PF_0402

12

C397@22PF_0402

12

R80@1K_0402_5%

12

RP5

1K_10P8R_1206_5%

109876

12345

IRTXOUT <26>

PID2<13>

DCD#1 <33>

LPC_AD3<16,29,31>

LPTSTB# <26,33>

LPC_AD1<16,29,31>

RXD1 <33>

LPC_AD2<16,29,31>

CLK_PCI_SIO<12>

RI#1 <30,33>

RTS#1 <33>

LPTSLCT <26,33>

LPC_AD0<16,29,31>

LPTAFD# <26,33>

LPC_DRQ#1<16>

LPTERR# <26,33>

PID0<13>

TXD1 <33>

IRMODE <26>

PID3<13>

PCIRST#<7,13,15,19,20,21,25,31>

LPD[0..7] <26,33>

LPTINIT# <26,33>

IRRX <26>

PID1<13>

DTR#1 <33>

SIRQ<15,21,29,31> LPTACK# <26,33>

LPTSLCTIN# <26,33>CLK_14M_SIO<12>

CTS#1 <33>

PM_CLKRUN#<16,19,21,25,29>

LPC_FRAME#<16,29,31>

LPTBUSY <26,33>LPTPE <26,33>

DSR#1 <33>

A

A

B

B

C

C

D

D

E

E

F

F

G

G

H

H

1 1

2 2

3 3

4 4

External

X X

14.318MHZ

R365 R363 FREQ. SEL

StuffStuff

Crystal

GND

24.576MHZ

GNDA

W=40Mil

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LA-1701 1.0

AC97 CODEC

Custom23 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

AFILT3

SUSP#

AFILT2

DLINE_IN_RC_L

MD_SPKR

DLINE_IN_R_L

MONO_INR

DLINE_IN_RC_R

DLINE_IN_R_R

MD_SPKRC

CDGNDA

AUD_REF

MONO_INR

MDMIC

AFILT1

CDROM_R_R

CD_GNA

AFILT4

CDROM_R_L

CDROM_RC_L

CDROM_RC_R

+3VS_CODEC

+5VAMP_CODEC

GNDA

MDC_AUDIO_MONRCMDC_AUDIO_MONR

CLK_14M_CODEC

MONO_IN MONO_INC

+5VAMP

+3VALW

+3VALW+3VALW

CODEC_REF

+5VS

+5VAMP

+3VALW

+3VALW

+3VS

VDDA_CODEC

+5VS

VDDA_CODEC

+5VAMP

+5VS +5VAMP

+5VAMP_CODEC

+5VSR89

560_0402_5%1 2

R84

10K_0402_1%1 2

C494@0.1U_0402_16V4Z

1

2 C189

270P_0402_50V7K

1 2

R209 4.7K_0402_5%12

R18210K_0402_1%

12

R216 1.3K_0402_5%1 2

R388 0_0402_5%12

R220 4.7K_0402_5%1 2

R360

4.7K_0402_5%

12

C178 270P_0402_50V7K1 2

R92@10K_0402_5%

12

U4F

SN74LVC14APWLE_TSSOP14

1213

147

OI

PG

R363 1K_0402_5%1 2

C4720.1U_0402_16V4Z

1

2

R444 4.7K_0402_5%1 2

C990.22U_0603_10V7K

1

2

C1494.7U_0805_6.3V6K

1

2

C207

@1U_0603_10V6K

1

2

R1742.4K_0402_5%

1 2

R214 1.3K_0402_5%1 2

R365 1K_0402_5%1 2

R211 4.7K_0402_5%12

C160

0.1U_0402_16V4Z

1

2

R367 33_0402_5%1 2

R427

39.2K_0402_1%

1 2

R387 10K_0402_5%1 2

U4D

SN74LVC14APWLE_TSSOP14

89

147

OI

PG

R82100K_0402_1%

12

C478

0.1U_0402_16V4Z

1

2

R411 10K_0402_5%12

C211 1U_0603_10V6K1 2

C487 1U_0603_10V6K1 2

C168

4.7U_0805_6.3V6K

1

2

C483 0.1U_0402_16V4Z1 2

C214 1U_0603_10V6K1 2

R175@10_0402_5%

12

C1970.1U_0402_16V4Z

1

2

C209 1U_0603_10V6K1 2

R176

28.7K_0603_1%1 2

L35 @0_0805_5%1 2

R18110K_0402_1%

12

C179

@0.1U_0402_16V4Z

1

2

R357

@4.7K_0402_5%

12

R190 @30K_0603_1%1 2

C16310U_0805_10V4Z

1

2

R378 33_0402_5%12

C47310U_1206_6.3V6M

1

2

C1650.1U_0402_10V6K

1

2

C183

@100P_0402_50V8K

12

R219 4.7K_0402_5%1 2

R90

560_0402_5%1 2

R192 0_1206_5%1 2

C167

1U_0603_10V6K

1 2

C1080.1U_0402_16V4Z

1

2

C164@15P_0402_50V8J

1

2

C115

1U_0603_10V6K

12

R199 0_0402_5%12

C155

@0.1U_0402_16V4Z

12

R88

560_0402_5%1 2

C185

270P_0402_50V7K

1 2

R381 33_0402_5%1 2

U4E

SN74LVC14APWLE_TSSOP14

1011

147

OI

PG

R184 0_0402_5%12

L36

FBM-L10-160808-301-T_06031 2

C4680.1U_0402_16V4Z

1

2

R215 2.7K_0402_5%1 2

L37

FBM-L10-160808-301-T_06031 2

U19

SI9182DH-AD_MSOP8

4

8

5

3

6

7 1

2

VIN

SD

VOUT

GND

SENSE or ADJ

ERROR CNOISE

DELAY

C114

1U_0603_10V6K

12

D11RB751V_SOD323

21

R189

@1M_0402_5%12

C210 1U_0603_10V6K1 2

L9 0_1206_5%1 2

C493

@0.1U_0402_16V4Z

1

2

R218 @10K_0402_5%1 2

R212 4.7K_0402_5%12

R193

@10K_0402_1%

12

C198

@10U_1206_6.3V6M~D

1

2

C

BE

Q242SC2411K_SOT23

1

2

3

R3610_0402_5%

12

U23

@LP3965-ADJ

2 1

5 3

4

VIN SD

GND VOUT

ADJ

C1701U_0603_10V6K

12

R213 4.7K_0402_5%12

C204

0.1U_0402_16V4Z

12

C477

@0.1U_0402_16V4Z

12

C162@22P_0402_50V8J

1

2

U7

SN74AHCT1G125GW_SOT353-5

2 41

35

A YOE

#G

P

C156

0.01U_0402_25V7Z

1

2

C1610.1U_0402_16V4Z

1

2

Y3

@24.576MHz

C208 1U_0603_10V6K1 2

U22

AD1981B_LQFP48

14

15

17

16

23

24

18

20

19

21

22

13

12

35

36

37

11

10

6

5

8

2

3

2930

28

27

1 925 38

32

46

47

48

47

39

41

31

33

34 43

44

45

4026

42

AUX_L

AUX_R

JS0

JS1

LINE_IN_L

LINE_IN_R

CD_L

CD_R

CD_GND

MIC1

MIC2

PHONE

NC

LINE_OUT_L

LINE_OUT_R

MONO_OUT

RESET#

SYNC

BIT_CLK

SDATA_OUT

SDATA_IN

XTL_IN

XTL_OUT

AFILT1AFILT2

VREFOUT

VREF

DV

DD

1

DV

DD

2

AV

DD

1

AV

DD

2

AFILT4

ID1

EAPD

SPDIFO

DVSS1DVSS2

HP_LOUT_L

HP_LOUT_R

AFILT3

AVSS4

AV

DD

4

AV

DD

3

AVSS3

ID0

AVSS2AVSS1

NC

C188@22P_0402_50V8J

1

2

L10 0_1206_5%1 2

R377 33_0402_5%12

C212 @1U_0603_10V6K1 2

R217 @1K_0402_5%1 2

L34 0_0805_5%1 2

C113

1U_0603_10V6K

12

C4820.1U_0603_16V7K

1

2

C205

@0.1U_0402_16V4Z

1

2

C1500.1U_0402_10V6K

1

2

C159 1U_0603_10V6K1 2

C2131U_0603_10V6K1 2

C182 270P_0402_50V7K1 2

C474

@0.1U_0402_16V4Z

12

R210 1.1K_0402_5%12

R17710K_0603_1%

12

C2021U_0603_10V6K

1

2

C1720.1U_0402_16V4Z

1

2

PCM_SPK#<21>

SPDIFO<33>

AC97_SYNC<16,25,28>

EAPD<24>

SUSP# <29,34,38>

AC97_SDIN0 <16>

AC97_BITCLK <16,25,28>

DLINE_IN_R<33>

BEEP#<29>

AC97_RST#<16,25,28>

CLK_14M_CODEC <12>

SB_SPKR<16>

MDC_AUDIO_MON<25>

CDROM_L<18>

MIC1<28>

DLINE_IN_L<33>

CDROM_R<18>

AC97_SDOUT<16,25,28>

MD_SPK<25,28>

CD_AGND<18>

HPS<24>

LINE_OUTR <24>

LINE_OUTL <24>

MD_MIC <25,28>

MIC2<28>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

40mils

1

6 dB

GAIN0

Gain Settings

GAIN1 SE/BTL# Av(inv)

10 dB

15.6 dB

21.6 dB

4.1 dB

0 0

0

01

1 1

X X

0

0

0

0

1

LA-1701 1.0

AMP & Audio Jack

Custom24 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

SPKR-

SPKL+_C

SPKR+_C

SPKL-

EAPD#

SPK_L-

SPK_R+SPK_R- SPKR-

SPKL-

L_HP_C

HPS

SPK_L+

HPSHP_PLUG

LINE_C_OUTR

R_HP_C

LINE_R_OUTR

LINE_C_OUTL

LINE_R_OUTL

EAPD#

SPKL+_C

SPKR+_C SPKR+

SPKL+

+5VAMP

+5VAMP

+5VAMPP

+5VAMP

+5VAMP

+5VAMP

R413 @0_0402_5%1 2

L12 0_1206_5%1 2

R162 0_0402_5%1 2

R432

100K_0402_5%

12

C1750.1U_0603_25V7M

1

2

R159100K_0402_5%

12

C216 0.47U_0603_10V7K1 2

L11 0_1206_5%1 2

C489 0.47U_0603_10V7K1 2

C176 0.47U_0603_10V7K1 2

R391

@100K_0402_5%

12

G

D

S

Q512N7002 1N_SOT23

2

13

C194

47P_0402_50V8J

1

2

R393

100K_0402_5%

12

C196

47P_0402_50V8J

1

2

C490 0.47U_0603_10V7K1 2

C4880.1U_0603_25V7M

1

2

R4280_0402_5%

12

R392

100K_0402_5%

12

R414 0_0402_5%1 2

R4290_0402_5%

12

R420

100K_0402_5%1 2

U21TC7SH32FU_SSOP5

2

14

35

I0

I1O

GP

C562

0.1U_0603_16V7K

1

2

+

C565 100U_6.3V_M1 2

R394

@100K_0402_5%

12

U24

TPA0312PWP_TSSOP24~D

718

23

20

14

22

192413

2116

8

121

49

15

17

10

6

5

11

23

PV

DD

1P

VD

D2

RLINEIN

RHPIN

PC-BEEP

SHUTDOWN#

VD

DG

ND

4G

ND

3

ROUT+ROUT-

RIN

GN

D2

GN

D1

LOUT+LOUT-

SE/BTL#

HP/LINE#

LIN

LHPIN

LLINEIN

BYPASS

GAIN0GAIN1

C201 0.022U_0603_25V7K1 2

L15 0_1206_5%1 2

+ C206

@150U_D2_6.3VM

1

2

C215 0.47U_0603_10V7K1 2

C174 0.022U_0603_25V7K1 2

R416 @0_0402_5%1 2

C492

10U_1206_6.3V7K

1

2

L17 0_1206_5%1 2

C217

0.47U_0603_10V7K

1

2

R419 0_0402_5%1 2

C195

47P_0402_50V8J

1

2

C193

47P_0402_50V8J

1

2

L16 0_1206_5%1 2

JP18

R-SPK CONN.

12

12

R163 @0_0402_5%1 2

+

C566 100U_6.3V_M1 2

JP19

L-SPK CONN

12

12

EC_MUTE#<28,29>

SPKR+ <28>

SPKL+ <28>

HPS <23>HP_PLUG<28>

DOCK_HPS<33>

LINE_OUTR<23>

EAPD<23>

EAPD# <28>

LINE_OUTL<23>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

W=40mils

RINGTIP

W=40mils

W=40mils

W=40mils

W=30mils

W=40milsW=30mils

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1701 1.0

Mini PCI Slot

25 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

PCI_AD2

PCI_AD27

PCI_CBE#0

MINI_IDSEL

PCI_AD6

PCI_GNT#4

PCI_AD20

PCI_AD23

PCI_AD0

PCI_AD17

PCI_STOP#

PCI_AD12

PCI_DEVSEL#

PCI_AD31

MODEM_RI#

PCI_AD1

PCI_TRDY#

PCI_GNT#3

PCI_CBE#2

PCI_AD25

AC97_SDOUT

PCI_CBE#1

MDC_AUDIO_MON

AC97_SDIN2

PCI_AD22

PCI_IRDY#

PCI_AD3

PCI_AD16

PCI_AD4

CLK_PCI_MINI

PCI_AD14

PCI_AD19

PCI_AD8

AC97_SYNC

PCI_FRAME#

PCI_AD[0..31]

PCI_REQ#3

PCI_AD24

MD_SPK

PCI_AD30

PCI_SERR#

MD_MIC

AC97_BITCLK

PCI_AD18

PCI_AD10

PCI_AD5

PCI_AD28

PCI_AD9

PCI_AD13

PCI_AD29

CLK_PCI_MINI

PCI_AD18

AC97_RST#

PCI_AD7

PCI_AD11

PCI_PERR#

PCI_AD21

PCI_AD15

PCI_AD26

PCI_PIRQC#

PCI_PIRQD#

+3VAUX

+5VS

+5VS

+5VS

+3VS

+3VALW

+3VALW

+3VS

+3VS

+5VS

+5VS

+3VALW +3VAUX

R2981K_0402_5%1 2

R721K_0402_5%1 2

C770.01U_0402_16V7K

1

2

C960.01U_0402_16V7K

1

2

R70 @0_0402_5%1 2

C106

0.01U_0402_16V7K

1

2

C7410U_1206_6.3V6M

1

2

Q16SI2301DS_SOT23

2

13

KEY KEY

JP28

Mini-PCI SLOT

1 2

3 45 67 89 10

11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 5051 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 8081 8283 8485 8687 8889 9091 9293 9495 9697 9899 100

101 102103 104105 106107 108109 110111 112113 114115 116117 118119 120121 122123 124

127 128

1 2

3 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 5051 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 8081 8283 8485 8687 8889 9091 9293 9495 9697 9899 100101 102103 104105 106107 108109 110111 112113 114115 116117 118119 120121 122123 124

127 128

C750.01U_0402_16V7K

1

2

R76100_0402_5%

1 2

R69 0_0402_5%1 2

C900.1U_0402_16V7K

1

2

C3230.01U_0402_16V7K

1

2

C319

10P_0402_50V8K

1

2

C950.1U_0402_16V7K

1

2C1070.1U_0402_16V7K

1

2

C76@15P_0402_50V8J

12

C841U_0603_10V6K

1

2

C3224.7U_0805_6.3V6K

1

2

C974.7U_0805_6.3V6K

1

2 C1004.7U_0805_6.3V6K

1

2

R64 0_0402_5%1 2

R301

10_0402_5%

12

D17

RB751V_SOD32321

R65 @0_0402_5%1 2

PCI_CBE#0 <15,19,20,21>

AC97_SDOUT <16,23,28>AC97_BITCLK<16,23,28>

PCI_TRDY# <15,19,20,21>

PCI_PIRQD#<15>

AC97_RST# <16,23,28>

PCI_REQ#4<15>

CH_CLK <31>

AC97_SDIN2<16>

PCI_REQ#3<15>

AC97_SYNC<16,23,28>

PCI_DEVSEL# <15,19,20,21>PCI_PERR#<15,19,20,21>

PCI_CBE#2<15,19,20,21>

MD_SPK <23,28>

CLK_PCI_MINI<12>

PM_CLKRUN#<16,19,21,22,29>

PCIRST# <7,13,15,19,20,21,22,31>

PCI_CBE#3<15,19,20,21>

MODEM_RI#<30>

PCI_GNT#4 <15>

MD_MIC<23,28>

PCI_AD[0..31] <15,19,20,21>

MINI_PME# <19,21,29>

PCI_IRDY#<15,19,20,21>

Wireless_OFF#<28,29,31>

PCI_PAR <15,19,20,21>

MDC_AUDIO_MON<23>

PCI_GNT#3 <15>

PCI_SERR#<15,19,21> PCI_STOP# <15,19,20,21>

PCI_FRAME# <15,19,20,21>

PCI_CBE#1<15,19,20,21>

PCI_PIRQC#<15,21>

CH_DATA<31>

Wireless_OFF<31>

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FIR Module

Parallel Port

w=20mils

W=20mils

T = 12mil

T = 12milT = 12mil

T = 40mil

T = 20mil

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1701 1.0

LPT Port & FIR

26 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

FD2

FD3

LPTBUSY

+5V_PRN_R

LPTERR#

LPT_INIT#FD3

SLCTIN#

FD6

LPTSTB#

LPTBUSY

FD4

LPTACK#

LPTBUSY

LPTINIT#

LPTPE

FD4

IRRX

LPT_INIT#

LPTSLCT

FD0

FD1

LPD0

LPD3

LPTACK#

FD1

FD6

FD0

FD6

FD6

LPD[0..7]

LPTERR#

FD5

SLCTIN#

FD3LPT_INIT#

LPD5

IRTXOUT

FD7

FD6

LPTERR#

FD7

AFD/3M#

LPD4

AFD/3M#LPTAFD#

AFD/3M#

LPD2

LPTSLCTIN#

LPTERR#

FD7

SLCTIN#

FD1

AFD/3M#

FD0

LPTACK#SLCTIN#

SLCTIN#+5V_PRN_R

FD2

FD2

LPT_INIT#

FD3

LPTPE

LPD6

LPTACK#

FD1

LPTPE

FD5

LPT_INIT#

LPTBUSY

LPD7

FD5

FD3

IRMODE

FD7

FD4

FD7

FD2

FD4

LPD1

FD4

FD1FD0

LPTPE

FD2FD5

LPTSLCT

LPTSLCT

FD5

FD0

LPTSLCT

+5V

S_F

IR

+5V_PRN

+5VS

+3VS

+5V_PRN

+5V_PRN

+5VS

+5V_PRN

+5V_PRN

R3 33_0402_5%1 2

R51K_0402_5%

12

TVS2 @SF10402ML080C1 2

D4

RB420D_SOT23

2 1

RP1

4.7K_10P8R_1206_5%

109876

12345

CP2

220P_1206_8P4C_50V8K

234 5

6781

R2 33_0402_5%1 2

TVS21 @SF10402ML080C1 2

R4 33_0402_5%1 2

TVS17 @SF10402ML080C1 2

TVS12 @SF10402ML080C1 2

TVS22 @SF10402ML080C1 2RP69

33_16P8R_1206_5%

123456789

10111213141516

TVS24 @SF10402ML080C1 2

TVS18 @SF10402ML080C1 2

+ C233FIR@10U_TE-01_6.3VM

1

2

C219

FIR@0.1U_0402_10V6K

1

2

TVS15 @SF10402ML080C1 2

C218

FIR@0.1U_0402_10V6K

1

2

TVS11 @SF10402ML080C1 2

TVS16 @SF10402ML080C1 2

TVS10 @SF10402ML080C1 2

R226

FIR@10_1206

12

U25

FIR@IR_VISHAY_TFDU6101E-TR4_8P

2

875

1

46

3IRED_C

GNDMODE

SD/MODE

IRED_A

RXDVCC

TXD

CP1

220P_1206_8P4C_50V8K

234 5

6781

+C220

FIR@22UF_10V_1206

12

TVS23 @SF10402ML080C1 2

TVS14 @SF10402ML080C1 2

TVS20 @SF10402ML080C1 2

CP4

220P_1206_8P4C_50V8K

234 5

6781

R227

FIR@10_1206

12

CP3

220P_1206_8P4C_50V8K

234 5

6781

C90.1U_0402_16V7K

1

2

TVS13 @SF10402ML080C1 2

R1 33_0402_5%1 2

TVS19 @SF10402ML080C1 2

JP2

LPTCN-25-SUYIN

1325122411231022

921

820

719

618

517

416

315

214

1

RP2

4.7K_10P8R_1206_5%

109876

12345

C232FIR@0.1U_0402_10V6K

1

2

TVS1 @SF10402ML080C1 2

IRTXOUT <22>

LPTINIT#<22,33>

LPTAFD#<22,33>

IRMODE <22>

LPTPE<22,33>

IRRX <22>

LPTSLCT<22,33>

LPTSTB#<22,33>

LPTERR#<22,33>

LPTACK#<22,33>

LPTBUSY<22,33>

LPD[0..7]<22,33>

LPTSLCTIN#<22,33>

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

W=40mils

USB CONNECTOR 2

W=40mils

USB CONNECTOR 1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

USB CONNECTOR 3

W=40mils

LA-1701 1.0

USB Connector

Custom27 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

USB4D-

OVCUR#0

USB_VCCC

USB0D+

OVCUR#2

USB4D-

USB0D-

USB0D-

USB4D+

USB4D+

USB0D+

USB1D-

USB1D+USB1D-

USB1D+

USB_VCCA

USB_VCCA

+5V USB_VCCA

USB_VCCC

USB_VCCA

+5V

R266560K_0402_5%

12

TVS31

@SF10402ML080C

1

2

+C252

150U_D2_6.3VM

1

2

L260_0603_5%12

C2541000P_0402_50V7K

1

2

TVS26

@SF10402ML080C

1

2

TVS30

@SF10402ML080C

1

2

C278

4.7U_0805_10V4Z

1

2

TVS28

@SF10402ML080C

1

2

TVS33

@SF10402ML080C

1

2

L280_0603_5%

12

C2711000P_0402_50V7K

1

2

R259470K_0402_5%

12

JP6

USB_CONN1

1234

VCCD-D+GND

L290_0603_5%

12

C2691000P_0402_50V7K

1

2

TVS32

@SF10402ML080C

1

2

C2731000P_0402_50V7K

1

2

JP7

USB_CONN1

1234

VCCD-D+GND

L300_0603_5%12

C2720.1U_0402_10V6K

1

2

L310_0603_5%

12

U27

RT9701-CBL_SOT23_5

34

15

2

VINVIN/CE

VOUTVOUT

GND C2610.1U_0402_10V6K

1

2

C279

4.7U_0805_10V4Z

1

2

TVS29

@SF10402ML080C

1

2

C2661000P_0402_50V7K

1

2

+C251150U_D2_6.3VM

1

2

+C253150U_D2_6.3VM

1

2

L24

@DLW21SN900SQ2

1

4

2

3

L23

@DLW21SN900SQ2

1

4

2

3

R244

560K_0402_5%

12

TVS25

@SF10402ML080C

1

2

U26

RT9701-CBL_SOT23_5

34

15

2

VINVIN/CE

VOUTVOUT

GND

R243470K_0402_5%

12

TVS27

@SF10402ML080C

1

2

C2700.1U_0402_10V6K

1

2

JP8

USB_CONN1

1234

VCCD-D+GND

L270_0603_5%

12

L25

@DLW21SN900SQ2

1

4

2

3

OVCUR#4 <16>

OVCUR#0 <16>

USB20P0+<16>

USB20P4+<16>

USB20P4-<16>

USB20P0-<16>

USB20P1-<16>

USB20P1+<16>

WHEN R=0,Vbe=1.35V

ON/OFF BUTTON

INT_KBD CONN.MDC Conn.

FUN. BUTTON BD.

WHEN R=33K,Vbe=0.8V

LID SW

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

TP & LED BD.

Power button

GREEN

LA-1701 1.0

MDC/BT/KBD/ON_OFF/LID

28 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

KSI[0..7]

ON/OFF

KSO[0..10]

ON/OFFBTN#

MUTE#EC_MUTE_IN#

VOL_DW#VOL_UP#

POWER1_LED#

CHARGING_LED#

TP_DATATP_CLK

TP_DATA

FULL_LED#

HP_PLUG

CHARGING_LED#TP_CLK

SPKL+

Wireless_OFF#BT/WL_ON/OFF#

MIC1

DEV_LED#

Wireless_OFF#

DEV_LED#

SPKR+

FULL_LED#

POWER1_LED#

BT/WL_ON/OFF#

TP_ON/OFF#TPAD_LED# TPAD_LED#

TP_ON/OFF#

ON/OFF

KSO5KSO2KSO0

KSO7

KSI1

KSI7

KSO4

KSI0KSI4

KSO9

KSO1 KSI6

KSI3

KSI2

KSO8

KSO6

KSO3

KSI4

KSO2

KSO1

KSO7

KSI2

KSO4

KSO0

KSO10

KSI0

KSI1

KSO9

KSI3

KSI5KSI6

KSO5

KSO6

KSO8KSO3

KSI7

KSIN14KSIN8KSIN12KSIN10

KSIN13KSIN11KSIN9

DLINE_OUT_RDLINE_OUT_L

MIC2

DLINE_OUT_R

SPKR+SPKL+

MIC1

HP_PLUG

MIC2

DLINE_OUT_L

KSI3

KSO1

KSIN11

KSO10

KSIN13

KSO5

KSIN10

KSO0KSO2

KSI7

KSO9

KSO4

KSI4

KSI6

KSI1KSI2

KSO3

KSI5

KSI0

KSIN9

KSO8

KSIN14

KSIN12KSIN8

KSO7KSO6

EC_MUTE#

EAPD#MUTE#

KSI5

KSO10

LID_SW#

+3VS

+5VS

+5VALW

+3VALW

+3VS

+5VS

+3VALW

+5VS

+3V

+3VMDC

+3VMDC

+3VALW

+5VS

+5VALW

+5V

CODEC_REF

+5VALW

+5V

CODEC_REF+5VAMP_CODEC

+5VAMP_CODEC

+5VAMP_CODEC

+5VS

+5VS +5VS

JP24

FUN. BUTTON CONN.

123456

123456

C2000.1U_0402_10V6K

1

2

C463MDC@4.7UF_10V_0805

12

SW1

STS-KB5_5P

3

2

1

4

5

CP7

100P_1206_8P4C_50V8

234 5

6781

22K

22K

Q44

DTC124EK_SOT23

2

13

CP9

100P_1206_8P4C_50V8

234 5

6781

C4950.1U_0402_10V6K

1

2CP6

100P_1206_8P4C_50V8

234 5

6781

R329100K_0402_5%

12

JP20

SW BD CONN

1357911131517192123252729313335373941434547495153555759

2468

1012141618202224262830323436384042444648505254565860

13579

11131517192123252729313335373941434547495153555759

24681012141618202224262830323436384042444648505254565860

R330

4.7K_0402

12 R334

0_0402_5%1 2

D21

DAN202U_SC70

2

31

C4210.01U_0402_16V7K

1

2

CP5

100P_1206_8P4C_50V8

234 5

6781

C1990.1U_0402_10V6K

1

2

R421

150_0402_5%

12

R431 0_0402_5%1 2

C173MDC@0.1U_0402_10V6K

1

2

C157MDC@0.1U_0402_10V6K

1

2

D26

17-21/GVC-AMPB/3T_GRN

21

CP8

100P_1206_8P4C_50V8

234 5

6781

C158MDC@1000PF_0402

12

D28

@SM05_SOT23

1

32

L33 @0_060312

G

D

SQ43

@2N7002

2

13

L32 @0_060312

R352MDC@22_0402

12

JP16

MDC@AMP 3-1473290-0

13579

111315

2321

1719

252729

24681012141618202224262830

MONO_OUT/PC_BEEPGNDAUXA_RIGHTAUXA_LEFTCD_GNDCD_RIGHTCD_LEFTGND

AC97_SDATA_OUT+3.3Vmain

+3.3Vaux/BT_VCCGND

AC97_RESET#GNDAC97_MSTRCLK

AUDIO_PWRDN/DETECHMONO_PHONE

RESERVED/BT_ON#GND

+5VmainRESERVED/USB+RESERVED/USB-

RESERVED/PRIMARY_DNRESERVED/+5VD/WAKEUP

RESERVED/GNDAC97_SYNC

AC97_SDATA_IN1AC97_SDATA_IN0

GNDAC97_BITCLK

TVS3

@SF10402ML080C

1

2

C466MDC@0.1U_0402_10V6K

1

2

R350MDC@22_0402

12

JP21

K/B CONN.

13579

11131517192123252729313335373941434547495153555759

24681012141618202224262830323436384042444648505254565860

1357911131517192123252729313335373941434547495153555759

2468

1012141618202224262830323436384042444648505254565860

C169

MDC@1000PF_0402

12

R348 @0_08051 2

R349 MDC@0_08051 2

D22RLZ20A_LL34

12

SW2

HORNG CHIH

2

4

1

3

R430 @0_0402_5%1 2

BT_ON# <30>

51_ON# <35>

ON/OFFBTN# <29>

EC_ON<29>

MD_MIC<23,25>

LID_SW#<29>

USB20P5+ <16,31>

BT_DETACH <30>

ON/OFF<33>

KSI[0..7]<29>MD_SPK <23,25>

USB20P5- <16,31>

KSO[0..10]<29>

AC97_SDIN1 <16>

AC97_BITCLK <16,23,25>

BT_WAKE_UP <29>

BT_PRES# <30>

AC97_RST#<16,23,25>

AC97_SYNC <16,23,25>AC97_SDOUT<16,23,25>

VOL_UP# <30>VOL_DW# <30>

EC_MUTE_IN# <30>

Wireless_OFF#<25,29,31>

TP_DATA<29>

BT/WL_ON/OFF#<30>

MIC1<23>

POWER1_LED#<30,33>

CHARGING_LED#<30>FULL_LED#<30>

DEV_LED#<18>

HP_PLUG<24>

TP_CLK<29>

TP_ON/OFF#<30>TPAD_LED#<30>

KSIN14<30>KSIN8<30>

KSIN12<30>KSIN10<30>

KSIN13<30>KSIN11<30>

KSIN9<30>

DLINE_OUT_R<33>DLINE_OUT_L<33>

SPKR+<24>SPKL+<24>

MIC2<23>

EC_MUTE# <24,29>

EAPD# <24>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

(BADDR1)

1 1

0

ENV0

(BADDR0)

1 0

PROG

0 1

0

DEV

0 0

0

OBD

(ENV1)

TRIS

BADDR1-0

1

IRE

I/O Address

1

TRIS=1: While in IRE and OBD, float all the signals for clip-on ISE use

(SHBM)

1

Reserved

EC DEBUG port

(HCFGBAH, HCFGBAL)+1

SHBM=1: Enable shared memory with host BIOS

1

(HCFGBAH, HCFGBAL)

0

4F2F

0

4E

Data

*

0

2E

*0

Index

0

ENV1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1701 1.0

EC PC87591L

Custom29 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

EC_TINIT#

KSI7

KBA18

KBA13

EC_SMD_1

KSO6

KSO1

KSO9

KBA8

KSO8

KBA5

DEV_ID0

EC_TCK

EC_SMD_2

ADB3

ADB0

EC_TMS

EC_SMC_2

EC_SMC_1

KSI4

KSI2

ADB1

ADB[0..7]

KBA16LID_SW#

EC_SMC_1

SELIO#

KSI[0..7]

DEV_ID2

DEV_ID2

KBA10

DEV_ID1FREAD#

CRY1

CONA

KSO0

KBA3

BT_WAKE_UP

KSO10

EC_TINIT#

MSEN#

KBA[0..19]

EC_TDI

FSEL#

KBD_CLK

SELIO#

FSEL#

KBA15

SCI#

KBA4

KBA5

EC_SMI#

DEV_ID1

TP_CLK

EC_SMD_2

KSO2

DEV_ID1

EC_SMI#

EC_TCK

GATEA20KBA1

KBA3 PCI_PME#

KSI1

EC_TMS

FREAD#

ECAGND

LID_SW#

KBA12

CONA

KBA2KBD_DATA

TP_DATA

PS2_CLKPS2_DATA

FWR#

KBA1

KBA7

KSO5

EC_TDI

ADB7

PCI_PME#

KSI5

KSI0

ECAGND

RC#

KBA11

CRY2

KBA0

ECAGND

ADB6

KBD_CLK

CLK_PCI_LPC

KSI3

KBA17

EC_SMD_1

DEV_ID0

KBA14

EC_SMC_2

KSO3

MSEN#

KSO[0..10]

KSO4

KBA6

EC_TDO

ADB4

KSI6

ADB2

EC_TDO

CLK_PCI_LPC

KBA9

KBD_DATA

KSO7

ADB5

EC_RST#

DEV_ID2

DEV_ID0

ADP_IR

KBA2

KBA19

TP_CLKTP_DATA

PS2_DATAPS2_CLK

+3VALW

+3VALW

+3VALW

EC_AVCC

+3VS

+5V

RTCVREF

+5VALW

+3VALW

+3VALW

+3VALW

+3VS

+3VALWEC_AVCC

+5V

+5VALW

+3VALW

+3VALW

RP6

10K_10P8R_1206_5%SD307100207

109876

12345

R14610K_0402_5%

12

RP10

10K_8P4R_0804_5%SD309100200

1 82 73 64 5

C1281U_0603_10V6K1

2

RP12

10K_8P4R_0804_5%

1 82 73 64 5

R99 20K_0402_5%1 2

R142

10_0402_5%

12

C153

10P_0402_50V8K

1

2

Host interface

Key matrix scan

JTAG debug port

PS2 interface

AD Input

DA output

PWMor PORTA

PORTB

PORTC

PORTE

PORTH

PORTI

PORTJ-1

PORTD-1

PORTD-2 PORTJ-2

PORTK

PORTL

PORTM

U15

PC87591L-VPCN01 A2_LQFP176

56

15141310

19

9

7

18

31

2223

8

16 34 45 123

136

95 161

7172737477787980

49505152535657585960616465666768

106

108107

105

109

110111114115116117118119

158

160

81828384878889909394

99100101102

3233363738394043

153154162163164165

1681691701711721751761

2442425

124125126127128131132133

138139140141144145146147

150151

152

9617 35 46 122

159

262930

157

166

167

137

41425455

626369707576 143

142135134130129121120

113112104103

148149155156

34

2728

48

173174

47

12 20 21 85 86 91 92 97 9811

GA20/IOPB5KBRST/IOPB6

LAD0LAD1LAD2LAD3

RESET1#

LFRAME#

SERIRQ

LCLK

IOPD3/ECSCI#

SMI#PWUREQ#

LDRQ#

VD

D

VC

C1

VC

C2

VC

C3

VC

C4

AV

CC

VB

AT

KBSIN0KBSIN1KBSIN2KBSIN3KBSIN4KBSIN5KBSIN6KBSIN7

KBSOUT0KBSOUT1KBSOUT2KBSOUT3KBSOUT4KBSOUT5KBSOUT6KBSOUT7KBSOUT8KBSOUT9KBSOUT10KBSOUT11KBSOUT12KBSOUT13KBSOUT14KBSOUT15

TCK

TDITDO

TINT#

TMS

PSCLK1/IOPF0PSDAT1/IOPF1PSCLK2/IOPF2PSDAT2/IOPF3PSCLK3/IOPF4PSDAT3/IOPF5PSCLK4/IOPF6PSDAT4/IOPF7

32KX1/32KCLKIN

32KX2

AD0AD1AD2AD3

IOPE0AD4IOPE1/AD5IOPE2/AD6IOPE3/AD7

DP/AD8DN/AD9

DA0DA1DA2DA3

IOPA0/PWM0IOPA1/PWM1IOPA2/PWM2IOPA3/PWM3IOPA4/PWM4IOPA5/PWM5IOPA6/PWM6IOPA7/PWM7

IOPB0/URXDIOPB1/UTXD

IOPB2/USCLKIOPB3/SCL1IOPB4/SDA1

IOPB7/RING/PFAIL/RESET2

IOPC0IOPC1/SCL2IOPC2/SDA2

IOPC3/TA1IOPC4/TB1/EXWINT22

IOPC5/TA2IOPC6/TB2/EXWINT23

IOPC7/CLKOUT

IOPE4/SWINIOPE5/EXWINT40

IOPE6/LPCPD/EXWIN45IOPE7/CLKRUN/EXWINT46

IOPH0/A0/ENV0IOPH1/A1/ENV1

IOPH2/A2/BADDR0IOPH3/A3/BADDR1

IOPH4/A4/TRISIOPH5/A5/SHBM

IOPH6/A6IOPH7/A7

IOPI0/D0IOPI1/D1IOPI2/D2IOPI3/D3IOPI4/D4IOPI5/D5IOPI6/D6IOPI7/D7

IOPJ0/RDIOPJ1/WR0

SELIO#

AG

ND

GN

D1

GN

D2

GN

D3

GN

D4

GN

D5

IOPD0/RI1/EXWINT20IOPD1/RI2/EXWINT21

IOPD2/EXWINT24/RESET2

VC

C5

VC

C6

GN

D6

GN

D7

IOPD4IOPD5IOPD6IOPD7

IOPJ2/BST0IOPJ3/BST1IOPJ4/BST2IOPJ5/PFSIOPJ6/PLIIOPJ7/BRKL_RSTO IOPK0/A8

IOPK1/A9IOPK2/A10IOPK3/A11IOPK4/A12

IOPK5/A13_BE0IOPK6/A14_BE1

IOPK7/A15_CBRD

IOPL0/A16IOPL1/A17IOPL2/A18IOPL3/A19

IOPM0/D8IOPM1/D9IOPM2/D10IOPM3/D11IOPM4/D12IOPM5/D13IOPM6/D14IOPM7/D15

IOPL4/WR1#

SEL0#SEL1#CLK

NC

2N

C3

NC

4N

C5

NC

6N

C7

NC

8N

C9

NC

10

NC

1

R62100K_0402_5%

12

R443@0_0402_5%1 2

R71 10K_0402_5%1 2

R148

10K_0402_5%

1 2

JP14

@96212-1011S

12345678910

123456789

10

C116 0.01U_0402_16V7K1 2

R97 20K_0402_5%1 2

J1

JOPEN

12

R74

@10K_0402_5%1 2

R86

10K_0402_5%1 2

R96

10K_0402_5%

12

R9420M_0603_5%

1 2

C11810P_0402_50V8K

1

2

C11910P_0402_50V8K

1

2

R14510K_0402_5%

12

X1

32.768KHz_12.5P_CM155

12

C1474.7U_0805_6.3V6K

1

2

R93120K_0402_5%

12

R75

10K_0402_5%1 2

C1120.22U_0603_10V7K

1

2

R73

10K_0402_5%1 2

L8

MURATA BLM11A20PT_06031 2

R67 20K_0402_5%1 2

C860.1U_0402_16V7K

1

2

C137

0.1U_0402_16V7K1

2 C1484.7U_0805_6.3V6K

1

2

C132

0.1U_0402_16V7K

1

2

C1090.01U_0402_16V7K

1

2

RP15

10K_8P4R_0804_5%

1 82 73 64 5

C1460.1U_0402_16V7K

1

2

L7

MURATA BLM11A20PT_06031 2

C572

@1U_0603_10V6K1

2

C911000P_0402_50V7K

1

2

PM_BATLOW# <16>

SLP_S3# <16,33>

PROCHOT#<4>

EC_SMI#<16>

FANSPEED1 <4>

ACOFF <36>RC#<15>

PCM_SUSP#<21>

GATEA20<15>

DAC_BRIG <13>

SCI#<16>

KSO[0..10]<28>

RING# <30>

BKOFF#<13>

PM_CLKRUN# <16,19,21,22,25>

ENABLT#<13>

EC_SMD_1 <30,33,42>

ACIN <16,33,35,37>

SLP_S1#<12,16>

BT_WAKE_UP<28>

LPC_FRAME#<16,22,31>

VR_ON<34,39,41>

KSI[0..7]<28>

FREAD# <30>

ADB[0..7] <30>

SYSON<34,38>

LPC_AD1<16,22,31> LI/NIMH# <42>

CLK_PCI_LPC<12>

KBD_DATA<33>

FSEL#<30>

LPC_AD2<16,22,31>

SLP_S4# <16>

MSEN#<13,14,33>

LPC_AD0<16,22,31>

PM_RSMRST#<16,21>

FSTCHG <36>

KBD_CLK<33>USB20_PME#<19,21,25>

EC_SMD_2 <4>

PWRBTN_OUT# <16>

BATT_OVP <36>

KBA[0..19] <30>

SLP_S5# <16>ON/OFFBTN# <28>

CONA<33>

EN_FAN1 <4>

EC_THRM# <16>

SELIO# <30>

EC_LID_OUT# <16>

NUMLED# <30>

MINI_PME#<19,21,25>

INVT_PWM <13>

SUSP#<23,34,38>

SIRQ<15,21,22,31>

EN_WOL# <19>

BATT_TEMP <42>

LID_SW#<28>

Wireless_OFF#<25,28,31>

EC_SMC_2 <4>

EC_SMC_1 <30,33,42>

ONBD_LAN_PME#<19,21,25>

EC_MUTE# <24,28>

EC_ON <28>

LPC_AD3<16,22,31>

BEEP# <23>

ADP_I <36>

FWR# <30>

EC_RIOUT#<16>

PCM_PME#<19,21,25>

CAPSLED# <30>

B_PCIRST# <15,18>

IREF <36>

AIR_ACIN <36>

TP_CLK<28>TP_DATA<28>

PS2_CLK<33>PS2_DATA<33>

LPC_DRQ#0<16,31>

OUTPUT

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

GREEN GREEN

INPUT

LA-1701 1.0

BIOS & EC I/O Port

30 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

ADB1

ADB[0..7]

ADB5ADB4

KBA[0..19]

ADB6

ADB3ADB2

KBA2ADB7

LARST#SELIO#

ADB0

SELIO#

ADB6ADB5

ADB2

ADB7

ADB3

ADB0ADB1

ADB4

KBA1

FWE#

KBA9

KBA10

ADB1ADB0KBA0

KBA2

KBA15

FREAD#

KBA7

FSEL#ADB7

KBA8

ADB5ADB4

KBA17

KBA18

KBA1

KBA12

KBA11

ADB2

ADB6

ADB3

KBA3KBA4KBA5KBA6

KBA14KBA13

KBA16

RI#1

SELIO#

ADB4ADB3

ADB7

ADB2ADB1ADB0

ADB6ADB5

FSEL#

KBA19

KBA16

KBA11

KBA6

ADB4

KBA12

KBA0

ADB3

FWE#

KBA7

FREAD#

RESET#

KBA17

KBA1

ADB5

KBA13

ADB0

KBA18

KBA10

KBA2

ADB6

KBA14

ADB1

KBA9

KBA3

KBA5

ADB7

KBA15

ADB2

KBA8

KBA4

KBA3

KBA16

KBA12

KBA2

KBA0

KBA15

ADB4

KBA17

KBA6

FWE#

RESET#

KBA8

KBA4

ADB3

KBA18

KBA3

FSEL#

ADB7

KBA13

KBA19

KBA10

ADB2

KBA9ADB6

FREAD#

KBA11

KBA5 ADB1ADB0

KBA1

ADB5

KBA14

KBA7

FWE#

+3VALW

+5VALW

+5VALW

+3VALW+3VALW

+5VS+5VS

+3VALW

+3VALW

+3VALW

+3VALW

+3VALW

+3VALW

+3VALW

+3VALW

+3VALW

+3VALW

R10

330_0402_5%

12

R11

330_0402_5%

12

D7

17-21/GVC-AMPB/3T_GRN

21

C1520.1U_0402_16V7K

1 2 R15210K_0402_5%

12

C135

0.1U_0402_16V7K

1 2

U17

SN74HCT273PW_TSSOP20

24 57 68 9

13 1214 1517 1618 19

3

11

20

1

10

Q0D1 Q1D2 Q2D3 Q3D4 Q4D5 Q5D6 Q6D7 Q7

D0

CP

VC

C

MR GN

D

U35

39F040_TSOP

91011121314151617181920212223

252627282930313212345

78

24

6

A18A16A15A12A7A6A5A4A3A2A1A0DQ0DQ1DQ2

DQ3DQ4DQ5DQ6DQ7CE*A10OE*A11

A9A8

A13A14

WE*VCC

VSS

A17

D8

RB751V_SOD323

21

R12520K_0402_5%

1 2

C93

0.1U_0402_16V7K

1 2

TVS4@SF10402ML080C_0402

1

2

R1431K_0402_5%

12

U16C

SN74LVC32APWLE_TSSOP14

9

108

147

A

BO

PG

R3710K_0402_5%

12

10K

10KC

BE

Q33

PDTA114EK_SOT23

2

31

RP13

100K_8P4R_0804_5%SD309100300

18

27

36

45

C143

1U_0603_10V6K

1 2

U11

SN74LVC244APWLE_TSSOP20

2 184 166 148 12

11 913 715 517 3

119

2010

1A1 1Y11A2 1Y21A3 1Y31A4 1Y42A1 2Y12A2 2Y22A3 2Y32A4 2Y4

1G2G

VC

CG

ND

JP31

@SUYIN-80065A-040G2T

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 40

10K

10KC

BE

Q31

PDTA114EK_SOT23

2

31

G

D

S Q11@2N7002 1N_SOT23

2

13U29

@SST39VF080-70_TSOP40

2120191817161514

87

36654321

13

2224

2526272832333435

39

40

9

3031

23

37

2938

1110

12

A0A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16

A18

CE#OE#

D0D1D2D3D4D5D6D7

GND1

A17

WE#

VCC1VCC0

GND0

A19

NC0NC1

NCRP#

READY/BUSY# D6

17-21/GVC-AMPB/3T_GRN

21

U16A

SN74LVC32APWLE_TSSOP14

1

23

147

A

BO

PG

R1441K_0402_5%

12

U20

AT24C16N10SI-2.7_SO8

12

56

8

34

7 A0A1

SDASCL

VCC

A2GND

WP

C1240.1U_0402_16V4Z

1

2

U16DSN74LVC32APWLE_TSSOP14

12

1311

147

A

BO

PG

C133

0.1U_0402_16V7K

12

D9

RB751V_SOD323

21

U6

SN74LVC244APWLE_TSSOP20

2 184 166 148 12

11 913 715 517 3

119

2010

1A1 1Y11A2 1Y21A3 1Y31A4 1Y42A1 2Y12A2 2Y22A3 2Y32A4 2Y4

1G2G

VC

CG

ND

RP14

100K_8P4R_0804_5%SD309100300

18

27

36

45

U16B

SN74LVC32APWLE_TSSOP14

4

56

147

A

BO

PG

TVS5@SF10402ML080C_0402

1

2

R422@100K_0402_5%

1 2

RP7

100K_8P4R_0804_5%SD309100300

18

27

36

45

RP8

100K_8P4R_0804_5%SD309100300

18

27

36

45

C120

0.1U_0402_16V7K

1 2

R11620K_0402_5%

12

G

D SQ19

2N7002 1N_SOT23

21 3

KBA[0..19]<29>ADB[0..7]<29>

FULL_LED# <28>

EC_SMC_1<29,33,42>

BT_DETACH <28>BT_ON# <28>

EC_SMD_1<29,33,42>

EC_MUTE_IN#<28>

VOL_UP#<28>

BT_PRES#<28>

SELIO#<29>

BT/WL_ON/OFF#<28>

VOL_DW#<28>

TP_ON/OFF#<28>

TPAD_LED# <28>

CHARGING_LED# <28>

SUS_STAT# <13,16>

FWR# <29>

EC_FLASH# <16>

POWER1_LED# <28,33>

RING#<29>

MODEM_RI#<25>

PCM_RI#<21>

RI#1 <22,33>

KSIN8<28>KSIN9<28>

KSIN10<28>KSIN11<28>KSIN12<28>KSIN13<28>KSIN14<28>

FREAD#<29>FSEL#<29>

CAPSLED#<29> NUMLED#<29>

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

W83L518D (LPC)

LA-1701 1.0

SD CARD/BT Connector

Custom31 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

WR_PT

SD4SD5 SD_CLK

SD2SD3SD1

MMC_DET#

SD3

SD2SD1

SD4

LPC_AD1

SD5

CLK_SD_48M

LPC_AD3

CLK_PCI_SD

LPC_AD2

SDPWCTL#

CLK_PCI_SD

CLK_SD_48M

LPC_AD[0..3]

SDLED

MMC_DET#LPC_AD0

WR_PT

SD_CLK

SDPWCTL#

SDLED

+5VS +3VS

+5VS

+3VS

+3VS

+3VAUX_BT+3VALW

+3VAUX_BT

+5VALW

R408

10_0402_5%

12

R426 0_0603_5%1 2

U42

SD@W83L518D (LPC)

111096 8754

45

32 12

40

42

1

484746

4443

39

41

1314151617181920

222324

21

2530 262728293436 31323335

3837

SC

BC

LKS

CB

IOS

CB

RS

T#

VS

S

SC

BC

8S

CB

C4

PM

E#

lES

ET#

LAD2

LFR

AM

E#

LPC

_DR

Q#

SC

BP

SN

T

VDD3V

SD4

PC

ICLK

SERIRQLAD0LAD1

LAD3SD5

SD2

SD3

SCBPWCTL#SCBLED

VDDSCLED

SCPWCTL#SCPSNT

SCCLKSCIO

XOUTXIN

MS5

SCRST#

MS

4

VS

S

MS

3M

S2

MS

1M

SC

LK

SC

C4

SD

PW

CT

L#

MS

PW

CTL

#M

SLE

DS

CC

8

SD

LED

SD1SDCLK

C568

1U_0603_10V6K

1

2R425 0_0603_5%1 2

C570

0.01U_0402_16V7K

1

2

C558

SD@0.1U_0402_10V6K

1

2

JP32

BT_CONN

12345678

12345678

C561

@10PF_0402

1

2

C557

SD@10U_1206_6.3V6M

1

2

C571

0.1U_0402_16V7K

1

2

R442

100K_0402_5%

1 2

R1470_0402_5%

1 2

C556

SD@0.1U_0402_10V6K

1

2

R405 SD@1K_0402_5%1 2

C298

SD@0.1U_0402_10V6K

1

2C559

SD@10U_1206_6.3V6M

1

2

R409

@10_0402

12

R424

@0_0805_5%

1 2

R407

SD@8.2K_0402_5%1 2

C300

SD@0.1U_0402_10V6K

1

2

JP17

SD@SD_16PIN

1 23 45 67 89 1011 1213 1415 16

Q53SI2301DS_SOT23

2

13

R406

SD@FBM-11-100505-600T_04021 2

C560

10P_0402_50V8K

1

2

G

D

S

Q542N7002 1N_SOT23

2

13

C5694.7U_0805_6.3V6K

1

2

LPC_AD[0..3]<16,22,29>

PCIRST#<7,13,15,19,20,21,22,25>

CLK_SD_48M <12>

SIRQ<15,21,22,29>

CLK_PCI_SD<12>

LPC_FRAME#<16,22,29>

USB20P5- <16,28>USB20P5+ <16,28>

CH_DATA <25>CH_CLK <25>

Wireless_OFF#<25,28,29>

Wireless_OFF<25>

LPC_DRQ#0<16,29>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1701 1.0

RESET CKT

32 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

+3VALW+3VALW

+3VS +3VALW

+5VS

+3VS

D18

RB751V_SOD323

21

C780.47U_0603_10V7K

1

2

U4C

SN74LVC14APWLE_TSSOP14

65

147

OI

PG

R60330K_0402_5%

12

G

D

S

Q392N7002 1N_SOT23

2

13

R59

@10K_0402_5%

12

C791U_0603_10V6K

1

2

R61

100K_0402_5%

1 2

R6847K_0402_5%

12

R31710K_0402_5%

12

U4B

SN74LVC14APWLE_TSSOP14

43

147

OI

PG

U4A

SN74LVC14APWLE_TSSOP14

21

147

OI

PG

PM_POK <16>

VGATE<12,16,41>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

SPR CONN. 154PIN

GND GNDA

LA-1701 1.0

SPR Connector

33 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

COMPS

PS2_DATA

ON/OFF

DLINE_IN_L

LPTPE

ACIN

BLUE_S

D_HSYNC_R

RJ45_RXX+

LPD0

LPD7

RI#1

KBD_CLK

POWER1_LED

DLINE_OUT_L

SPDIFO

LPD1

RJ45_TXX-

D_VSYNC_R

KBD_DATA

LPD2

LPTSLCTLPTAFD#

LPTACK# GREEN_S

D_DDCDATA

CRMA

EC_SMC_1

LPTERR#

LPTSLCTIN#

LPTBUSY

LUMA

RJ45_RXX-

DLINE_IN_R

DTR#1

XTPB1+_R

XTPB1-_R

LPD3LPD4

EC_SMD_1

LAN_LED0#

XTPA1+_R

LPTINIT#

DCD#1

D_DDCCLK

SLP_S3#

CONA

DOCK_HPS#

DSR#1RTS#1 PS2_CLK

LPTSTB#

RJ45_TXX+

XTPA1-_R

DLINE_OUT_R

LPD5

TXD1

MSEN

LPD6

CTS#1

DOCK_HPS#

RED_S

RXD1

USB20P2-_R

USB20P2+_R

USB20P3+_R

USB20P3-_R

USB20P2+

USB20P2-

USB20P3+

USB20P3-

D_VSYNCD_HSYNC

POWER1_LED

ON/OFF

SLP_S3#

VIN

+5VS

DOCKVIN

+5VS +5V

+5V+3V

DOCKVIN

+5V

+12V

+3V

+5VALW

R435 SPR@0_0402_5%1 2

R22100K_0402_5%

12

R45 SPR@1K_0402_5%1 2

R29 SPR@75_0402_1%1 2

R28 SPR@1K_0402_5%12

D29

SM05_SOT23

1

32

R441

SPR@1K_0402_5%

12

R437 SPR@0_0402_5%1 2

C30SPR@2200P_0402_25V7K

1 2

L5SPR@KC FBM-L18-453215-900LMA90T_1812

12

R277 SPR@0_0402_5%1 2

C32

SPR@0.1U_0402_16V4Z

12

G

D

S

Q102N7002 1N_SOT23

2

13

G

D

S

Q52

SPR@2N7002 1N_SOT23

2

13

L4

SPR@0_0603_5%1 2

R278 SPR@0_0402_5%1 2

SPR@SPR-154PIN

JP26

P1 G1

A1A2A3A4A5A6A7A8A9

A10A11A12A13A14A15A16A17A18A19A20A21A22A23A24A25A26A27A28A29A30A31A32A33A34A35A36A37A38A39A40A41A42A43A44A45A46A47A48A49A50A51A52A53A54A55A56A57A58A59A60A61A62A63A64A65A66A67A68A69A70A71A72A73A74A75A76A77

B1B2B3B4B5B6B7B8B9B10B11B12B13B14B15B16B17B18B19B20B21B22B23B24B25B26B27B28B29B30B31B32B33B34B35B36B37B38B39B40B41B42B43B44B45B46B47B48B49B50B51B52B53B54B55B56B57B58B59B60B61B62B63B64B65B66B67B68B69B70B71B72B73B74B75B76B77

P2 G2

1 2 3 4 5 6

P1 G1

A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16A17A18A19A20A21A22A23A24A25A26A27A28A29A30A31A32A33A34A35A36A37A38A39A40A41A42A43A44A45A46A47A48A49A50A51A52A53A54A55A56A57A58A59A60A61A62A63A64A65A66A67A68A69A70A71A72A73A74A75A76A77

B1B2B3B4B5B6B7B8B9

B10B11B12B13B14B15B16B17B18B19B20B21B22B23B24B25B26B27B28B29B30B31B32B33B34B35B36B37B38B39B40B41B42B43B44B45B46B47B48B49B50B51B52B53B54B55B56B57B58B59B60B61B62B63B64B65B66B67B68B69B70B71B72B73B74B75B76B77

P2 G2

GN

DG

ND

GN

DG

ND

GN

DG

ND

C51 SPR@2200P_0402_25V7K

12

R48 SPR@0_0402_5%1 2

R438 SPR@0_0402_5%1 2

G

D

S

Q14SPR@2N7002 1N_SOT23

2

13

R279 SPR@0_0402_5%1 2

R47 SPR@0_0402_5%1 2

R42 SPR@75_0402_1%12

R439 SPR@0_0402_5%1 2

R280 SPR@0_0402_5%1 2

R46 SPR@0_0402_5%1 2

R440 SPR@0_0402_5%1 2

R436 SPR@0_0402_5%1 2

C41

SPR@1000P_0402_50V7K

1

2

C38

SPR@1000P_0402_50V7K

1

2R27 SPR@0_0402_5%12

R18100K_0402_5%

12 DOCK_HPS <24>

RJ45_TXX+ <19>

RXD1<22>

EC_SMC_1 <29,30,42>

LPTINIT#<22,26>

RJ45_RXX-<19>

LPTSTB#<22,26>

LPD4<22,26>LPD5<22,26>

TXD1<22>DTR#1<22>

D_DDCDATA <14>LPTAFD#<22,26>

DCD#1<22>

PS2_CLK <29>

LPD1<22,26>

D_HSYNC <14>

DLINE_IN_L<23>

CTS#1<22>

DSR#1<22>RI#1<22,30>

LPTBUSY<22,26>

LUMA <13,14>

D_VSYNC <14>

XTPB1+<20>

ACIN<16,29,35,37>

LPTPE<22,26>

LPTSLCTIN#<22,26>

XTPA1-<20>

LAN_LED1# <19>

SPDIFO<23>

D_DDCCLK <14>

LPD0<22,26>

LPD2<22,26>

EC_SMD_1 <29,30,42>

LPTERR#<22,26>

SLP_S3# <16,29>

KBD_CLK <29>

CRMA <13,14>

PS2_DATA <29>

LPD3<22,26>

LPTSLCT<22,26>

CONA<29>LAN_LED0#<19>

RJ45_TXX- <19>

KBD_DATA <29>

DLINE_IN_R<23>

RJ45_RXX+<19>

MSEN# <13,14,29>

RTS#1<22>

LPD7<22,26>

LPTACK#<22,26>

XTPB1-<20>

XTPA1+<20>

COMPS <13,14>

LPD6<22,26>

ON/OFF <28>

GREEN <13,14>RED <13,14>

BLUE <13,14>

DLINE_OUT_R<28>DLINE_OUT_L<28>

USB20P2+<16>

USB20P3+<16>

USB20P2-<16>

USB20P3-<16>

POWER1_LED# <28,30>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

+3VALW to +3VS Transfer +12VALW TO +12V Transfer+3VALW to +3V Transfer

Discharge circuit

+5VALW to +5VS Transfer+5VALW to +5V Transfer

+2.5V to +2.5VS Transfer+1.5VALW to +1.5VS Transfer

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

+12VALW TO +12VS Transfer

LA-1701 1.0

DC/DC Circuits

34 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

SYSON

RUNON

RUNON

SUSP

SYSON#

SYSON#

5VON

SUSP

SYSON#

SUSP

SUSP

SYSON#

SUSPSUSP

SYSON#

5VON

RUNON

SYSON#

VR_ON#

SUSP

5VON

SUSP

SUSP

SUSP

VR_ON#

RUNON

RUNON

+2.5V

+3VALW

+CPU_CORE

+1.8VS

+VCCP +5V

+12VS

+3V

+3V

+5VALW

+2.5VS

+12V

+5VS

+12VALW

+5VALW

+5VALW

+5V

+1.2VS

+12VALW

+2.5V

+3VS

+12V

+2.5VS

+3VALW

+5VALW

+5VALW

+3VS +5VS+1.25VS

+12VALW

+12VALW

+1.5VALW +1.5VS

+12VALW +12VALW

+12VS

R284@475_0402_1%

12

R194470_0402_5%

12

D

SG

Q46NDS352P 1P_SOT23

2

13

C4800.1U_0402_16V7K

1

2

G

D

S

Q282N7002 1N_SOT23

2

13

C48510U_1206_6.3V6M

1

2

C4751U_0805_16V7K

1

2

G

D

S

Q122N7002 1N_SOT23

2

13

G

D

S

Q172N7002 1N_SOT23

2

13

C291

10U_1206_10V4Z

1

2

R187470_0805_5%

12

R313470_0402_5%

12

U10

SI4800DY_SO8

1234

8765

SSSG

DDDD

C5060.01U_0402_16V7K

1

2

R31470_0402_5%

12

R286470_0805_5%

12

R379100K_0402_5%

12

R38651K_0402_5%

12

G

D

S

Q13

2N7002 1N_SOT23

2

13

C479

0.1U_0402_16V7K

1

2

G

D

S

Q262N7002 1N_SOT23

2

13

G

D

S

Q182N7002 1N_SOT23

2

13

R38051K_0402_5%

12

G

D

S

Q412N7002 1N_SOT23

2

13

G

D

S Q35@2N7002_SOT23

2

13

G

D

S

Q502N7002 1N_SOT23

2

13

G

D

S

Q482N7002 1N_SOT23

2

13

G

D

S

Q25

2N7002 1N_SOT23

2

13

R283470_0402_5%

12

R238470_0402_5%

12

C484

10U_1206_6.3V6M

1

2

R38470_0402_5%

12

R295470_0402_5%

12

R382100K_0402_5%

12

R311470_0402_5%

12

U30

SI4800DY_SO8

1234

8765

SSSG

DDDD

R87100K_0402_5%

12

R24

100K_0402_5%1

2

G

D

S

Q302N7002 1N_SOT23

2

13

C309

0.1U_0402_16V4Z

1

2C491

0.1U_0402_16V7K

1

2

G

D

S

Q382N7002 1N_SOT23

2

13

C4761U_0805_16V7K

1

2

R113100K_0402_5%

12

R318470_0402_5%

12

D

SG

Q47NDS352P 1P_SOT23

2

13

R183100K_0402_5%

12

U39

SI4800DY_SO8

1234

8765

SSSG

DDDD

G

D

S

Q402N7002 1N_SOT23

2

13

C290

10U_1206_10V4Z

1

2

C332

10U_1206_6.3V6M

1

2

C440

10U_1206_6.3V6M

1

2

C134

10U_1206_6.3V6M

1

2

R395100K_0402_5%

12

G

D

S

Q492N7002 1N_SOT23

2

13

C41210U_1206_6.3V6M

1

2

C125

10U_1206_6.3V6M

1

2

C30710U_1206_6.3V6M

1

2

C496

10U_1206_6.3V6M

1

2

C1230.01U_0402_16V7K

1

2

G

D

S

Q272N7002 1N_SOT23

2

13

C4691U_0805_16V7K

1

2

U32

SI4800DY_SO8

1234

8765

SSSG

DDDD

G

D

S

Q422N7002 1N_SOT23

2

13

G

D

S

Q92N7002 1N_SOT23

2

13

C308

22U_1206_10V4Z

1

2

C3030.1U_0402_16V7K

1

2

C292

10U_1206_10V4Z

1

2

C5480.1U_0402_16V7K

1

2

U41

SI4800DY_SO8

1234

8765

SSSG

DDDD

U36

SI4800DY_SO8

1234

8765

SSSG

DDDD

C54710U_1206_6.3V6M

1

2

C407

0.1U_0402_16V7K

1

2

R195470_0402_5%

12

G

D

S

Q372N7002 1N_SOT23

2

13

R351470_0402_5%

12

G

D

S

Q452N7002 1N_SOT23

2

13

C4701U_0805_16V7K

1

2

G

D

S

Q342N7002 1N_SOT23

21

3

C130

0.1U_0402_10V6K

1

2

SUSP#<23,29,38>

SUSP<40>

VR_ON<29,39,41>

VR_ON#<39>

SYSON<29,38>

SYSON#<40>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Detector

VIN detector14.229 13.717 13.21712.520 12.110 11.566

Precharge detector12.432 11.717 11.06110.188 9.702 9.051

5V

3.2V

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

3.3V

5V

ACIN

5V

BAT ONLY

Precharge detector9.507 9.030 8.5897.263 7.015 6.579

LA-1701 0.4C

Detector

B

35 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

ADPIN

PACIN

PACIN

ADPGND

CHGRTCP

CHGRTCP

RTCVREF

VIN

VL

VIN VIN

VL

B+VIN

VS1

+5VALWP

VS

VS

RTCVREF

+5VP

VIN

+3VALW

+5VALW+1.5VALWP

+12VALWP

+2.5V

+1.2VSP+3VALWP

+1.25VSP

+5VALWP

+12VALW

+2.5VP

+1.5VALW

+1.25VS

+VCCP

+1.2VS

+1.05VSP

+1.8VS+1.8VSP

VMB

VL

PR1842M_0603_5%

12

PZD5RLZ16B

12

PZD1@RLZ24B

12

PQ36TP0610T_SOT23

13

2

PR171200_1206_5%

1 2

PJP83MM

21

PJP14

2MM21

PR17510K_0603_5%

12

PR18222K_0603_5%

1 2

PR

179

100K

_060

3_5% 1

2

PD34RLS4148

12

PC

140

68P

_060

3_50

V8J

12

PZD2RLZ4.3B

12

PC

138

1000

P_0

603_

50V

7K1

2

PJP93MM

21

100K

100K

PQ38DTC115EUA

2

13

PC

137

100P

_060

3_50

V8J 1

2

PR290

511_0603_1%

1 2

PL15FBM-L18-453215-900LMA90T_1812

1 2

PR1872M_0603_5%

12

PZD4RLZ5.1B

12

PC1430.1U_0805_25V7K

12

PR1781.5K_1206_5%

1 2

1

2

3

4

PCN2

SINGATRON_2DC_S736I201

1

2

3

4

PR

167

453K

_060

3_1%

12

PC

142

0.22

U_1

206_

25V

7K

12

PC1494.7U_1206_25VFZ

12

PD27

RB715F_SOT323

3

21

PR2231.5K_1206_5%

1 2

PD23RLS4148

12

PR

180

150K

_060

3_5%

12

PU13A

LM393M_SO8

3

21

84

+

-O

PG

PR19247K_0603_5%

12

PC1451000P_0603_50V7K

12

PR1661M_0603_1%1 2

PR185806K_0603_1%

12

PR18810K_0603_5%

12

PD26RLS4148

12

PR186200_0805_5%

12

PD22EC10QS04

12

PR17022K_0603_1%1 2

PZD3

RLZ4.3B

12

PC1361000P_0603_50V7K

12

PR

168

8.2K

_080

5_5%1

2

PJP15

2MM21

PR259@66.5K_0603_1%

12

PC

135

100P

_060

3_50

V8J

12

PJP7

2MM21

PJP43MM

21

PR1891.5M_0603_1%

12

PC

144

0.1U

_060

3_16

V7K

12

PR1761.5K_1206_5%

1 2PR17710K_0603_5%

1 2

PJP53MM

21

G

D

S

PQ372N7002_SOT23

2

13

PR165@10_1206_5%

12

PR18310K_0603_5%1 2

PJP63MM

21P

C14

70.

1U_0

603_

16V

7K1

2

PC

141

0.1U

_060

3_16

V7K

12

PC

139

0.01

U_0

603_

50V

7K

12

PU14S-812C33AUA

2

1

3 2

1

3 PC

146

1000

P_0

603_

50V

7K1

2

PJP33MM

21

PR1811.5K_1206_5%

1 2

PR17310K_0603_5%

12

PR16910K_0603_5%1 2

PR

172

365K

_060

3_1%

12

PU13BLM393M_SO8

5

67

84

+

-O

PG

PR174200_1206_5%

1 2

PC1481U_0805_25V4Z

12

ACIN <16,29,33,37>

PACIN <36>

MAINPWON<4,37,42>

ACON<36>

51_ON#<28>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Charger

IREF=1.164*IchargeIREF=0.580~3.132V

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

B 0.1

BATT+ : 18.0V--> BATT_OVP : 2.0V

5.0V

OVP voltage : LI-MH 8 CELL(4S2P)

(BATT_OVP voltage = 0.1109*BATT+)

4.2V

Iadp=0~3.0A

CC=0(0.5A) ~ 2.7ACV=16.8V (8 CELLS)

1.202V

(17V+-5%)

LA-1701

Charger

36 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

CS

ACON

LXCHRG

ACOFF#

ACON

ACOFF#

BATT+

CS

CS

VIN

BATT+

B+P3

B++

BATT+

VIN

VS

VIN

P2

+3VALWP

2.5VREF

PQ18SI4835DY_SO8

3 65

78

2

4

1

PC670.1U_0805_25V7K

1 2

PD40B540C

12

PQ17SI4835DY_SO8

3 65

78

2

4

1

PR8010K_0603_5%

12

PC

158

0.1U

_060

3_50

V4Z

12

PC75

1500P_0603_50V7K

1 2

PR

8410

K_0

603_

1%1

2

PQ19SI4835DY_SO8

365 7 8

2

4

1

PC

744.

7U_1

210_

25V

6K1

2

100K

100K

PQ

50D

TC

115E

KA

_SO

T23

2

13

100K

100K PQ20DTC115EUA

2

13

PR27710K_0603_5%

12

PR823K_0402_5%1 2

PR93@10K_0603_5%

12

PC

634.

7U_1

210_

25V

6K

12

PC

162

0.01

U_0

603_

50V

7K

12

PR750.02_2512_1%

12

PR81100K_0603_5%

12

PR27857.6K_0603_1%

12

PR9647K_0603_5%

12

PL7FBM-L18-453215-900LMA90T_1812

1 2

PR76200K_0402_5%

12

PR2131M_0603_0.5%

12

PR85

10K_0603_5%1 2

PC

161

@0.

1U_0

603_

16V

7K 12

PC

624.

7U_1

210_

25V

6K

12

PC662200P_0603_50V7K

1 2

PC722200P_0603_50V7K

1 2PR88

0.02_2512_1%1 2

PR95143K_0603_0.1%

12

PC730.1U_0805_25V7K1 2

PR8766.5K_0603_1%

1 2

PR90

10K_0603_5%12

PR28610K_0603_5%

12

PR861K_0603_5%

1 2

PC

6522

00P

_060

3_50

V7K

12

100K

100K

PQ24DTC115EUA

2

13

PC700.1U_0603_16V7K

1 2

PR78150K_0402_5%

12

PC

710.

1U_0

603_

16V

7K12

PC

680.

01U

_040

2_16

V7K

12

G

D

S

PQ212N7002_SOT23

2

13

PC79

@10P_0603_50V8F

1 2

PR7747K_0603_5%

1 2

PR

8331

.6K

_060

3_1% 1

2

PC

774.

7U_1

210_

25V

6K1

2@EC31QS04PD38

12

PC780.01U_0402_16V7K

12

PL815U_SPC-1204P-150_4A_20%

1 2

PD39

B540C

1 2

+

PC

225

47U

_25V

_M

1

2

PR

216

2.2K

_060

3_5%

12

PZD

6R

LZ4.

3B1

2

PU16BLM358A_SO8

5

67 +

-0

+

PC

224

47U

_25V

_M

1

2

PR28510K_0603_5%

12

PR27910K_0603_0.5% 1

2

PD131SS355_SOD323

1 2

PC

764.

7U_1

210_

25V

6K1

2

100K

100K

PQ23DTC115EUA

2

13

PC694700P_0603_50V7K

1 2

PU16ALM358A_SO8

3

21

84

+

-0

PG

EC31QS04PD14

12

PR790_0603_5%

12

PR209604K_0603_1%

12

PR89127K_0603_1%

1 2

PR9447.5K_0603_0.1%

12

PR91

47K_0603_5%

1 2

PU5

MB3887_SSOP24

1

2

3

4

24

23

22

21

5

6

7

8

9

10

11

12

20

19

18

17

16

15

14

13

-INC2

OUTC2

+INE2

-INE2

+INC2

GND

CS

VCC(o)

FB2

VREF

FB1

-INE1

+INE1

OUTC1

OUTD

-INC1

OUT

VH

VCC

RT

-INE3

FB3

CTL

+INC1

PR

9266

.5K

_060

3_1%

12

PC

640.

1U_0

805_

25V

7K

12

PR217200K_0603_0.5%

12

PC

222

0.01

U_0

603_

50V

7K1

2

PC80@22P_0603_50V8J

1 2

PACIN<35>

IREF<29>

ACOFF <29>

ADP_I<29>

BATT_OVP<29>

FSTCHG<29>

AIR_ACIN<29>

ACON<35>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

+3.3V/+5V/+12V

+5V Ipeak = 6.66A ~ 10A

+3.3V Ipeak = 6.66A ~ 10A

B 0.1DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

LA-1701

3.3V / 5V / 12V

37 49Wednesday, July 09, 2003

Title

Size Document Number Rev

Date: Sheet of

SNB

LX5

DH

3

CSH3

BST51BST31

DH31

BST5DH5

CSH5

DL5

LX3

DL3

FLYBACK

DH51

ACIN

VS

B+++

VL

B+++

VL+5VP

+5VALWP

VL

2.5VREF

B++

+3VALWP

+12VALWP

PL5

FBM-L18-453215-900LMA90T_1812

12

PC58100P_0402_50V8K

12

PR7147K_0402_1%

12

+

PC

57@

150U

_D2_

6.3V

M1

2

PC

3722

00P

_060

3_50

V7K

12

PC

440.

1U_0

805_

25V

7K

12

PR640.012_2512_1%

12

PR

611M

_040

2_1%

12

G

D

S

PQ512N7002_SOT23

2

13

PR

7210

K_0

402_

1%1

2

PR632M_0402_5%

12

SI4814DY_SO8

PQ15

28

35

17

46

D1G1

G2S1/D2

D1S1/D2

S2S1/D2

PC

414.

7U_1

206_

10V

7K

12

PR

7010

.2K

_040

2_1% 1

2

PC

454.

7U_1

210_

25V

6K

12

PR620.012_2512_1%

12

PC

484.

7U_1

210_

25V

6K12

PC5147P_0402_50V8J

12

PC

360.

1U_0

805_

25V

7K

12

PL610U_SPC-1204P-100_4.5A_20%

12

PR54@10K_1206_5%

12

PC34470P_0805_100V7K

12

PD12EC31QS04

21

PC

420.

1U_0

603_

16V

7K

12

PC400.1U_0805_25V7K1 2

PC5047P_0402_50V8J

12

PR

5810

_120

6_5% 1

2

PR7310K_0402_1%

12

PC611U_0805_25V4Z

12

PC334.7U_1210_25V6K

1 2

SI4814DY_SO8

PQ14

28

35

17

46

D1G1

G2S1/D2

D1S1/D2

S2S1/D2

PR5522_1206_5%

12

PC

464.

7U_1

210_

25V

6K

12

PC350.1U_0805_25V7K

1 2

PU4MAX1632_SSOP28

2624

25

27

123

10

8

451816171920141312159611

23

7

282122

LX3DL3

BST3

DH3

CSH3CSL3FB3SKIP#

GN

D

12OUTVDD

BST5DH5LX5DL5

PGNDCSH5CSL5

FB5SEQREF

SYNCRST#

SHDN#

TIME/ON5

RUN/ON3V

L

V+

PC

4322

00P

_060

3_50

V7K

12

PR690_0402_5%

1 2

PR600_0603_5%

1 2

+

PC

5315

0U_D

2_6.

3VM 1

2

PR560_0603_5%1 2

PR6510K_0402_5%

1 2

PC

394.

7U_1

210_

25V

6K

12P

C38

4.7U

_121

0_25

V6K

12

PR67@300K_0402_5%

12

PR

663.

57K

_060

3_1%

12

PR68@0_0402_5%

1 2

PR590_0603_5%

12

PC54100P_0402_50V8K

12

PR

287

2.7K

_120

6_5%1

2

PC60@0.047U_0603_16V4Z

12

PD9EC11FS2_SOD106

12

PC554.7U_1206_10V7K

12

PR7447K_0603_5%

1 2

PD11EP10QY03

21

PD10DAP202U_SOT323

1

2 3

PC

470.

1U_0

805_

25V

7K 12

PC56680P_0402_50V7K

12

PR570_0603_5%

12

PT19U_SDT-1204P-9R0-120_4.5A_20%

14

32

+

PC

5215

0U_D

2_6.

3VM 1

2

+

PC

5915

0U_D

2_6.

3VM1

2

MAINPWON <4,35,42>

ACIN<16,29,33,35>

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

BDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

+2.5VP/+1.8VSP

LA-1701 0.4C

DDR POWER 2.5V / 1.8V

Compal Electronics, Inc.

38 49Wednesday, July 09, 2003

Title

Size Document Number Rev

Date: Sheet of

EN1 EN1

SUSP#

+5VALWP

B++

+3VALWP

+1.8VSP

+2.5VP

PR2370_0603_5%

12

PL17HCB4532K-800T90_1812

1 2

PC

177

0.1U

_080

5_25

V7K

12

PR24584.5K_0603_1%

12

PC

176

2200

P_0

603_

50V

7K

12

PC

170

2200

P_0

603_

50V

7K1

2

PC

187

4.7U

_080

5_6.

3V6K

12SI4814DY_SO8

PQ43

28

35

17

46 D1

G1

G2S1/D2

D1S1/D2

S2S1/D2

PD37DAP202U_SOT323

1

23

PC1814.7U_0805_6.3V6K

12

PR2330_0603_5%1 2

PR23918.2K_0603_1%

12

+

PC

189

@15

0U_D

2_6.

3VM 1

2

+

PC

226

100U

_6.3

V 1

2ISL6225

PU18

IS6225

1

2

3

4

5

6

7

8

910

11

12

13

14

15 16

17

18

1920

21

22

23

24

25

26

27

28

GN

D

LGATE1

PGND1

PHASE1

UGATE1

BOOT1

ISEN1

EN1

VOUT1VSEN1

OCSET1

SOFT1

DD

R

VIN

PG1 PG2/REF

SOFT2

OCSET2

VSEN2VOUT2

EN2

ISEN2

BOOT2

UGATE2

PHASE2

PGND2

LGATE2

VC

C

PC1742.2U_0805_10V6K

12

PC1820.1U_0805_25V7K

12

PR24210K_0603_1%

12

PR23051_1206_5%

12

PR244@0_0603_5%

12

PR24310K_0603_1%

12

PC

178

4.7U

_121

0_25

V6K

12

PC1750.1U_0805_25V7K 1

2

PC193@1000P_0603_50V7K

12

PR1621K_0603_5%

12

PC

173

4.7U

_121

0_25

V6K

12

PC

171

0.1U

_080

5_25

V7K

12

PC

186

4.7U

_080

5_6.

3V6K

12

PC1800.01U_0603_50V7K

12

PR249@10K_0603_5%

12

+

PC

227

100U

_6.3

V 1

2

PR2400_0603_5%

12

PC

179

4.7U

_121

0_25

V6K

12

PR246147K_0603_0.1%

12

PL184.7U_SPC-1204P4R7_5.7A_20%

12

SI4814DY_SO8

PQ42

28

35

17

46D1

G1

G2S1/D2

D1S1/D2

S2S1/D2

PR2480_0603_5%

12

PC1830.1U_0805_25V7K

12

PR241@0_0603_5%

12

PR2361.5K_0603_1%

1 2

PR288@0_0603_5%

12

PC1900.01U_0603_50V7K

12

PC1910.01U_0603_50V7K

12

+

PC184150U_D2_6.3VM

1

2

PR2340_0603_5%1 2

PL195UH_SPC_06704-5R0A

12

PR2310_0603_5%

1 2

PC192@1000P_0603_50V7K

12

PC

172

4.7U

_121

0_25

V6K

12

PR2470_0603_5%

12

PR2320_0603_5%

1 2

PR2552.2_0603_5%

12

PR23810.5K_0603_1%

12

PR2351.74K_0603_1%1 2

SUSP# <23,29,34>

SYSON<29,34>

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+1.2VSP/+1.5VALWP/1.05VSP

BMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

LA-1701 0.4C

1.2V / 1.5V / 1.05V

Compal Electronics, Inc.

39 49Wednesday, July 09, 2003

Title

Size Document Number Rev

Date: Sheet of

EN2 EN2

VR_ON

CPUB+

+5VALWP

+1.5VALWP

+3VALWP

+1.2VSP

+3VALWP

CPUB++

+5VALWP

+1.5VALWP

2.5VREF

+1.05VSP

PC

184.

7U_0

805_

6.3V

6K1

2

+

PC

166

220U

_D2_

2M_R

91

2

PR16@0_0603_5%

12

PR2260_0603_5%

12

PC110.01U_0603_50V7K

12

PC210.01U_0603_50V7K

12

PC

169

0.1U

_060

3_16

V7K

12

SI4814DY_SO8

PQ2

28

35

17

46

D1G1

G2S1/D2

D1S1/D2

S2S1/D2

PR120_0603_5%

12

PC

44.

7U_1

210_

25V

6K 12

PR2275.1K_0603_5%

12

PL1HCB4532K-800T90_1812

1 2

PR21@10K_0603_5%

12

PC130.1U_0805_25V7K

12

PC124.7U_0805_6.3V6K

12

PC23@1000P_0603_50V7K

12

+

PC

19@

150U

_D2_

6.3V

M

1

2

PR40_0603_5%1 2

S

GD

PQ40SI3442DV

3

6

245

1

PC

20.

1U_0

805_

25V

7K1

2

100K

100K

PQ41

DTC115EUA

2

13

PR103.48K_0603_1%

12

PR71.74K_0603_1%

1 2

PR229137K_0603_1%

12

PC

94.

7U_1

210_

25V

6K

12

PC

174.

7U_0

805_

6.3V

6K12

PC1644.7U_1206_25VFZ

12

PC

722

00P

_060

3_50

V7K

12

+

PC

1515

0U_D

2_6.

3VM

1

2

PC165560P_0603_50V7K

12

PC52.2U_0805_10V6K

12

PU17BLM358A_SO8

5

67

+

-0

PR116.81K_0603_1%

12

PR30_0603_5%

1 2

PR

225

5.1K

_060

3_5%

12

PC24@1000P_0603_50V7K

12

PR2240_0603_5%

12

PC140.1U_0805_25V7K

12

PR289@0_0402_5%

12

SI4814DY_SO8

PQ1

28

35

17

46

D1G1

G2S1/D2

D1S1/D2

S2S1/D2

PR60_0603_5%

1 2

PC

104.

7U_1

210_

25V

6K

12

PR18147K_0603_0.1%

12

PC60.1U_0805_25V7K 1

2

+

PC

228

100U

_6.3

V

1

2

PC

80.

1U_0

805_

25V

7K

12

PC

122

00P

_060

3_50

V7K 1

2

PC220.01U_0603_50V7K

12

PR90_0603_5%

12

PR256

1K_0603_5%12

PR1410K_0603_1%

12

PC16768P_0603_50V8J

1 2

PD1DAP202U_SOT323

1

23

PC

168

0.01

U_0

603_

50V

7K1

2

PC

34.

7U_1

210_

25V

6K 12

PR22.2_0603_5%

12

PR1784.5K_0603_1%

12

PL2

4.7U_SPC-1204P4R7_5.7A_20%12

PR50_0603_5%1 2

PR

228

100K

_060

3_1%1

2

PR1510K_0603_1%

12

PU17ALM358A_SO8

3

21

84

+

-0

PG

PR151_1206_5%

12

+

PC

1615

0U_D

2_6.

3VM

1

2

PR190_0603_5%

12

ISL6225

PU1

IS6225

1

2

3

4

5

6

7

8

910

11

12

13

14

15 16

17

18

1920

21

22

23

24

25

26

27

28

GN

D

LGATE1

PGND1

PHASE1

UGATE1

BOOT1

ISEN1

EN1

VOUT1VSEN1

OCSET1

SOFT1

DD

R

VIN

PG1 PG2/REF

SOFT2

OCSET2

VSEN2VOUT2

EN2

ISEN2

BOOT2

UGATE2

PHASE2

PGND2

LGATE2

VC

C

PR81.5K_0603_1%1 2

PR200_0402_5%

12

PL35UH_SPC_06704-5R0A

12

PR13@0_0603_5%

12

VR_ON# <34>

VR_ON <29,34,41>

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

(1.25V)

LA-1701 0.4C

1.2V

Custom

40 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

SDREF_L

SUSP

REMOTE SENSE

FB

_VD

D+

SUSP

+2.5VPVS

+SDREF

+2.5VP

+1.25VSP

+3VALWP

+3VALWP

PC216470P_0603_50V8J

1 2

PU20BLM358A_SO8

5

67 +

-0

PR2661K_0603_5%

1 2

PR261100K_0603_0.5%

12

PR25710K_0603_0.5%

12

G

D

SPQ53

2N7002_SOT23

2

13

PC

217

1U_0

603_

10V

6K1

2

PR

263

100K

_040

2_5%

12

G

D

S

PQ45

2N7002_SOT23

2

13

PC2030.1U_0402_16V4Z

12

PC

219

0.1U

_060

3_16

V7K

12

PR2645.1_0603_5%

12

PR291 @0_0402_5%1 2

PU22

CM3718

2

4 5

1 8763 GND

VREF VFB

VIN PVINLX

PGNDSD

PC20410U_1206_10V4Z

12

PR25810K_0603_0.5%

12

G

D

SPQ54

2N7002_SOT23

2

13

PU20ALM358A_SO8

3

21

84

+

-0

PG

PR265100K_0603_5%

1 2

PR292 0_0402_5%1 2

PC2050.1U_0603_50V4Z

12

PR2600_0402_5%

12

PL205UH_SPC_06704-5R0A

12

PR2540_0603_5%1 2

+ PC221220U_D_6.3M_R55

1

2

PC2184.7U_1210_25V6K

12

PR262100K_0603_0.5%

12

PC2060.1U_0402_16V4Z

12

PC

220

0.1U

_060

3_16

V7K

12

PC

215

1U_0

603_

10V

6K

12

SUSP <34>

SYSON# <34>

A

A

B

B

C

C

D

D

E

E

F

F

G

G

H

H

1 1

2 2

3 3

4 4

B

CPU-CORE

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

LA-1701 0.4C

+VCC_H_CORE

Compal Electronics, Inc.

41 49Wednesday, July 09, 2003

Title

Size Document Number Rev

Date: Sheet of

VR_ON

3205_VCC

3205_VCC

3205_SD#

3205_SD#

MCH_PWRGD

MCH_PWRGD

VCCP_PWGD

VCCP_PWGD

3205_VCC

+CPU_CORE

B+CPUB+

CPUB+

+3VS

+5VS

+5VDRIVE

+5VDRIVE

+3VS

+1.8VSP

+1.05VSP

+3VS

+3VS

+CPU_CORE

+3VS

PC

100

4.7U

_080

5_10

V4Z

12

PC980.047U_0603_25V7M

12

PR

139

5.36

K_0

402_

1%

PC

96

10P

_040

2_50

V8K

12

EC31QS04PD20

12

PC

102

4.7U

_121

0_25

V6K1

2

PD

43R

B75

1V_S

OD

323

12

PC

920.

01U

_060

3_50

V7K

12

PR131200_0402_1%1 2

PC950.01U_0603_50V7K

12

PR129 604K _0402_1%1 2

PR284 @0_0402_5%12

PC1101000P_0603_50V7K

12

PC

8922

00P

_060

3_50

V7K 1

2

PC1111000P_0603_50V7K

12

PC9410P_0402_50V8K 1

2

PU8

ADP3205

1

5

2

8

7

6

4

9

12

13

14

3

10

11

20

38

19

17

18

16

15

39

36

37

40

35

33

32

31

30

34

28

27

25

24

23

22

21

26

29

PSI

VID3

HYSSET

VID0

VID1

VID2

VID4

VREF

DPRSLP

DPSLP

PWRGD

VID5

BOOTSET

DPRSET

CLAMP

DRVLSD3

SS

DPWRGD

SD

TPWRGD

CLKEN

DRV3

DRVLSD2

DRV2

TSYNC

DRV1

CS3

CS2

CS1

CS+

DRVLSD1

RAMP

REG

DACREF

DACREFFB

COREFB

VCC

GND

DPSHIFT

CS-

PC854.7U_0805_10V4Z

12

PU9ADP3415

1

3

4

8

7

6

5

2

10

9

IN

DRVLSD

DLY

SW

GN

D

DRVL

VC

C

SD

BST

DRVH

PR1180_0603_5%

12

PR1125.36K_0603_1%

12

PC930.01U_0603_50V7K

1 2

PR137

0_0603_5%

12

PR2220_0603_5%1 2

PC

208

0.1U

_080

5_25

V7K1

2

PR29533K_0603_5%

12

PC

101

4.7U

_121

0_25

V6K1

2

PR1350_0603_5%

12

PQ

28@

IRF

7832

_SO

8

134

8765

2

SSG

DDDD

S

PD15EP10QY032 1

PD41

RB751V_SOD323

12

PD

181S

S35

5_S

OD

323

12

PR1160_0603_5%

12

PR10823.7K_0603_1%

1 2

PR119 0_0402_5%12

PC1060.1U_0402_16V4Z

12

PQ

27@

IRF

7821

_S08

134

8765

2

SSG

DDDD

S

PR10615K_0603_1%

12

PC

207

0.1U

_080

5_25

V7K

12

PR1430_0603_5%

12

EC

31Q

S04

PD

17

12

PR2932.2_0603_5%

1 2

PC

884.

7U_1

210_

25V

6K

12

PR1343.32K_0402_1%

12

PR1410.002_2512_5%

12

PR11413.7_0603_1%

12

+

PC

209

220U

_D2_

2M_R

9

1

2

PL9FBM-L18-453215-900LMA90T_1812

1 2

PR1320_0603_5%

12

PR

122

300K

_060

3_5%

12

PQ

32IR

F78

32_S

O8

134

8765

2

SSG

DDDD

S

PQ

26IR

F78

21_S

08

134

8765

2

SSG

DDDD

S

PC

874.

7U_1

210_

25V

6K1

2

PR14647K_0603_5%

12

PR130270_0402_1%

12

PQ

30IR

F78

21_S

08

134

8765

2

SSG

DDDD

S

PR133

2.7_0402_5%

1 2

PL110.6U_HK_AE26A0R6_26A_25%

12

PR1362.2_0603_5%

12PC

9747

0P_0

402_

50V

7K1

2

PC

864.

7U_1

210_

25V

6K1

2

PR1400_0603_5%1 2

PC

990.

1U_0

402_

16V

4Z1

2

EC31QS04

PD16

12

PR1042.2_0603_5%

12

PQ

33@

IRF

7832

_SO

8

134

8765

2

SSG

DDDD

S

PR1170_0603_5%

12

PR14210_0603_1%

12

PR2942.2_0603_5%

1 2

PR1383K_0603_5%

12

PR

126

330K

_040

2_5%

12

PR1246.34K_0603_1%

12

PC1070.01U_0603_50V7K

1 2

PR1050_0603_5%

1 2

PR123 56 _0402_1%12

PR

121

300K

_060

3_5%

12

PC1051U_0805_25V4Z

12

PC1084.7U_1206_16V4Z

12

PC1090.1U_0805_25V7K

12

PU10

XC61CN0902MR

3

21

VS

S

PWDOUTVDDIN

PD

42

RB

751V

_SO

D32

3

12

PC

901U

_080

5_25

V4Z

12

PR1130_0603_5%

12

PC

103

4.7U

_121

0_25

V6K1

2

PR1070_0603_5%

12

PU11XC61CN0902MR

3

21

VS

S

PWDOUTVDDIN

PU7ADP3415

1

3

4

8

7

6

5

2

10

9

IN

DRVLSD

DLY

SW

GN

D

DRVL

VC

C

SD

BST

DRVH

PQ

31@

IRF

7821

_S08

134

8765

2

SSG

DDDD

S

PR1090_0603_5%

12

PR

110

0_06

03_5

%

12

PR1030_1206_5%

12

PD19EP10QY03

2 1

PQ

29IR

F78

32_S

O8

134

8765

2

SSG

DDDD

S

PC

104

2200

P_0

603_

50V

7K12

PR1150_0603_5%

12

PR1203.9K_0603_1%

12

PR1452.7_0603_5%

12

PR14447K_0603_5%

12

PR1110.002_2512_5%

12

PL100.6U_HK_AE26A0R6_26A_25%

1 2

PR1250_0603_5%

12

PR2833.3K_0402_5%

12

PR1270_0603_5%

12

PC91100P_0603_50V8J

12

CPU_VID2<5>

CPU_VID3<5>

CPU_VID4<5>

CPU_VID5<5>

CPU_VID1<5>

CPU_VID0<5>

CLKEN#<12>

STP_CPU#<12,16>

PM_DPRSLPVR<16>

VR_ON<29,34,39>

PSI#<5>

VGATE<12,16,32>

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

B 0.1DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

CPU

Recovery at 50 +-3 degree C

PH1 under CPU botten side :CPU thermal protection at 90 +-3 degree C

BAT. thermal protection at 84 +-3 degree CPH2 near main Battery CONN :

Recovery at 45 +-3 degree C

BATTERY

LA-1701

BATTERY CONN / OTP/1.8V

42 49Wednesday, July 09, 2003

Title

Size Document Number Rev

Date: Sheet of

EC_SMC_1

TS_A

EC_SMD_1

AB/IALI/NIMH#_PWR

L_1

0T

L_10

OTP_B

L_11

L_1

1T

EC_SMCEC_SMD

REV

REV

OTP_C

+3VALWP

+5VALWP

BATT+

+3VALWP

VSVL

VL

VL

VMB

VL

VL

PC1501000P_0603_50V7K

12

PR21147K_0402_1%

12

PR20225.5K_0603_1%

1 2

PD30@BAS40-04

1

3

2

PC1560.22U_0805_16V7K 1

2

PU15BLM393M_SO8

5

67

84

+

-O

PG

PR195100_0603_5%

12

PD32@BAS40-04

1

32

PC1541000P_0603_50V7K

12

PD291SS355_SOD323

12

PC1600.22U_0805_16V7K

12

PR193@1K_0603_5%

12

PD331SS355_SOD323

12

PR

197

1K_0

603_

5%

12

PR207100K_0402_1%

12

PR20316.9K_0402_1%1 2

PU15A

LM393M_SO8

3

21

84

+

-O

PG

PC157@0.1U_0402_10V6K

12

100K

100KPQ39

DTC115EKA_SOT23

2

13

PR21216.9K_0402_1%

1 2

PR2143.32K_0603_1%

12

PC1530.1U_0603_50V4Z

12

PR2010_0402_5%

12

PR20047K_0402_1%

12

PTH210K_1%

PD31@BAS40-04

1

3 2

PR20847K_0402_1%1 2

PR194@47K_0603_5%

1 2

PTH110K_1%

PD28@BAS40-04

1

3

2

PR2052.74K_0603_1%

12

PR2041K_0603_5%

12

PR196100_0603_5%

12

PR198100K_0402_1%

1 2

PCN3

SUYIN_25133A-08G1-01_8P

12345678

PC1510.01U_0603_50V7K

12

PL16FBM-L18-453215-900LMA90T_18121 2

PC152@0.1U_0402_10V6K

12

PR2100_0402_5%

12

PR19947K_0402_1%

1 2LI/NIMH# <29>

BATT_TEMP <29>

EC_SMD_1 <29,30,33>

EC_SMC_1 <29,30,33>

MA

INP

WO

N

<4,

35,3

7>

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

REV: 0.1A1. Update PCI resource table. (Page 3)2. Change U41 power source form +12VS to +5VS for correcting error. (Page 4)3. Remove DVI signals. (Page 13)4. Add Video board ID and Mother board ID for HP requirement. (Page 16)5. Change LAN controller from RTL8100BL to RTL8139CL+ for HP requirement. (Page 19)6. Change audio CODEC from ALC202A to AD1981B and modify relational components for HP requirement. (Page 23,24)7. Change USB power protector from Poly switch to RT9701-CBL for meet HP's specification. (Page 27)8. Add CP9, CP10 (100P_1206_8P4C) for EMI requirement. (Page 28)9. Add a power button LED (D34) for HP requirement. (Page28)9. Add a power button LED (D34) for HP requirement. (Page28)

REV: 0.1B1. U33,U34,U56 combine to U33 (74HCT08 TSSOP14).(Page 18)2. Add Q81,C892,C891 for +3VAUX turn on/off.(Page 25)3. Add R91,R1132,C893 for correcting error. (Page 26)4. U12 pin9,10 contact to GND. (Page 30)5. Change U47D,U47E,U47F to U14A,U14B,U14C. (Page 32)6. Add L57,C894,C895,C896,C897 for HPQ request to add SPR GNDA.7. Add U57 and relation components for AD1981B's AVDD power source. (Page 23)8. Change U23 and relation components to reserve. (Page 23)9. Add R1137, 0_1206_5% resistor for optional AMP. power source of +5VS. (Page 24)10. Add L58~L61 on AMP.(U53) output trace. (Page 24)11. Delete TVS41~TVS44 and change C863~C866 to 47PF. (Page 24)12. Modify JP8's pin define for using switched jacks on the headphone audio. (Page 28)13. Change audio amplifier from TPA0202 to TPA0312. (Page 24)14. Connecting the pin97 of JP28 and JP29 to GND for HP's requirement. (Page9,10)15. Install a 0 ohm (R703) between ITP_DBRESET# and SYSRST# then de-populate U51,R704 and C833. (Page 16)16. Modify USB routing method for HP's requirement. (Page 16)

i. USB0 and USB 1 (U45.C20/D20, U45.A21/B21) to the two ganged system USB ports.ii. USB2 and USB3 (U45.C18/D18, U45.A19/B19) to the docking connector.iii. USB4 (U45.C16/D16) to single USB.iv. USB5 (U45.A17/B17) to MDC.

17. Delete net MBAY_DISABLE from JP1 pin A49 for HP's requirement. (Page 29,33)18. Change powerm source of D10,D11 and D12 from CRTVDD to +3VS for HP's requirement. (Page 14)19. Add an IO buffer (U56) for supporting EVO600's keyboard. (Page 30)

1. Re-location all parts.REV: 0.1C

LA-1701 1.0

E/E(1) PIR

43 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

REV: 0.2A (For DB-1 SMT)1.For solving FAN can't work properly issue. (Page 4)

a. Change U14's power plan from +5VS to +12VS.b. Change U14 from LMV321M5X to LM321MF.

2. For solving system boot fail issue. (Page 12)a. Del Q29.b. Add PD41 RV751V.

Change L1,L2,L3,L18,L19 from FBM-11-160808-121 to FCM1608C-121T.3. For EMI requirement. (Page 14)

a. Change ACIN signal connection from GPI11(U8.AA5) to GPIO27.(U8.W1)4. For solving main battery only, system can't boot on issue. (Page 15,16)

b. Pull high GPI11 to +3VALW.

6. Del L10,C155,C204,C477,C474 for HP requirement. (Page 23)5. Pull high U19.8 to +5VS for solving SUSP# signal don't well issue. (Page 23)

7. Change R363,R365 to 1K_0402_5% for solving CODEC can't be detected issue. (Page 23)

REV: 0.1D

3. Change Battery EC_SMC_2/EC_SMD_2 to EC_SMC_1/EC_SMD_2. (Page 42)4. Modify SD controller to M/B. (Page 31)

2. Change U49 EC_SMC_1/EC_SMD_1 to EC_SMC_2/EC_SMD_2. (Page 4)1. Change U20 to AT24C16N and change power source to +3VALW. (Page 30)

8. Add voltage divider R413,R414,R416,R419 for HP requirement. (Page 24)9. Change AMP. gain from 6dB to 10dB for HP requirement. (Page 24)10. Add R420 100K_0402_5% for solving headphone plug fail issue. (Page 24)11. Change JP20.27 and JP20.28's power plan from +5VS to +5V for supporting touch pad wake up from S3 function. (Page 28)12. Change U15.161's power plan from +RTCVCC to RTCVREF from increasing RTC battery life. (Page 29)13. Add U29 for supporting 8Mbits BIOS. (Page 30)14. Change D6,D7 to HSMB-C172 for HP requirement. (Page 30)15. For supporting SD avtive LED function. (Page 31)

a. Connection JP17.13 to SDLED.b. Change JP17.15's power plan from +3VS to +5VS.

16. Add JP32 for supporting BT module. (Page 31)

REV: 0.2B (For DB-2 gerber)Add R427 20K ohm resister for solving PC-beep is too loud issue. (Page 23)

1. Phase-in EMI solution.REV: 0.2C (For DB-2 SMT)

a. Add R35,R344,R58,R142,R301,R408 10_0402_5%.b. Add C42 22PF_0402_NPO.c. Add C447 15PF_0402_NPO.d. Add C73,C153,C319,C560 10PF_0402_NPO.

LA-1701 1.0

E/E(2) PIR

44 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

REV: 0.2D1. To change the mute circuitry for SI build.

a. Connect EAPD (pin U22.47) to JP24.2 and reserve a 0_0402_5% (R431) resistor for testing.b. Install R162 (0_0402_5%) and no install R163.c. Add R432 (100K_0402_5%) and Q51 (2N7002) to invert EAPD signal for amplifier and mute LED.

REV: 0.2E1. For EMI requirement.

Add C204 0.1U_0402_16V4Z2. To exchange TP and PS2 signals for EC requirement.3. For cost down plan.

To exchange the capacitor of C83,C136 from 150U_D2_6.3VM to 100U_6.3V_M.REV: 0.2F

Move audio line-out BLOCK capacitor from TP to MB. To add C565,C566 100U_6.3V_M.1. For cost down plan.

a. Del C206.2. For solving audio noise when IR active. (A2C039)

b. To change C492 from 150U_D2_6.3VM to 10U_1206_6.3V7K.3. For EMI requirement.

Add R435~R440 0_0402_5%.REV: 0.2G1. For solving power LED signal wrong on PR/APR side.

a. Add R441 1K_0402_5%.b. Q52 2N7002.

2. For solving power button must be pressed twice issue.1. Add D27 RB751V.2. Add R330 4.7K_0402_5%.

3. Per HPQ requirement to change audio component.To change C174 and C201 to 0.022U_0603_25V7K.

3. Change R345 from 10K_0402_5% to 100K_0402_5%.

1. Per HPQ requirement to change audio component.To change R427 from 20K_0402_5% to 39.2K_0402_1%.

REV: 0.2H (For SI gerber)

REV: 0.3 (For SI SMT)

a. Change D5,D6,D7,D26 from HSMB-C172_BLUE_0805 to HSMG-C170_GRN_0805.1. Per HPQ requirement to change LED color from BLUE to GREEN.

b. Change R9,R10,R11,R421 from 140_0402_1% to 330_0402_5%.2. To improve RTC crystal accuracy.

Change C190,C203 from 12P_0402_50V8J to 15P_0402_50V8J.

REV: 0.3A (For PV Build)1. Per HPQ requirement to add FET to shut off power to the Bluethumb module.

a. Add Q53 SI2301DS.b. Add C568 1U_0603_10V6K.c. Add C570 0.01U_0402_16V7K.d. Add C571 0.1U_0402_16V7K.e. Add C569 4.7U_0805_6.3V6K.

2. For supporting WLAN and BT devices exist in the same system.a. Connect Mini-PCI JP28-36 to Bluethumb JP32-7 using a series resistor of 1K_0402_5% (R72).b. Connect Mini-PCI JP28-43 to Bluethumb JP32-6 using a series resistor of 1K_0402_5% (R298).

f. Add Q54 2N7002.g. Add R442 100K_0402_5%.h. Del R424.i. Change Q16.2 signal source from Wireless_OFF# to Wireless_OFF.

LA-1701 1.0

E/E(3) PIR

45 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

1. Exchange signals NUMLED# and CAPSLED# of Q31 and Q33 for solving BC022.REV: 0.3B

2. Rotate JP20 180 degree for solving PCP assembly issue.3. Change JP18 & JP19's pin1 signal from SPKR+ and SKPL+ to SPKR+_C and SPKL+_C for solving audio noise issue.REV: 0.4 (For PV gerber)1. Connection LPC_DRQ#0 to U42.2 through R147 0_0402_5% for support SD controller DMA function.

a. Add L10 0_1206_5% and exchange layout position with C204.2. For EMI requirement.

b. Add L36 FBM-L10-160808-301-T_0603 on EAPD signal and closed to audio CODEC.c. Add L37 FBM-L10-160808-301-T_0603 on +3VS power line of audio CODEC.d. Change R406 from 10_0402_5% to 33_0402_5%.

3. Per ME team Tony Liu request, change LED type and current limit resistor for increasing luminous intensity.a. Change D5, D6, D7 and D26 from HSMG-C170 to 17-21SYGC/S530-E1/TR8.b. Change R9, R421 from 330_0402_5% to 150_0402_1%.

4. Del C567 layout pad for solving DFX issue.5. Reserve 1U_0603_10V6K (C572) pad and connection to U15.21 for supporting PC97591L/V in the further.6. Do not install R72 and R298 (1K_0402_5%) for HP requirement.7. For solving OTS#95452 which are HSYNC and VSYNC out of specification.

a. Add C573 0.1UF_0402_5%.

c. Del Q3, Q4, R263, R268, R267, R255, R254.d. Change C3, C5 from 68P_0402_50V8K to 10P_0402_50V8K.

b. Add U43 SN74AHCT126PWR.

8. Base on HPQ Robert's command to do some audio's design change.a. Install R433, R434 0_0603_5%b. No install C565, C566 100UF_6.3V_M.c. Correct the left channel input voltage divider, connect R419.1 to LINE_OUTL and R416.1 to analog GND.

9. Change some component's value as HPQ Darrell's request.a. Change C330, C334 from 0.01UF to 0.1UF.b. Change R354 from 100Kohm to 330Kohm.

d. Change C562 from 0.1U_0402_16V4Z to 0.1U_0603_16V7K.e. Change R387 from 4.7K_0402_5% to 10K_0402_5%.f. Change D24 from 1N4148 to R444 4.7K_0402_5%.g. Del R416 0_0402_5%.h. Add R419 0_0402_5%.

REV: 0.4A (For PV SMT)1. Add C482 0.1UF_0402_16V4Z for solving OTS#96542.2. For solving OTS#95994.

a. Change R428, R429 from 0_0402_5% to 4.7K_0402_5%.b. Add R413, R416 4.7K_0402_5%.

1. Add R445 511_0603_1% to limit RTC battery discharge current for meeting OSM 4.3.8 specification.REV: 0.4B

REV: 0.4C1. Per HPQ David request to do some audio components change.

a. Change R428, R429 from 4.7K_0402_5% to 0_0402_5%.b. No install R413, R416, R433, R434.c. Install C565 and C566 100uF CV-AX.

Del C83, C136, R433 and R434.2. Delete reserved layout pad for solving DFX issue.

3. No install R59 10K_0402_5% for solving double pull high issue.

LA-1701 1.0

E/E(4) PIR

46 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4. Change R406 from 33_0402_5% to FBM-11-100505-600T to solve EMI issue.5. Del R9 and D5 for ME team request.

REV: 0.4D1. For solving HSYNC and VSYNC waveform undershoot over specification issue.

Change L18,L19 from FCM1608C-121T to FBM-L10-160808-300LM-T.2. Per ME (Tony Liu) request, change D6,D7,D26 from 17-21SYGC/S530-E1/TR8 to 17-21/GVC-AMPB/3T for solving lightness not enough issue.3. Reserve R447,R448,R449 layout pad for support CB1410 B0 version chip in the further.4. Add D29 SM05 for solving ESD test fail issue.5. For solving "BoBo" audio noise from HLDS and TEAC ODD.

a. Change R214,R216 from 4.7K_0402_5% to 1.3K_0402_5%.b. Change R210 from 2.7K_0402_5% to 1.1K_0402_5%.

REV: 1.0 (MP)REV: 2.01. Install R72 and R298 1K_0402_5% (page 25). This is for better performance when both BT and Wireless cards co-exist in the system.2. Connection SLP_S3# to D29 (ESD diode) on docking side..

LA-1701 1.0

E/E(5) PIR

47 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

5

5

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2

2

1

1

D D

C C

B B

A A

Version change list (P.I.R. List) Page 1 of 2

Reason for change PG# Modify List B.Ver#Item

Power section

1

2

3

4

5

6

7

8

9

RTC battery doesn't need to charge35 PR190 and PR191 change to @200

35PR188 change to 34K, add PR259 (66.5K)change reference voltage, because VL build up fast then

RTCVREF

36adapter change from 75W to 65W. So, the power limitermust to reduce with adapter PR83 change to 31.6K, PR84 change to 10K

37 PL5 change to FBM-L18-453215-900-LMA90Tthe current rating of the new BEAD is 9A, the old oneis 8A.

2002.10.15

2002.10.15

2002.10.15

2002.10.15

2002.10.23

2002.10.23

modify circuit for aircraft power36

add PD38,PD39,PD40,PQ46,PQ47,PQ48,PQ49,PQ50,PQ51,PQ52,PU21,PR267,PR268,PR269,PR270,PR271,PR272,PR273,PR274,PR275,PR276,PR277,PR278,PR279,PR280,PR281,PC210,PC211,PC212,PC213,PC214,PZD8

Date

modify circuit for DDR, change CM8500 to CM3718 40

delete PD35,PD36,PQ44,PR250,PR251,PR252,PR253,PC194,PC195,PC196,PC197,PC198,PC199,PC200,PC201,PU19add PR260,PR261,PR262,PR263,PR264,PR265,PR266PC215,PC216,PC217,PC218,PC219,PC220,PC221,PU22

2002.10.23change VIN detector voltage and Precharge deterctorvoltage 35

PR167 change to 60.4K, PR166 change to 604K,PR184 change to 604K, PR185 change to 301K,PR187 change to 402K

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

modify circuit for aircraft power, when use aircraft power, battery can discharge 36

delete PU21,PQ47,PQ48,PQ49,PQ51,PD40,PZD8,PQ16,PR267~PR276,PR280~PR281,PC210~PC214,PC223,PD38,PD39

add PD40,PD41,PQ50,PZD6,PR285,PR286

for EMI solution 36 PC62 and PC63 change to 10U_1210_25V

10 to solve noise issue37 add PQ51(2N7002) and PR287 (2.7K_1206_5%)

change PC33 to 2.2U_1210_25V

to prevent leakage current11 40 change PR45 from DTC115EUA to 2N7002

2002.12.04

2002.12.04

2002.12.04

2002.12.04

12 modify circuit form dual phase to single phase at CPU-CORE 41 2002.12.04delete PQ26~PQ29,PU7,PD15,PD16,PC85~PC90,PC93,PL10,PR104,PR105,PR110,PR111add PC223change PR129 to 604K_0402_5%, PR134 to 3.32K_0402_1%, PR126 to 120K_0402_5%, PR141 to 0.001_2512_5%, PC107 to 0.01U_0603_25V

13 to prevent leakage current 41 change PR128 to PD41 (RB751V) 2002.12.04

14 change CPU thermal protect to 90 degree C 42 change PR205 form 3.32K_0603_1% to 2.74K_0603_1% 2002.12.18

15 to reduce tolerance on CPU CORE voltage feedback 41 change PR126 form 120K_0402_5% to 120K_0402_1% 2002.12.18

LA-1701 0.4C

PWR PIR

48 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Version change list (P.I.R. List) Page 2 of 2

Reason for change PG# Modify List B.Ver#Item

Power section

16

17

18

19

20

Date

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

the component is too high (2.5mm), so change to 1206 size(1.6mm)

41 chang PC101,PC102,PC103 to 10U_25V_X5R_1206(SE142106M00)

2002,12,30

to adjust CPU CORE load line 41change PR123 to 47_0402_1% (SD034470A00) PC96 to 22P_0402_50V (SE071220J00) PR126 to 240K_0402_5% (SD028240300) PR129 TO 1M_0402_1% (SD034100400)delete PC97

to reduce inrush current for 1.25V 40change PR261,PR262 to 100K_0603_0.5% (SD019100309) PR260 to 100K_0603_5% (SD0131003T1)add PQ53,PQ54 2N7002 (SB7700200T5)

2002,12,30

2002,12,30

to reduce power consumption and inrush current 35change PR223,PR176,PR178,PR181 to 1.5K_1206_5% (SD0111501T6)

2002,12,30

2002,12,30

35 delete PR165 and PZD121 2002,12,30

the component is too high (5.2mm), so change to 1210 size(2.0mm) chang PC74 to 4.7U_25V_X5R_1210 (SE065475K00)36

22 to speed up response time 39 change PC165 to 560P_0603_50V_X7R (SE025561K00) 2002,12,30

23 to solve noise issue 36 add PC224,PC225 47U_25V_EC (SF04704M000) 2003,01,05

24 40 change PC218 to 4.7U_1210_25V (SE065475K00) from 100U_6.3V (SG017101310)

2003,01,05

25 to solve noise issue (A2C021) 41

add PQ26,PQ29,PU7,PD15,PD16,PC85~PC90,PC93,PC97PL10,PR104,PR105,PR110,PR111,PR114,PC230,PC231

change PR129 to 604K_0402_5%, PR134 to 3.32K_0402_1%, PR126 to 330K_0402_5%, PR123 to56_0402_1%, PC96 to 10P_0402_50V

delete PC2232003,01,23

26 to reduce negative voltage at High-side GATE for ADP3415 (A2C014,A2C098)

41add PD42,PD43 change PR105 and PR140 to 2.2_0603_5% 2003,01,23

27 35to limit RTC battery discharge current for meeting OSM 4.3.8 specification.

change PR290 from 200_0805_5% to 511_0603_1% 2003,05,02

28 adjust ripple voltage and ripple current when charger battery 36 delete PC79 and PC80change PR91 from 330K_0603_5% to 47K_0603_5%

2003,05,02

29 to solve noise issue (OTS:97258) 37 change PC33 from 2.2U_1206 to 4.7U_1210 2003,05,02

30Modify battery connector layout foorprint for support haslock pin type battery connector. 42

31Modify DC-IN jack library for solving AC jack plug-inloose issue.

35

2003,05,02

2003,05,02

LA-1661 0.4C

PWR PIR

49 49Wednesday, July 09, 2003

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of