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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
Cover Sheet
Custom
1 47Friday, July 17, 2009
2006/02/13 2006/03/10Compal Electronics, Inc.
Compal confidentialSchematics Document
Mobile Penryn uFCPGA with Intel
Cantiga_GM+ICH9-M SFF core logic
Fossil
2009-07-17 Rev 1.0
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A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
Block Diagram
Custom
2 47Friday, July 17, 2009
2006/02/13 2006/03/10Compal Electronics, Inc.
File Name : LA-5221P
Compal confidential
Thermal Sensor
EMC1402 Clock Generator
SLG8SP553VTR
Fan Conn
SPI ROMMXIC/MX25L1605AM2C-12G SO8 (2MB)
Mobile Penym
uFCPGA-956 CPU - SFF
FSB667/800/1066MHz 1.05V
H_A#(3..35)H_D#(0..63)
FCBGA 1363 - SFF
Intel Cantiga GS
SPI
Power On/Off CKT.
LPC BUS
CardReader Controller
RealTek RTS5159
DC/DC Interface CKT.
NAND Flash module(SSD)
RTC CKT.
WBMMAP-569 - SFF
Intel ICH9-M
Power OK CKT.
page 31
page 32
Touch Pad CONN. Int.KBDpage 33
page 34
page 34
page 18
SMSC KBC 1091
SD/MMC Slot
10/100/1000 LAN
Marvelle 88E8072
RJ45 CONN
PCI-E BUS
LED
2.5" SATA HDD Connector
SATA0
Fossil
page 28
page 15
page 14
page 8,9,10,11,12,13
page 4
page 4
page 4,5,6,7
page 30
page 27
page 20
page 24
page 23
page 19,20,21,22
CK505
LCD conn
BANK 0, 1, 2, 3DDR3-SO-DIMM X 1
DDR3 1066MHz 1.5V
Singal Channel
page 20
92HD75B1
Audio CKTAMP & Audio Jack
TPA6047
USB conn x 1(For I/O)USB2.0
BT(SoftBreeze) Conn USB x 1
Azalia
DMI X4
LV/ULV Dual Core
USB x1(Camara)
WWAN Card
page 25
PCIE x1
OR
page 29page 29
page 17
page 17
LIS302DLTR
page 25
Accelerometer
WLAN Card
page 26
USB x1page 30
page 16Display Port
WINBOND/W25X16-VSSIG(2MB)
or
USB2.0
USB2.0
daughter board
page 28
USB conn x 2(For I/O)daughter board
SPI
A
A
1 1
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
Notes List
Custom
3 47Saturday, July 18, 2009
2005/03/10 2006/03/10Compal Electronics, Inc.
( O MEANS ON X MEANS OFF )Voltage Rails
O
O
X
+0.75VS
S3
+3VS
X
X
+3VALW
+5VS
S1
O
+CPU_CORE
OO
OO
X
X X
+VCCP
powerplane
O
O
O
O
O
X
S5 S4/ Battery only
X X X
+B
State
+1.5VS
+1.8V
S5 S4/AC & Batterydon't exist
S5 S4/AC
+5VALW
S0
O
O
Symbol Note :
: means Digital Ground: means Analog Ground
@ : means just reserve , no build
V V
V
SERIALSENSOR(CPU)
SMB_EC_CK2
SOURCE
SMSC1091
INVERTER BATT EEPROMTHERMAL
SODIMM CLK CHIP
SMBUS Control Table
SMB_CK_CLK1SMB_CK_DAT1 ICH9
MINI CARD
SMB_EC_DA2
SMB_EC_CK1SMB_EC_DA1
LCD_CLKLCD_DAT Cantiga
LCD
X
X
X
X X
X
X X
X
X X
X X
X
X X
X
X
X
X
X X
X
X
VI2C / SMBUS ADDRESSING
1 0 1 0 0 0 0 0
D2
A0
CLOCK GENERATOR (EXT.)
HEX ADDRESS
DDR SO-DIMM 0
1 1 0 1 0 0 1 0
DEVICE
+3VLCONN@ : means ME part.
45@ : means install after SMT.
SUR1@ and SUR3@ mean CPU SU2300(U1)
SPR1@ and SPR3@ mean CPU SP9300(U1)
V
X
X
G sensor
V
X
X
X
X
+1.5V
43170732L01
43170732L02
43170732L03
43170732L04
R1/R3 HF
HF
HF
Non HF
Non HF
R1
R1
R1
R1
CPU
SU2300
SU2300
SP9300
SP9300
43 level Comfig
SUR1@/NBR1@/SBR1@/HF@
SPR1@/NBR1@/SBR1@/HF@
SUR1@/NBR1@/SBR1@/NHF@
SPR1@/NBR1@/SBR1@/NHF@
KBV00 BOM Structure
43170732L05
43170732L06
43170732L07
43170732L08
R3
R3
R3
R3
HF
HF
Non HF
Non HF
SU2300
SU2300
SP9300
SP9300
SUR3@/NBR3@/SBR3@/HF@
SPR3@/NBR3@/SBR3@/HF@
SUR3@/NBR3@/SBR3@/NHF@
SPR3@/NBR3@/SBR3@/NHF@
HF@ and NHF for PCB P/N (Cost)
U1
CPU
SPR3@U1
CPU
SUR3@
U1
CPU
SPR1@
ZZZ1
PCB-MB
NHF@
ZZZ1
PCB-MB
HF@
U1
CPU
SUR1@U4
NB
NBR3@
U8
SB
SBR3@
U4
NB
NBR1@
U8
SB
SBR1@
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_RESET#H_RESET#_R
XDP_BPM#0XDP_BPM#1
XDP_BPM#5
H_THERMDA
H_THERMTRIP#
XDP_TDI
XDP_TMS
XDP_TRST#
XDP_TCK
XDP_TDO
XDP_BPM#5
XDP_BPM#4
XDP_BPM#3XDP_BPM#2
H_PWRGOOD_R
XDP_HOOK1
XDP_PRE#
FAN_PWM_R
H_PROCHOT#
H_A#19
H_A#17
H_A#33
H_A#21
H_A#12
H_A#10
XDP_TRST#XDP_DBRESET#
H_A#5
H_A#11
XDP_BPM#1XDP_BPM#0
H_A#31
H_A#28
H_A#34
H_RESET#
H_A#15
H_A#8
XDP_TDI
XDP_BPM#3
H_A#32
H_A#4
H_A#26
H_A#18
H_A#13
XDP_BPM#2H_A#20
XDP_TDO
H_A#25H_A#24
H_A#27
H_A#16
H_THERMDC
H_A#7
H_A#30
H_A#22
H_THERMDC
XDP_TMS
H_PROCHOT#
H_A#9
H_A#6
H_A#23
H_A#35
XDP_BPM#5_R
H_THERMTRIP#
H_A#3
H_A#14
XDP_BPM#4
H_A#29
H_THERMDA
XDP_TCK
XDP_DBRESET#
H_ADS# <8>H_BNR# <8>
H_BPRI# <8>
H_A#[3..16]<8>
H_ADSTB#0<8>
H_REQ#0<8>H_REQ#1<8>H_REQ#2<8>
H_A#[17..35]<8>
H_ADSTB#1<8>
H_A20M#<20>H_FERR#<20>
H_IGNNE#<20>
H_STPCLK#<20>H_INTR<20>
H_NMI<20>H_SMI#<20>
H_REQ#4<8>
H_DEFER# <8>H_DRDY# <8>H_DBSY# <8>
H_BR0# <8>
H_INIT# <20>
H_LOCK# <8>
H_RESET# <8>H_RS#0 <8>H_RS#1 <8>H_RS#2 <8>
H_TRDY# <8>H_REQ#3<8>
ICH_SM_DA <14,15,21,25>
THERM_SCI# <21>
ICH_SM_CLK <14,15,21,25>
MAINPWON<38>
H_PWRGOOD<5,20>
FAN_PWM<32>
H_HIT# <8>
H_THERMTRIP# <8,20>
CLK_CPU_BCLK# <15>CLK_CPU_BCLK <15>
XDP_DBRESET# <21>
H_HITM# <8>
+VCCP
+VCCP
+3VS
+3VS
+VCCP
+5VS
+3VS
+VCCP +3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
Penryn(1/3)-AGTL+/ITP-XDP
Custom
4 47Saturday, July 18, 2009
2006/02/13 2006/03/10Compal Electronics, Inc.
XDP Connector
H_THERMDA, H_THERMDC routing together,Trace width / Spacing = 10 / 10 mil
Place close to U1.
PWM Fan Control circuit
External Thermal Sensor EMC1402
Put the sensor colse to CPU
12/22 HP reviewRemove test point
This shall place near CPU
for RF, HP 12/10
Place Close to U1.
01/11 HP reviewDel R15 and R16(short short net)
TP11PAD@
R7 54.9_0402_1%1 2
R18 0_0402_5%@1 2
R1051_0402_1%
@
12
R6 54.9_0402_1%1 2
R4 54.9_0402_1%1 2
TP13PAD@
R130_0402_5%
1 2
R891 2.2K_0402_5%
12
TP16PAD@
TP20 PAD @
R2 54.9_0402_1%1 2
C4
0.1U_0402_16V4Z1
2
TP21PAD@
R892
0_0603_5%
12
R120_0402_5%
1 2
R5 54.9_0402_1%@ 1 2
C5 2200P_0402_50V7K
1 2
TP15PAD@
TP10PAD@
R890 3K_0402_5%12
R896
10K_0402_5%
12
JP2
ACES_85204-03001
CONN@
11
22
33
G14
G25
R14 68_0402_5% 1 2
R9
56
_0
40
2_
5%
12
C3
0.1U_0402_10V6K@1 2
TP19 PAD @
R3 54.9_0402_1%1 2
C
B
E
Q21
PMBT3904_SOT23
1
2
3
R11 1K_0402_5%1 2
U2
EMC1402-1-ACZL-TR_MSOP8
DN3
DP2
VDD1
ALERT#6
SMCLK8
THERM#4
GND5
SMDATA7
U50
TC7SH00FUF_SSOP5
INB1
INA2
O4
G3
P5
TP14PAD@
R1 54.9_0402_1%1 2
TP12PAD@
TP22
PAD
@
R81K_0402_5%
12
AD
DR
GR
OU
P 0
AD
DR
GR
OU
P 1
CO
NT
RO
LX
DP
/IT
P S
IGN
AL
S
H CLK
THERMAL
RE
SE
RV
ED
ICH
U1A
PENRYN SFF_UFCBGA956ULV723@
A[10]#AC5
A[11]#AD2
A[12]#AD4
A[13]#AA5
A[14]#AE5
A[15]#AB2
A[16]#AC1
A[17]#AN1
A[18]#AK4
A[19]#AG1
A[20]#AT4
A[21]#AK2
A[22]#AT2
A[23]#AH2
A[24]#AF4
A[25]#AJ5
A[26]#AH4
A[27]#AM4
A[28]#AP4
A[29]#AR5
A[3]#P2
A[30]#AJ1
A[31]#AL1
RSVD01V2
RSVD02Y2
RSVD03AG5
RSVD04AL5
RSVD05J9
A[4]#V4
A[5]#W1
A[6]#T4
A[7]#AA1
A[8]#AB4
A[9]#T2
A20M#C7
ADS#M4
ADSTB[0]#Y4
ADSTB[1]#AN5
RSVD06F4
BCLK[0]A35
BCLK[1]C35
BNR#J5
BPM[0]#AY8
BPM[1]#BA7
BPM[2]#BA5
BPM[3]#AY2
BPRI#L5
BR0#M2
DBR#J7
DBSY#J1
DEFER#N5
DRDY#F38
FERR#D4
HIT#H2
HITM#F2
IERR#B40
IGNNE#F10
INIT#D8
LINT0C9
LINT1C5
LOCK#N1
PRDY#AV10
PREQ#AV2
PROCHOT#D38
REQ[0]#R1
REQ[1]#R5
REQ[2]#U1
REQ[3]#P4
REQ[4]#W5
RESET#G5
RS[0]#K2
RS[1]#H4
RS[2]#K4
SMI#E5
STPCLK#F8
TCKAV4
TDIAW7
TDOAU1
THERMTRIP#B10
THERMDABB34
THERMDCBD34
TMSAW5
TRDY#L1
TRST#AV8
A[32]#AM2
A[33]#AU5
A[34]#AP2
A[35]#AR1
RSVD07H8
R17 10K_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSSSENSE
VCCSENSE
VSSSENSE
VCCSENSE
H_D#48
H_D#30
H_D#21
H_D#45
H_D#41
H_D#25
H_D#0
COMP2
H_D#53
H_D#18
H_D#13
H_DSTBN#2
H_DINV#3
H_D#50
H_D#37
H_D#32
H_D#3
H_D#28
V_CPU_GTLREF
H_DSTBN#0
H_D#54
H_D#46
COMP3
H_DSTBP#3
H_D#43
H_D#36
H_D#29
H_D#11
COMP1
H_D#16
H_D#9H_D#8
H_D#63
H_D#60
H_D#58
H_D#5
H_D#42
H_D#40
H_D#38
H_D#10
H_DSTBP#0H_DINV#2
H_D#57
H_D#33
H_D#7
H_D#4
H_D#19
H_D#56
H_D#27
H_D#20
H_DSTBP#2
H_D#62H_D#61
H_D#59
H_D#34H_D#2H_D#1
COMP0
H_DSTBN#1
H_DINV#1
H_D#49
H_D#47
H_D#35
H_D#26
H_DINV#0
H_D#23
H_D#14
H_D#44
H_D#31
H_D#24
H_D#15
V_CPU_GTLREF
H_D#6
H_D#55
H_D#52
H_D#39
H_D#22
H_D#12
H_DSTBP#1H_DSTBN#3
H_D#51
H_D#17
VCCSENSE <42>
VSSSENSE <42>
H_D#[0..15]<8>
H_DSTBN#0<8>H_DSTBP#0<8>H_DINV#0<8>
H_DSTBN#1<8>H_DSTBP#1<8>H_DINV#1<8>
CPU_BSEL0<15>CPU_BSEL1<15>CPU_BSEL2<15>
H_D#[32..47] <8>
H_D#[48..63] <8>
CPU_VID0 <42>CPU_VID1 <42>CPU_VID2 <42>CPU_VID3 <42>CPU_VID4 <42>CPU_VID5 <42>CPU_VID6 <42>
H_DSTBN#2 <8>
H_DPSLP# <20>
H_DSTBN#3 <8>
H_PWRGOOD <4,20>
H_DINV#3 <8>
H_DINV#2 <8>
H_DPRSTP# <8,20,42>
H_DPWR# <8>
H_DSTBP#3 <8>
H_DSTBP#2 <8>
H_D#[16..31]<8>
H_CPUSLP# <8>H_PSI# <42>
+VCCP
+VCCP
+1.5VS
+VCC_CORE +VCC_CORE
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
Penryn(2/3)-AGTL+/ITP-XDP
Custom
5 47Saturday, July 18, 2009
2006/02/13 2006/03/10Compal Electronics, Inc.
Close to CPU pin AW43within 500mils.
CPU_BSEL CPU_BSEL2 CPU_BSEL1
166
200
0 1
0 1
CPU_BSEL0
1
0
Resistor placed within0.5" of CPU pin.Traceshould be at least 25mils away from any othertoggling signal.COMP[0,2] trace width is18 mils. COMP[1,3] tracewidth is 4 mils.
Length match within 25 mils.The trace width/space/other is20/7/25.
Close to CPU pinwithin 500mils.
Near pin B34
layout note: Route TEST3 & TEST5 traces onground referenced layer to the TPs
266 0 0 0
Near pin D34
07/18 C6 use 330U_D2_2M_R9
R1
95
4.9
_0
40
2_
1%
12
R2
15
4.9
_0
40
2_
1%
12
R24
100_0402_1%
1 2
R23
100_0402_1%
1 2
+
C6
330U_D2_2V_R9
1
2
R2
22
7.4
_0
40
2_
1%
12
C8
10
U_
08
05
_6
.3V
6M
1
2
U1C
PENRYN SFF_UFCBGA956
ULV723@
VCC[001]F32
VCC[002]G33
VCC[003]H32
VCC[004]J33
VCC[005]K32
VCC[006]L33
VCC[007]M32
VCC[008]N33
VCC[009]P32
VCC[010]R33
VCC[011]T32
VCC[012]U33
VCC[013]V32
VCC[014]W33
VCC[015]Y32
VCC[016]AA33
VCC[017]AB32
VCC[018]AC33
VCC[019]AD32
VCC[020]AE33
VCC[021]AF32
VCC[022]AG33
VCC[023]AH32
VCC[024]AJ33
VCC[025]AK32
VCC[026]AL33
VCC[027]AM32
VCC[028]AN33
VCC[029]AP32
VCC[030]AR33
VCC[031]AT34
VCC[032]AT32
VCC[033]AU33
VCC[034]AV32
VCC[035]AY32
VCC[036]BB32
VCC[037]BD32
VCC[038]B28
VCC[039]B30
VCC[040]B26
VCC[041]D28
VCC[042]D30
VCC[043]F30
VCC[044]F28
VCC[045]H30
VCC[046]H28
VCC[047]D26
VCC[048]F26
VCC[049]H26
VCC[050]K30
VCC[051]K28
VCC[052]M30
VCC[053]M28
VCC[054]K26
VCC[055]M26
VCC[056]P30
VCC[057]P28
VCC[058]T30
VCC[059]T28
VCC[060]V30
VCC[061]V28
VCC[062]P26
VCC[063]T26
VCC[064]V26
VCC[065]Y30
VCC[066]Y28
VCC[067]AB30
VCC[068]AB28
VCC[069]AD30
VCC[070]AD28
VCC[071]Y26
VCC[072]AB26
VCC[073]AD26
VCC[074]AF30
VCC[075]AF28
VCC[076]AH30
VCC[077]AH28
VCC[078]AF26
VCC[079]AH26
VCC[080]AK30
VCC[081]AK28
VCC[082]AM30
VCC[083]AM28
VCC[084]AP30
VCC[085]AP28
VCC[086]AK26
VCC[087]AM26
VCC[088]AP26
VCC[089]AT30
VCC[090]AT28
VCC[091]AV30
VCC[092]AV28
VCC[093]AY30
VCC[094]AY28
VCC[095]AT26
VCC[096]AV26
VCC[097]AY26
VCC[098]BB30
VCC[099]BB28
VCC[100]BD30
VCCA[01]B34
VCCP_004J37
VCCP_005K38
VCCP_006L37
VCCP_007N37
VCCP_008P38
VCCP_009R37
VCCP_010U37
VCCP_011V38
VCCP_012W37
VCCP_013AA37
VCCP_014AB38
VCCP_015AC37
VCCP_016AE37
VCCSENSEBD12
VID[0]BD8
VID[1]BC7
VID[2]BB10
VID[3]BB8
VID[4]BC5
VID[5]BB4
VID[6]AY4
VSSSENSEBC13
VCCA[02]D34
VCCP_001J11
VCCP_002E11
VCCP_003G11
R2
02
7.4
_0
40
2_
1%
12
C7
0.0
1U
_0
40
2_
16
V7
K
1
2
DA
TA
GR
OU
P 0
DA
TA
GR
OU
P 1
DA
TA
GR
OU
P 2
DA
TA
GR
OU
P 3
MISC
U1B
PENRYN SFF_UFCBGA956
ULV723@
COMP[0]AE43
COMP[1]AD44
COMP[2]AE1
COMP[3]AF2
D[0]#F40
D[1]#G43
D[10]#N41
D[11]#T40
D[12]#M40
D[13]#G41
D[14]#M44
D[15]#L43
D[16]#P44
D[17]#V40
D[18]#V44
D[19]#AB44
D[2]#E43
D[20]#R41
D[21]#W41
D[22]#N43
D[23]#U41
D[24]#AA41
D[25]#AB40
D[26]#AD40
D[27]#AC41
D[28]#AA43
D[29]#Y40
D[3]#J43
D[30]#Y44
D[31]#T44
D[32]#AP44
D[33]#AR43
D[34]#AH40
D[35]#AF40
D[36]#AJ43
D[37]#AG41
D[38]#AF44
D[39]#AH44
D[4]#H40
D[40]#AM44
D[41]#AN43
D[42]#AM40
D[43]#AK40
D[44]#AG43
D[45]#AP40
D[46]#AN41
D[47]#AL41
D[48]#AV38
D[49]#AT44
D[5]#H44
D[50]#AV40
D[51]#AU41
D[52]#AW41
D[53]#AR41
D[54]#BA37
D[55]#BB38
D[56]#AY36
D[57]#AT40
D[58]#BC35
D[59]#BC39
D[6]#G39
D[60]#BA41
D[61]#BB40
D[62]#BA35
D[63]#AU43
D[7]#E41
D[8]#L41
D[9]#K44
TEST5AY10
DINV[0]#P40
DINV[1]#R43
DINV[2]#AJ41
DINV[3]#BC37
DPRSTP#G7
DPSLP#B8
DPWR#C41
DSTBN[0]#K40
DSTBN[1]#U43
DSTBN[2]#AK44
DSTBN[3]#AY40
DSTBP[0]#J41
DSTBP[1]#W43
DSTBP[2]#AL43
DSTBP[3]#AY38
GTLREFAW43
PSI#BD10
PWRGOODE7
SLP#D10
TEST3C43
BSEL[0]A37
BSEL[1]C37
BSEL[2]B38
TEST2D40
TEST4AE41
TEST6AC43
TEST1E37
R251K_0402_1%
12
R262K_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCC_CORE +VCCP
+VCCP
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
Penryn(3/3)-Power
Custom
6 47Friday, July 17, 2009
2006/02/13 2006/03/10Compal Electronics, Inc.
U1FPENRYN SFF_UFCBGA956
ULV723@
VC
C_
10
1B
D2
8
VC
C_
10
2B
B2
6
VC
C_
10
3B
D2
6
VC
C_
10
4B
22
VC
C_
10
5B
24
VC
C_
10
6D
22
VC
C_
10
7D
24
VC
C_
10
8F
24
VC
C_
10
9F
22
VC
C_
11
0H
24
VC
C_
11
1H
22
VC
C_
11
2K
24
VC
C_
11
3K
22
VC
C_
11
4M
24
VC
C_
11
5M
22
VC
C_
11
6P
24
VC
C_
11
7P
22
VC
C_
11
8T
24
VC
C_
11
9T
22
VC
C_
12
0V
24
VC
C_
12
1V
22
VC
C_
12
2Y
24
VC
C_
12
3Y
22
VC
C_
12
4A
B2
4
VC
C_
12
5A
B2
2
VC
C_
12
6A
D2
4
VC
C_
12
7A
D2
2
VC
C_
12
8A
F2
4
VC
C_
12
9A
F2
2
VC
C_
13
0A
H2
4
VC
C_
13
1A
H2
2
VC
C_
13
2A
K2
4
VC
C_
13
3A
K2
2
VC
C_
13
4A
M2
4
VC
C_
13
5A
M2
2
VC
C_
13
6A
P2
4
VC
C_
13
7A
P2
2
VC
C_
13
8A
T2
4
VC
C_
13
9A
T2
2
VC
C_
14
0A
V2
4
VC
C_
14
1A
V2
2
VC
C_
14
2A
Y2
4
VC
C_
14
3A
Y2
2
VC
C_
14
4B
B2
4
VC
C_
14
5B
B2
2
VC
C_
14
6B
D2
4
VC
C_
14
7B
D2
2
VC
C_
14
8B
16
VC
C_
14
9B
18
VC
C_
15
0B
20
VC
C_
15
1D
16
VC
C_
15
2D
18
VC
C_
15
3F
18
VC
C_
15
4F
16
VC
C_
15
5H
18
VC
C_
15
6H
16
VC
C_
15
7D
20
VC
C_
15
8F
20
VC
C_
15
9H
20
VC
C_
16
0K
18
VC
C_
16
1K
16
VC
C_
16
2M
18
VC
C_
16
3M
16
VC
C_
16
4K
20
VC
C_
16
5M
20
VC
C_
16
6P
18
VC
C_
16
7P
16
VC
C_
16
8T
18
VC
C_
16
9T
16
VC
C_
17
0V
18
VC
C_
17
1V
16
VC
C_
17
2P
20
VC
C_
17
3T
20
VC
C_
17
4V
20
VC
C_
17
5Y
18
VC
C_
17
6Y
16
VC
C_
17
7A
B1
8
VC
C_
17
8A
B1
6
VC
C_
17
9A
D1
8
VC
C_
18
0A
D1
6
VC
C_
18
1Y
20
VC
C_
18
2A
B2
0
VC
C_
18
3A
D2
0
VC
C_
18
4A
F1
8
VC
C_
18
5A
F1
6
VC
C_
18
6A
H1
8
VC
C_
18
7A
H1
6
VC
C_
18
8A
F2
0
VC
C_
18
9A
H2
0
VC
C_
19
0A
K1
8
VC
C_
19
1A
K1
6
VC
C_
19
2A
M1
8
VC
C_
19
3A
M1
6
VC
C_
19
4A
P1
8
VC
C_
19
5A
P1
6
VC
C_
19
6A
K2
0
VC
C_
19
7A
M2
0
VC
C_
19
8A
P2
0
VC
C_
19
9A
T1
8
VC
C_
20
0A
T1
6
VC
C_
20
1A
V1
8
VC
C_
20
2A
V1
6
VC
C_
20
3A
Y1
8
VC
C_
20
4A
Y1
6
VC
C_
20
5A
T2
0
VC
C_
20
6A
V2
0
VC
C_
20
7A
Y2
0
VC
C_
20
8B
B1
8
VC
C_
20
9B
B1
6
VC
C_
21
0B
D1
8
VC
C_
21
1B
D1
6
VC
C_
21
2B
B2
0
VC
C_
21
3B
D2
0
VC
C_
21
4A
M1
4
VC
C_
21
5A
P1
4
VC
C_
21
6A
T1
4
VC
C_
21
7A
V1
4
VC
C_
21
8A
Y1
4
VC
C_
21
9B
B1
4
VC
C_
22
0B
D1
4
VC
CP
_0
20
AK
38
VC
CP
_0
21
AL
37
VC
CP
_0
22
AN
37
VC
CP
_0
23
AP
38
VC
CP
_0
24
B3
2
VC
CP
_0
25
C3
3
VC
CP
_0
26
D3
2
VC
CP
_0
27
E3
5
VC
CP
_0
28
E3
3
VC
CP
_0
29
F3
4
VC
CP
_0
30
G3
5
VC
CP
_0
31
F3
6
VC
CP
_0
32
H3
6
VC
CP
_0
33
J3
5
VC
CP
_0
34
L3
5
VC
CP
_0
35
N3
5
VC
CP
_0
36
K3
6
VC
CP
_0
37
R3
5
VC
CP
_0
38
U3
5
VC
CP
_0
39
P3
6
VC
CP
_0
40
V3
6
VC
CP
_0
41
W3
5
VC
CP
_0
42
AA
35
VC
CP
_0
43
AC
35
VC
CP
_0
44
AB
36
VC
CP
_0
45
AE
35
VC
CP
_0
46
AG
35
VC
CP
_0
47
AJ3
5
VC
CP
_0
48
AF
36
VC
CP
_0
49
AL
35
VC
CP
_0
50
AN
35
VC
CP
_0
51
AK
36
VC
CP
_0
52
AP
36
VC
CP
_0
53
B1
2
VC
CP
_0
54
B1
4
VC
CP
_0
55
C1
3
VC
CP
_0
56
D1
2
VC
CP
_0
57
D1
4
VC
CP
_0
58
E1
3
VC
CP
_0
59
F1
4
VC
CP
_0
60
F1
2
VC
CP
_0
61
G1
3
VC
CP
_0
62
H1
4
VC
CP
_0
63
H1
2
VC
CP
_0
64
J1
3
VC
CP
_0
65
K1
4
VC
CP
_0
66
K1
2
VC
CP
_0
67
L1
3
VC
CP
_0
68
L1
1
VC
CP
_0
69
M1
4
VC
CP
_0
70
N1
3
VC
CP
_0
71
N1
1
VC
CP
_0
72
K1
0
VC
CP
_0
73
P1
4
VC
CP
_0
74
P1
2
VC
CP
_0
75
R1
3
VC
CP
_0
76
R1
1
VC
CP
_0
77
T1
4
VC
CP
_0
78
U1
3
VC
CP
_0
79
U1
1
VC
CP
_0
80
V1
4
VC
CP
_0
81
V1
2
VC
CP
_0
82
W1
3
VC
CP
_0
83
W1
1
VC
CP
_0
84
P1
0
VC
CP
_0
85
V1
0
VC
CP
_0
86
Y1
4
VC
CP
_0
87
AA
13
VC
CP
_0
88
AA
11
VC
CP
_0
89
AB
14
VC
CP
_0
90
AB
12
VC
CP
_0
91
AC
13
VC
CP
_0
92
AC
11
VC
CP
_0
93
AD
14
VC
CP
_0
94
AB
10
VC
CP
_0
95
AE
13
VC
CP
_0
96
AE
11
VC
CP
_0
97
AF
14
VC
CP
_0
98
AF
12
VC
CP
_0
99
AG
13
VC
CP
_1
00
AG
11
VC
CP
_1
01
AH
14
VC
CP
_1
02
AJ1
3
VC
CP
_1
03
AJ1
1
VC
CP
_1
04
AF
10
VC
CP
_1
05
AK
14
VC
CP
_1
06
AK
12
VC
CP
_1
07
AL
13
VC
CP
_1
08
AL
11
VC
CP
_1
09
AN
13
VC
CP
_1
10
AN
11
VC
CP
_1
11
AP
12
VC
CP
_1
12
AR
13
VC
CP
_1
13
AR
11
VC
CP
_1
14
AK
10
VC
CP
_1
15
AP
10
VC
CP
_1
16
AU
13
VC
CP
_1
17
AU
11
VC
CP
_1
18
L9
VC
CP
_1
19
L7
VC
CP
_1
20
N9
VC
CP
_1
21
N7
VC
CP
_1
22
R9
VC
CP
_1
23
R7
VC
CP
_1
24
U9
VC
CP
_1
25
U7
VC
CP
_1
26
W9
VC
CP
_1
27
W7
VC
CP
_1
28
AA
9
VC
CP
_1
29
AA
7
VC
CP
_1
30
AC
9
VC
CP
_1
31
AC
7
VC
CP
_1
32
AE
9
VC
CP
_1
33
AE
7
VC
CP
_1
34
AG
9
VC
CP
_1
35
AG
7
VC
CP
_1
36
AJ9
VC
CP
_1
37
AJ7
VC
CP
_1
38
AL
9
VC
CP
_1
39
AL
7
VC
CP
_1
40
AN
9
VC
CP
_1
41
AN
7
VC
CP
_1
42
AR
9
VC
CP
_1
43
AR
7
VC
CP
_1
44
A3
3
VC
CP
_1
45
A1
3
VC
CP
_0
18
AG
37
VC
CP
_0
19
AJ3
7
VC
CP
_0
17
AF
38
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCC_CORE
+VCCP
+VCC_CORE
+VCC_CORE
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
Penryn(3/3)-GND/Bypass
Custom
7 47Friday, July 17, 2009
2006/02/13 2006/03/10Compal Electronics, Inc.
ESR <= 1.5m ohm
Near CPU CORE regulator
Mid Frequence Decoupling
High Frequence Decoupling
6/14 :Replace 12pcs 10uF_0805 to 24 pcs 1uF_0402 for CPU transient fail issue.
Del C37 to improve power plan. 6/14
05/22 RF request Add x4 10P cap
05/22 RF request Add x2 10P cap
C2
01
0U
_0
60
3_
6.3
V6
M
1
2
C3
81
U_
04
02
_6
.3V
6K
1
2
+C5
9
22
0U
_D
2_
2V
K_
R9
1
2
C1
01
5
10
P_
04
02
_2
5V
8J
C4
41
U_
04
02
_6
.3V
6K
1
2
C4
11
U_
04
02
_6
.3V
6K
1
2
C1
31
0U
_0
60
3_
6.3
V6
M
1
2
C2
71
0U
_0
60
3_
6.3
V6
M
1
2
C3
11
0U
_0
60
3_
6.3
V6
M
1
2
C2
51
0U
_0
60
3_
6.3
V6
M
1
2
C1
71
0U
_0
60
3_
6.3
V6
M
1
2
C3
51
U_
04
02
_6
.3V
6K
1
2
C6
21
U_
04
02
_6
.3V
6K
1
2
U1E
PENRYN SFF_UFCBGA956
ULV723@
VSS_164G25
VSS_165G23
VSS_166G21
VSS_167J25
VSS_168J23
VSS_169J21
VSS_170L25
VSS_171L23
VSS_172L21
VSS_173N25
VSS_174N23
VSS_175N21
VSS_176R25
VSS_177R23
VSS_178R21
VSS_179U25
VSS_180U23
VSS_181U21
VSS_182W25
VSS_183W23
VSS_184W21
VSS_185AA25
VSS_186AA23
VSS_187AA21
VSS_188AC25
VSS_189AC23
VSS_190AC21
VSS_191AE25
VSS_192AE23
VSS_193AE21
VSS_194AG25
VSS_195AG23
VSS_196AG21
VSS_197AJ25
VSS_198AJ23
VSS_199AJ21
VSS_200AL25
VSS_201AL23
VSS_202AL21
VSS_203AN25
VSS_204AN23
VSS_205AN21
VSS_206AR25
VSS_207AR23
VSS_208AR21
VSS_209AU25
VSS_210AU23
VSS_211AU21
VSS_212AW25
VSS_213AW23
VSS_214AW21
VSS_215BA25
VSS_216BA23
VSS_217BA21
VSS_218BC25
VSS_219BC23
VSS_220BC21
VSS_221C17
VSS_222C19
VSS_223E19
VSS_224E17
VSS_225G19
VSS_226G17
VSS_227J19
VSS_228J17
VSS_229L19
VSS_230L17
VSS_231N19
VSS_232N17
VSS_233R19
VSS_234R17
VSS_235U19
VSS_236U17
VSS_237W19
VSS_238W17
VSS_239AA19
VSS_240AA17
VSS_241AC19
VSS_242AC17
VSS_243AE19
VSS_244AE17
VSS_245AG19
VSS_246AG17
VSS_247AJ19
VSS_248AJ17
VSS_249AL19
VSS_250AL17
VSS_251AN19
VSS_252AN17
VSS_253AR19
VSS_254AR17
VSS_255AU19
VSS_256AU17
VSS_257AW19
VSS_258AW17
VSS_259BA19
VSS_260BA17
VSS_261BC19
VSS_262BC17
VSS_263C11
VSS_264C15
VSS_265E15
VSS_266G15
VSS_267H10
VSS_268M12
VSS_269J15
VSS_270L15
VSS_271N15
VSS_272M10
VSS_273T12
VSS_274R15
VSS_275U15
VSS_276W15
VSS_277T10
VSS_278Y12
VSS_280AA15
VSS_281AC15
VSS_282Y10
VSS_283AD10
VSS_284AH12
VSS_285AE15
VSS_286AG15
VSS_287AJ15
VSS_288AH10
VSS_289AM12
VSS_290AL15
VSS_291AN15
VSS_292AR15
VSS_293AM10
VSS_294AT12
VSS_295AV12
VSS_296AW13
VSS_297AW11
VSS_298AY12
VSS_299AU15
VSS_300AW15
VSS_301AT10
VSS_302BA13
VSS_303BA11
VSS_304BB12
VSS_305BC11
VSS_306BA15
VSS_307BC15
VSS_308B6
VSS_309D6
VSS_310E9
VSS_311F6
VSS_312G9
VSS_313H6
VSS_314K8
VSS_315K6
VSS_316M8
VSS_317M6
VSS_318P8
VSS_319P6
VSS_320T8
VSS_321T6
VSS_322V8
VSS_323V6
VSS_324U5
VSS_325Y8
VSS_326Y6
VSS_327AB8
VSS_328AB6
VSS_329AD8
VSS_330AD6
VSS_331AF8
VSS_332AF6
VSS_333AH8
VSS_334AH6
VSS_335AK8
VSS_336AK6
VSS_337AM8
VSS_338AM6
VSS_339AP8
VSS_340AP6
VSS_341AT8
VSS_342AT6
VSS_343AU9
VSS_344AV6
VSS_345AU7
VSS_346AW9
VSS_347AY6
VSS_348BA9
VSS_349BB6
VSS_350BC9
VSS_351BD6
VSS_352B4
VSS_353C3
VSS_354E3
VSS_355G3
VSS_356J3
VSS_357L3
VSS_358N3
VSS_359R3
VSS_360U3
VSS_361W3
VSS_362AA3
VSS_363AC3
VSS_364AE3
VSS_365AG3
VSS_366AJ3
VSS_367AL3
VSS_368AN3
VSS_369AR3
VSS_370AU3
VSS_371AW3
VSS_372BA3
VSS_373BC3
VSS_374D2
VSS_375E1
VSS_376G1
VSS_377AW1
VSS_378BA1
VSS_379BB2
VSS_380A41
VSS_381A39
VSS_382A29
VSS_383A27
VSS_384A31
VSS_385A25
VSS_386A23
VSS_387A21
VSS_388A19
VSS_389A17
VSS_390A11
VSS_391A15
VSS_392A7
VSS_393A5
VSS_394A9
VSS_279AD12
VSS_395BD4
C4
81
U_
04
02
_6
.3V
6K
1
2
+C5
8
22
0U
_D
2_
2V
K_
R9
1
2
C2
11
0U
_0
60
3_
6.3
V6
M
1
2
C7
11
U_
04
02
_6
.3V
6K
1
2
C6
91
U_
04
02
_6
.3V
6K
1
2
C6
71
U_
04
02
_6
.3V
6K
1
2
C1
01
0U
_0
60
3_
6.3
V6
M
1
2
C6
51
U_
04
02
_6
.3V
6K
1
2
C2
81
0U
_0
60
3_
6.3
V6
M
1
2
C4
21
U_
04
02
_6
.3V
6K
1
2
C1
41
0U
_0
60
3_
6.3
V6
M
1
2
C5
61
U_
04
02
_6
.3V
6K
1
2
C3
41
U_
04
02
_6
.3V
6K
1
2
C3
21
0U
_0
60
3_
6.3
V6
M
1
2
C5
41
U_
04
02
_6
.3V
6K
1
2
C2
61
0U
_0
60
3_
6.3
V6
M
1
2
C1
81
0U
_0
60
3_
6.3
V6
M
1
2
C3
91
U_
04
02
_6
.3V
6K
1
2
C5
11
U_
04
02
_6
.3V
6K
1
2
C3
71
U_
04
02
_6
.3V
6K
1
2
C2
21
0U
_0
60
3_
6.3
V6
M
1
2
+C5
7
22
0U
_D
2_
2V
K_
R9
1
2
C4
51
U_
04
02
_6
.3V
6K
1
2
C1
11
0U
_0
60
3_
6.3
V6
M
1
2
C4
01
U_
04
02
_6
.3V
6K
1
2
C2
31
0U
_0
60
3_
6.3
V6
M
1
2
C1
01
11
0P
_0
40
2_
25
V8
J
C1
01
61
0P
_0
40
2_
25
V8
J
C5
31
U_
04
02
_6
.3V
6K
1
2
C2
91
0U
_0
60
3_
6.3
V6
M
1
2
C1
51
0U
_0
60
3_
6.3
V6
M
1
2
C1
01
3
10
P_
04
02
_2
5V
8J
C4
31
U_
04
02
_6
.3V
6K
1
2
C1
91
0U
_0
60
3_
6.3
V6
M
1
2
C5
51
U_
04
02
_6
.3V
6K
1
2
C6
31
U_
04
02
_6
.3V
6K
1
2
C4
91
U_
04
02
_6
.3V
6K
1
2
C6
11
U_
04
02
_6
.3V
6K
1
2
C4
61
U_
04
02
_6
.3V
6K
1
2
C4
71
U_
04
02
_6
.3V
6K
1
2
C7
01
U_
04
02
_6
.3V
6K
1
2
C6
81
U_
04
02
_6
.3V
6K
1
2
C6
61
U_
04
02
_6
.3V
6K
1
2
C6
41
U_
04
02
_6
.3V
6K
1
2
C1
01
2
10
P_
04
02
_2
5V
8J
C1
01
4
10
P_
04
02
_2
5V
8J
U1D
PENRYN SFF_UFCBGA956
ULV723@
VSS[082]AM36
VSS[148]AW29
VSS[002]F44
VSS[003]D44
VSS[004]D42
VSS[005]F42
VSS[006]H42
VSS[007]K42
VSS[008]M42
VSS[009]P42
VSS[010]T42
VSS[011]V42
VSS[012]Y42
VSS[013]AB42
VSS[014]AD42
VSS[015]AF42
VSS[016]AH42
VSS[017]AK42
VSS[018]AM42
VSS[019]AP42
VSS[020]AY44
VSS[021]AV44
VSS[022]AT42
VSS[023]AV42
VSS[024]AY42
VSS[025]BA43
VSS[026]BB42
VSS[027]C39
VSS[028]E39
VSS[029]G37
VSS[030]H38
VSS[031]J39
VSS[032]L39
VSS[033]M38
VSS[034]N39
VSS[035]R39
VSS[036]T38
VSS[037]U39
VSS[038]W39
VSS[039]Y38
VSS[040]AA39
VSS[041]AC39
VSS[042]AD38
VSS[043]AE39
VSS[044]AG39
VSS[045]AH38
VSS[046]AJ39
VSS[047]AL39
VSS[048]AM38
VSS[049]AN39
VSS[050]AR39
VSS[051]AR37
VSS[052]AT38
VSS[053]AU39
VSS[054]AU37
VSS[055]AW39
VSS[056]AW37
VSS[057]BA39
VSS[058]BC41
VSS[059]BD40
VSS[060]BD38
VSS[061]B36
VSS[062]H34
VSS[063]D36
VSS[064]K34
VSS[065]M34
VSS[066]M36
VSS[067]P34
VSS[068]T34
VSS[069]V34
VSS[070]T36
VSS[071]Y34
VSS[072]AB34
VSS[073]AD34
VSS[074]Y36
VSS[075]AD36
VSS[076]AF34
VSS[077]AH34
VSS[078]AH36
VSS[079]AK34
VSS[080]AM34
VSS[081]AP34
VSS[162]E23
VSS[161]E25
VSS[160]C25
VSS[159]C23
VSS[158]C21
VSS[157]BC31
VSS[156]BA31
VSS[155]BC27
VSS[154]BC29
VSS[153]BA27
VSS[152]BA29
VSS[151]AW31
VSS[083]AR35
VSS[084]AU35
VSS[085]AV34
VSS[086]AW35
VSS[087]AW33
VSS[088]AY34
VSS[089]AT36
VSS[090]AV36
VSS[091]BA33
VSS[092]BC33
VSS[093]BB36
VSS[094]BD36
VSS[095]C27
VSS[096]C29
VSS[097]C31
VSS[098]E29
VSS[099]E27
VSS[100]G29
VSS[101]G27
VSS[102]E31
VSS[103]G31
VSS[104]J29
VSS[105]J27
VSS[107]L27
VSS[108]N29
VSS[109]N27
VSS[110]J31
VSS[111]L31
VSS[112]N31
VSS[113]R29
VSS[114]R27
VSS[115]U29
VSS[116]U27
VSS[117]R31
VSS[118]U31
VSS[119]W29
VSS[120]W27
VSS[121]W31
VSS[122]AA29
VSS[123]AA27
VSS[124]AC29
VSS[125]AC27
VSS[126]AA31
VSS[127]AC31
VSS[128]AE29
VSS[129]AE27
VSS[130]AG29
VSS[131]AG27
VSS[132]AJ29
VSS[133]AJ27
VSS[134]AE31
VSS[135]AG31
VSS[136]AJ31
VSS[137]AL29
VSS[138]AL27
VSS[139]AN29
VSS[140]AN27
VSS[141]AL31
VSS[142]AN31
VSS[143]AR29
VSS[144]AR27
VSS[145]AR31
VSS[146]AU29
VSS[106]L29
VSS[001]B42
VSS[149]AW27
VSS[150]AU31
VSS[147]AU27
VSS[163]E21
C5
01
U_
04
02
_6
.3V
6K
1
2
C1
21
0U
_0
60
3_
6.3
V6
M
1
2
C3
31
U_
04
02
_6
.3V
6K
1
2
C9
10
U_
06
03
_6
.3V
6M
1
2
C3
61
U_
04
02
_6
.3V
6K
1
2
C3
01
0U
_0
60
3_
6.3
V6
M
1
2
C2
41
0U
_0
60
3_
6.3
V6
M
1
2
C1
61
0U
_0
60
3_
6.3
V6
M
1
2
C6
01
U_
04
02
_6
.3V
6K
1
2
C5
21
U_
04
02
_6
.3V
6K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SMRCOMP_VOHSMRCOMP_VOL
SMRCOMP#SMRCOMP
V_DDR_MCH_REF
H_RCOMP
PM_PWROK
H_SWNG
H_D#32
H_D#24
H_D#19
H_D#59
H_D#42
H_D#36
H_D#3
H_D#40
H_RCOMP
H_D#55
H_D#4
H_D#60
H_D#30
H_D#34
H_D#27
H_D#1
H_D#23
H_D#51
H_D#48
H_D#46
H_D#44
H_D#39
H_D#22
H_D#15H_D#14
H_D#9
H_D#56
H_D#54
H_D#8
H_D#37
H_D#35
H_D#28
H_D#25
H_D#12
H_D#38
H_D#26
H_D#11
H_D#7
H_D#53H_D#52
H_D#41
H_D#18
H_D#10
H_VREF
H_D#57
H_D#33
H_D#29
H_SWNG
H_D#6
H_D#45
H_D#43
H_D#20
H_D#61
H_D#17
H_D#63
H_D#58
H_D#21
H_D#16
H_D#50
H_D#62
H_D#5
H_D#49
H_D#31
H_D#2
H_D#47
H_D#13
H_D#0
CL_VREF
TSATN#
H_A#7
H_A#12
H_A#32
H_A#24
H_A#3
H_A#18
H_A#21
H_A#16
H_A#19
H_A#31
H_A#27
H_A#5
H_A#30
H_A#9
H_A#26
H_A#14
H_A#11
H_A#22H_A#23
H_A#34
H_A#20
H_A#8
H_A#15
H_A#6
H_A#25
H_A#17
H_A#4
H_A#13
H_A#33
H_A#29H_A#28
H_A#10
H_A#35
H_VREF
SM_PWROKSM_REXT
V_DDR_MCH_REF
TCK
TMS
TDITDO
SMRCOMP_VOL
SMRCOMP_VOH
SM_DRAMRST#
PM_EXTTS#0
PM_EXTTS#0
SM_PWROK
SLP_S4#
HDA_SDIN2_NB
H_D#[0..63]<5>
H_CPUSLP#<5>
DDR_CKE0_DIMMA <14>DDR_CKE1_DIMMA <14>
DDR_CS0_DIMMA# <14>DDR_CS1_DIMMA# <14>
M_CLK_DDR0 <14>M_CLK_DDR1 <14>
M_CLK_DDR#0 <14>M_CLK_DDR#1 <14>
M_ODT0 <14>M_ODT1 <14>
DMI_TXP0 <21>
DMI_RXN0 <21>
DMI_RXP0 <21>
DMI_TXN0 <21>
CLKREQ#_B <15>MCH_ICH_SYNC# <21>
CL_CLK0 <21>CL_DATA0 <21>
H_RESET#<4>
DMI_TXN1 <21>DMI_TXN2 <21>DMI_TXN3 <21>
DMI_TXP1 <21>DMI_TXP2 <21>DMI_TXP3 <21>
DMI_RXN1 <21>DMI_RXN2 <21>DMI_RXN3 <21>
DMI_RXP1 <21>DMI_RXP2 <21>DMI_RXP3 <21>
PM_BMBUSY#<21>
PM_DPRSLPVR<21,42>
H_DPRSTP#<5,20,42>
H_THERMTRIP#<4,20>
CFG20<10>
MCH_CLKSEL0<15>MCH_CLKSEL1<15>MCH_CLKSEL2<15>
PLT_RST#<19,23,25,27,31>
CL_RST# <21>
CLK_MCH_3GPLL <15>CLK_MCH_3GPLL# <15>
CLK_MCH_DREFCLK <15>CLK_MCH_DREFCLK# <15>MCH_SSCDREFCLK <15>MCH_SSCDREFCLK# <15>
H_A#[3..35] <4>
H_ADS# <4>
H_ADSTB#1 <4>H_ADSTB#0 <4>
H_BPRI# <4>H_BNR# <4>
H_DEFER# <4>H_BR0# <4>
H_DBSY# <4>
CLK_MCH_BCLK# <15>H_DPWR# <5>
CLK_MCH_BCLK <15>
H_DRDY# <4>H_HIT# <4>H_HITM# <4>H_LOCK# <4>H_TRDY# <4>
H_DSTBN#0 <5>H_DSTBN#1 <5>H_DSTBN#2 <5>H_DSTBN#3 <5>
H_REQ#3 <4>H_REQ#2 <4>H_REQ#1 <4>
H_REQ#4 <4>
H_REQ#0 <4>
H_DINV#0 <5>H_DINV#1 <5>H_DINV#2 <5>H_DINV#3 <5>
H_DSTBP#0 <5>H_DSTBP#1 <5>H_DSTBP#2 <5>H_DSTBP#3 <5>
H_RS#2 <4>H_RS#1 <4>H_RS#0 <4>
DFGT_VID_3 <44>DFGT_VID_2 <44>DFGT_VID_1 <44>DFGT_VID_0 <44>
GFXVR_EN <44>
DFGT_VID_4 <44>
V_DDR_MCH_REF<14>
PM_PWROK<21,32,42>
SM_DRAMRST# <14>
PM_EXTTS#0<14>
DDR3_PG <33,39>
SLP_S4#<21,28,30,34,39>
SDVO_CTRLCLK <10>SDVO_CTRLDATA <10>
HDA_RST#_NB <20>
HDA_SYNC_NB <20>HDA_SDOUT_NB <20>
HDA_BITCLK_NB <20>
HDA_SDIN2 <20>
+VCCP+VCCP
+3VS
+VCCP
+3VS
+VCCP
+1.5V
+1.5V
+1.5V
+3VALW
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-52 21P 1.0
Cantiga(1/6)-AGTL/DMI/DDRCustom
8 47Saturday, July 18, 2009
2006/02/13 2006/03/10Compal Electronics, Inc.
Layout Note:
H_RCOMP / H_VREF / H_SWNG
trace width and spacing is 10/20
Layout Note: V_DDR_MCH_REF trace
width and spacing is 20/20.
Near B6 pinwithin 100 mils from NB
layout note:
Route H_SCOMP and H_SCOMP# with trace width,
spacing and impedance (55 ohm) same as FSB data
traces
Trace < = 500mils
layout note:
Place them close to U4 pin BC51.Add R428 in 9/26
04/02 Support HDMI audio
07/09 C77 Y5V->X7R
07/09 C72 C74 Y5V->X5R
07/09 C78 C80 Y5V->X7R
07/13 EMI request 1161
TP34PAD@
C72
2.2U_0603_6.3V6K~D
1
2
TP33PAD@
R4610K_0402_1%
12
C7
60
.1U
_0
40
2_
16
V4
Z @
1
2
R371K_0402_1%
12
R915
12K_0402_5%~D
1 2
R44
1K
_0
40
2_
1%
12
C770.1U_0402_16V7K
1
2
HOST
U4A
CANTIGA GMCH SFF_FCBGA1363
H_A#_10J15
H_A#_11D16
H_A#_12C17
H_A#_13D14
H_A#_14K16
H_A#_15F16
H_A#_16B16
H_A#_17C21
H_A#_18D18
H_A#_19J19
H_A#_20J21
H_A#_21B18
H_A#_22D22
H_A#_23G19
H_A#_24J17
H_A#_25L21
H_A#_26L19
H_A#_27G21
H_A#_28D20
H_A#_29K22
H_A#_3L15
H_A#_30F18
H_A#_31K20
H_A#_4B14
H_A#_5C15
H_A#_6D12
H_A#_7F14
H_A#_8G17
H_A#_9B12
H_ADS#F10
H_ADSTB#_0A15
H_ADSTB#_1C19
H_BNR#C9
H_BPRI#B8
H_BREQ#C11
HPLL_CLK#AJ11
H_CPURST#J11
HPLL_CLKAH10
H_D#_0J7
H_REQ#_2C13
H_REQ#_3G13
H_D#_1H6
H_D#_10M6
H_D#_20P10
H_D#_30W11
H_D#_40AC3
H_D#_50AD2
H_D#_60AF12
H_D#_8L1
H_D#_9M10
H_DBSY#D6
H_D#_11N11
H_D#_12L7
H_D#_13K6
H_D#_14M4
H_D#_15K4
H_D#_16P6
H_D#_17W9
H_D#_18V6
H_D#_19V2
H_D#_2L11
H_D#_21W7
H_D#_22N9
H_D#_23P4
H_D#_24U9
H_D#_25V4
H_D#_26U1
H_D#_27W3
H_D#_28V10
H_D#_29U7
H_D#_3J3
H_D#_31U11
H_D#_32AC11
H_D#_33AC9
H_D#_34Y4
H_D#_35Y10
H_D#_36AB6
H_D#_37AA9
H_D#_38AB10
H_D#_39AA1
H_D#_4H4
H_D#_41AC7
H_D#_42AD12
H_D#_43AB4
H_D#_44Y6
H_D#_45AD10
H_D#_46AA11
H_D#_47AB2
H_D#_48AD4
H_D#_49AE7
H_D#_5G3
H_D#_51AD6
H_D#_52AE3
H_D#_53AG9
H_D#_54AG7
H_D#_55AE11
H_D#_56AK6
H_D#_57AF6
H_D#_58AJ9
H_D#_59AH6
H_D#_6K10
H_D#_61AH4
H_D#_62AJ7
H_D#_63AE9
H_D#_7K12
H_DEFER#E5
H_DINV#_0L9
H_DINV#_1N7
H_DINV#_2AA7
H_DINV#_3AG3
H_DPWR#G11
H_DRDY#H2
H_DSTBN#_0K2
H_DSTBN#_1N3
H_DSTBN#_2AA3
H_DSTBN#_3AF4
H_DSTBP#_0L3
H_DSTBP#_1M2
H_DSTBP#_2Y2
H_DSTBP#_3AF2
H_AVREFL17
H_DVREFK18
H_TRDY#D8
H_HIT#C7
H_HITM#F8
H_LOCK#A11
H_REQ#_0J13
H_REQ#_1L13
H_REQ#_4G15
H_A#_32F20
H_A#_33F22
H_A#_34B20
H_A#_35A19
H_SWINGB6
H_CPUSLP#G9
H_RCOMPD4
H_RS#_0F4
H_RS#_1F2
H_RS#_2G7
TP38PAD@
TP36PAD@
TP39PAD@
R29 4.7K_0402_5%@1 2
R284.7K_0402_5%@1 2
PM
MISC
NC
CLK
DMIC
FG
RSVD
GRAPHICS VID
ME
HDA
DDR CLK/ CONTROL/COMPENSATION
U4B
CANTIGA GMCH SFF_FCBGA1363
SA_CK_0BB32
SA_CK_1BA25
SB_CK_0BA33
SA_CK#_0BA31
SA_CK#_1BC25
SB_CK#_0BC33
SA_CKE_0BC35
SA_CKE_1BE33
SB_CKE_0BE37
SB_CKE_1BC37
SA_CS#_0BK18
SA_CS#_1BK16
SB_CS#_0BE23
SB_CS#_1BC19
SA_ODT_0BJ17
SA_ODT_1BJ19
SB_ODT_0BC17
SB_ODT_1BE17
SM_RCOMPBL25
SM_RCOMP#BK26
SM_VREFBC51
CFG_2G25
CFG_0K26
CFG_1G23
CFG_3J25
CFG_4L25
CFG_5L27
CFG_6F24
CFG_7D24
CFG_8D26
CFG_9J23
CFG_10B26
CFG_11A23
CFG_12C23
CFG_13B24
CFG_14B22
CFG_15K24
CFG_16C25
CFG_17L23
PM_SYNC#J35
PM_EXT_TS#_0J39
PM_EXT_TS#_1L39
PWROKAY39
RSTIN#BB18
DPLL_REF_CLKB42
DPLL_REF_CLK#D42
DPLL_REF_SSCLKB50
DPLL_REF_SSCLK#D50
DMI_RXN_0AG55
DMI_RXN_1AL49
DMI_RXN_2AH54
DMI_RXN_3AL47
DMI_RXP_0AG53
DMI_RXP_1AK50
DMI_RXP_2AH52
DMI_RXP_3AL45
DMI_TXN_0AG49
DMI_TXN_1AJ49
DMI_TXN_2AJ47
DMI_TXN_3AG47
DMI_TXP_0AF50
DMI_TXP_1AH50
DMI_TXP_2AJ45
DMI_TXP_3AG45
RSVD10AN45
RSVD12AT44
RSVD11AP44
RSVD13AN47
PM_DPRSTP#F6
SB_CK_1BA23
SB_CK#_1BB24
RSVD5AN11
RSVD6AM10
RSVD7AK10
RSVD8AL11
RSVD1J43
RSVD2L43
RSVD3J41
RSVD4L41
GFX_VID_0G33
GFX_VID_1G37
GFX_VID_2F38
GFX_VID_3F36
GFX_VR_ENG39
SM_RCOMP_VOHBK32
SM_RCOMP_VOLBL31
THERMTRIP#K28
DPRSLPVRK36
RSVD9F12
CL_CLKAK52
CL_DATAAK54
CL_PWROKAW40
CL_RST#AL53
CL_VREFAL55
NC_1A7
NC_2A49
NC_3A52
NC_4A54
NC_5B54
NC_6D55
NC_7G55
NC_8BE55
NC_9BH55
NC_10BK55
NC_11BK54
NC_12BL54
NC_13BL52
NC_14BL49
NC_15BL7
SDVO_CTRLCLKB38
SDVO_CTRLDATAA37
CLKREQ#C31
RSVD14C27
ICH_SYNC#K42
PEG_CLK#P50
PEG_CLKR49
TSATN#D10
NC_16BL4
GFX_VID_4G35
NC_17BL2
NC_18BK2
NC_19BK1
NC_20BH1
NC_21BE1
NC_22G1
DDPC_CTRLDATAF32
DDPC_CTRLCLKF34
HDA_BCLKC29
HDA_RST#B30
HDA_SDID28
HDA_SDOA27
HDA_SYNCB28
CFG_18L33
CFG_19K32
CFG_20K34
SM_PWROKAY37
SM_REXTBH20
SM_DRAMRST#BA37
RSVD15D30
RSVD17J9
RSVD20AW42
RSVD22BB20
RSVD23BE19
RSVD24BF20
RSVD25BF18
R52 10K_0402_5%1 2
R40 0_0402_5%1 2
R50
100_
04
02
_1
%
12
U53
74AHC1G08GW_SOT353-5~D
IN11
IN22
G3
O4
P5
R35
10K_0402_5%~D
12
C7
5
0.0
1U
_0
40
2_
25
V7
K
1
2
R47 54.9_0402_1%1 2
R311K_0402_1%
12
R33 80.6_0402_1%1 2
R271K_0402_5% @1 2
C780.1U_0402_16V7K
1
2
TP37PAD@
R36 499_0402_1%1 2
R30 1K_0402_5% @1 2
C1161 0.1U_0402_16V4Z
1 2
C7
3
0.0
1U
_0
40
2_
25
V7
K
1
2
R49
24
.9_
04
02
_1
%
12
R917
1K_0402_1%
@
12
R39 100_0402_1% 1 2
R42511_0402_1%
12
C74
2.2U_0603_6.3V6K~D
1
2
TP32PAD@
R916
0_0402_5%
1 2
C800.1U_0402_16V7K
1
2
R919
10K_0402_5%~D
12
TP41PAD@
C79
0.1
U_
04
02
_1
6V
4Z
@
1
2
R38 0_0402_5%1 2
R32 80.6_0402_1%
1 2
R45
22
1_
06
03
_1
%
12
R411K_0402_1%
12
R975
33_0402_5%
1 2
R918 0_0402_5% @
1 2
TP31PAD@
TP35PAD@
C986
0.1U_0402_16V4Z~D
1 2
R4
82
K_
04
02
_1
%
12
R343.01K_0402_1%
12
TP30PAD@
R4310K_0402_1%
12
TP40PAD@
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D63DDR_A_D62
DDR_A_D8
DDR_A_D3DDR_A_D4
DDR_A_D7
DDR_A_D5DDR_A_D6
DDR_A_D59DDR_A_D58DDR_A_D57DDR_A_D56
DDR_A_D47DDR_A_D46
DDR_A_D42DDR_A_D43
DDR_A_D34
DDR_A_D39
DDR_A_D44DDR_A_D45
DDR_A_D35
DDR_A_D41DDR_A_D40
DDR_A_D38
DDR_A_D36DDR_A_D37
DDR_A_D32DDR_A_D33
DDR_A_DQS#0
DDR_A_DQS#2
DDR_A_DQS#5
DDR_A_DQS#3
DDR_A_DQS#1
DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_DM7
DDR_A_DM2
DDR_A_DM5DDR_A_DM4
DDR_A_DM1
DDR_A_DM6
DDR_A_DM3
DDR_A_DM0
DDR_A_D61DDR_A_D60
DDR_A_D2DDR_A_D1DDR_A_D0
DDR_A_D55DDR_A_D54
DDR_A_D51
DDR_A_D48
DDR_A_D50DDR_A_D49
DDR_A_D52DDR_A_D53
DDR_A_MA14
DDR_A_MA0
DDR_A_MA2DDR_A_MA1
DDR_A_MA4DDR_A_MA5
DDR_A_MA3
DDR_A_MA12
DDR_A_MA7DDR_A_MA6
DDR_A_MA9DDR_A_MA8
DDR_A_MA13
DDR_A_MA10DDR_A_MA11
DDR_A_DQS0
DDR_A_D31
DDR_A_DQS2DDR_A_DQS1
DDR_A_DQS6DDR_A_DQS5DDR_A_DQS4DDR_A_DQS3
DDR_A_DQS7
DDR_A_D14DDR_A_D15
DDR_A_D25DDR_A_D24
DDR_A_D26DDR_A_D27
DDR_A_D30
DDR_A_D9
DDR_A_D13DDR_A_D12
DDR_A_D10DDR_A_D11
DDR_A_D29DDR_A_D28
DDR_A_D19DDR_A_D20
DDR_A_D16
DDR_A_D21
DDR_A_D17
DDR_A_D22
DDR_A_D18
DDR_A_D23
DDR_A_DQS#7
DDR_A_BS1 <14>DDR_A_BS0 <14>
DDR_A_BS2 <14>
DDR_A_D[0..63]<14>
DDR_A_DQS#[0..7] <14>
DDR_A_WE# <14>
DDR_A_DM[0..7] <14>
DDR_A_RAS# <14>
DDR_A_MA[0..14] <14>
DDR_A_DQS[0..7] <14>
DDR_A_CAS# <14>
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
Cantiga(2/6)-DDR3 A/B CH
Custom
9 47Saturday, July 18, 2009
2006/02/13 2006/03/10Compal Electronics, Inc.
DDR SYSTEM MEMORY A
U4D
CANTIGA GMCH SFF_FCBGA1363
SA_DQ_0AP46
SA_DQ_1AU47
SA_DQ_10AW49
SA_DQ_11BA49
SA_DQ_12BC49
SA_DQ_13AV46
SA_DQ_14BA47
SA_DQ_15AY50
SA_DQ_16BF46
SA_DQ_17BC47
SA_DQ_18BF50
SA_DQ_19BF48
SA_DQ_2AT46
SA_DQ_20BC43
SA_DQ_21BE49
SA_DQ_22BA43
SA_DQ_23BE47
SA_DQ_24BF42
SA_DQ_25BC39
SA_DQ_26BF44
SA_DQ_27BF40
SA_DQ_28BB40
SA_DQ_29BE43
SA_DQ_3AU49
SA_DQ_30BF38
SA_DQ_31BE41
SA_DQ_32BA15
SA_DQ_33BE11
SA_DQ_34BE15
SA_DQ_35BF14
SA_DQ_36BB14
SA_DQ_37BC15
SA_DQ_38BE13
SA_DQ_39BF16
SA_DQ_4AR45
SA_DQ_40BF10
SA_DQ_41BC11
SA_DQ_42BF8
SA_DQ_43BG7
SA_DQ_44BC7
SA_DQ_45BC9
SA_DQ_46BD6
SA_DQ_47BF12
SA_DQ_48AV6
SA_DQ_49BB6
SA_DQ_5AN49
SA_DQ_50AW7
SA_DQ_51AY6
SA_DQ_52AT10
SA_DQ_53AW11
SA_DQ_54AU11
SA_DQ_55AW9
SA_DQ_56AR11
SA_DQ_57AT6
SA_DQ_58AP6
SA_DQ_59AL7
SA_DQ_6AV50
SA_DQ_60AR7
SA_DQ_61AT12
SA_DQ_62AM6
SA_DQ_63AU7
SA_DQ_7AP50
SA_DQ_8AW47
SA_DQ_9BD50
SA_BS_0BC21
SA_BS_1BJ21
SA_BS_2BJ41
SA_CAS#BK20
SA_MA_0BC23
SA_MA_1BF22
SA_MA_2BE31
SA_MA_3BC31
SA_MA_4BH26
SA_MA_5BJ35
SA_MA_6BB34
SA_MA_7BH32
SA_MA_8BB26
SA_MA_9BF32
SA_MA_10BA21
SA_MA_11BG25
SA_MA_12BH34
SA_MA_13BH18
SA_MA_14BE25
SA_DQS_0AR47
SA_DQS_1BA45
SA_DQS_2BE45
SA_DQS_3BC41
SA_DQS_4BC13
SA_DQS_5BB10
SA_DQS_6BA7
SA_DQS_7AN7
SA_DQS#_0AR49
SA_DQS#_1AW45
SA_DQS#_2BC45
SA_DQS#_3BA41
SA_DQS#_4BA13
SA_DQS#_5BA11
SA_DQS#_6BA9
SA_DQS#_7AN9
SA_DM_0AT50
SA_DM_1BB50
SA_DM_2BB46
SA_DM_3BE39
SA_DM_4BB12
SA_DM_5BE7
SA_DM_6AV10
SA_DM_7AR9
SA_RAS#BH22
SA_WE#BL15
DDR SYSTEM MEMORY B
U4E
CANTIGA GMCH SFF_FCBGA1363
SB_DQ_0AP54
SB_DQ_1AM52
SB_DQ_10BB52
SB_DQ_11BC53
SB_DQ_12AV52
SB_DQ_13AW55
SB_DQ_14BD52
SB_DQ_15BC55
SB_DQ_16BF54
SB_DQ_17BE51
SB_DQ_18BH48
SB_DQ_19BK48
SB_DQ_2AR55
SB_DQ_20BE53
SB_DQ_21BH52
SB_DQ_22BK46
SB_DQ_23BJ47
SB_DQ_24BL45
SB_DQ_25BJ45
SB_DQ_26BL41
SB_DQ_27BH44
SB_DQ_28BH46
SB_DQ_29BK44
SB_DQ_3AV54
SB_DQ_30BK40
SB_DQ_31BJ39
SB_DQ_32BK10
SB_DQ_33BH10
SB_DQ_34BK6
SB_DQ_35BH6
SB_DQ_36BJ9
SB_DQ_37BL11
SB_DQ_38BG5
SB_DQ_39BJ5
SB_DQ_4AM54
SB_DQ_40BG3
SB_DQ_41BF4
SB_DQ_42BD4
SB_DQ_43BA3
SB_DQ_44BE5
SB_DQ_45BF2
SB_DQ_46BB4
SB_DQ_47AY4
SB_DQ_48BA1
SB_DQ_49AP2
SB_DQ_5AN53
SB_DQ_50AU1
SB_DQ_51AT2
SB_DQ_52AT4
SB_DQ_53AV4
SB_DQ_54AU3
SB_DQ_55AR3
SB_DQ_56AN1
SB_DQ_57AP4
SB_DQ_58AL3
SB_DQ_59AJ1
SB_DQ_6AT52
SB_DQ_60AK4
SB_DQ_61AM4
SB_DQ_62AH2
SB_DQ_63AK2
SB_DQ_7AU53
SB_DQ_8AW53
SB_DQ_9AY52
SB_BS_0BJ13
SB_BS_1BK12
SB_BS_2BK38
SB_CAS#BH14
SB_DM_0AP52
SB_DM_1AY54
SB_DM_2BJ49
SB_DM_3BJ43
SB_DM_4BH12
SB_DM_5BD2
SB_DM_6AY2
SB_DM_7AJ3
SB_DQS_0AR53
SB_DQS_1BA53
SB_DQS_2BH50
SB_DQS_3BK42
SB_DQS_4BH8
SB_DQS_5BB2
SB_DQS_6AV2
SB_DQS_7AM2
SB_DQS#_0AT54
SB_DQS#_1BB54
SB_DQS#_2BJ51
SB_DQS#_3BH42
SB_DQS#_4BK8
SB_DQS#_5BC3
SB_DQS#_6AW3
SB_DQS#_7AN3
SB_MA_0BJ15
SB_MA_1BJ33
SB_MA_10BH16
SB_MA_11BK36
SB_MA_12BH38
SB_MA_13BJ11
SB_MA_2BH24
SB_MA_3BA17
SB_MA_4BF36
SB_MA_5BH36
SB_MA_6BF34
SB_MA_7BK34
SB_MA_8BJ37
SB_MA_9BH40
SB_MA_14BL37
SB_RAS#BE21
SB_WE#BK14
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PEGCOMP
DPB_AUX#
DPB_AUXDPB_HPD
DPB_LANE0#DPB_LANE1#DPB_LANE2#DPB_LANE3#
DPB_LANE0DPB_LANE1DPB_LANE2DPB_LANE3
DP_DATA2_PDP_DATA1_PDP_DATA0_P
DP_DATA0_NDP_DATA1_NDP_DATA2_NDP_DATA3_N
DP_DATA3_P
DPB_AUX#_C_1
DPB_AUX_C_1
DDC1_EN
DP_EN
DPB_AUX_C
DPB_AUX#_CDPB_AUX#
DPB_AUX
CFG20<8>
DDC2_CLK<17>DDC2_DATA<17>
BLON_PWM<17>ENABLT<17>
ENAVDD<17>
TXCLK_L-<17>TXCLK_L+<17>
TXOUT_L0+<17>TXOUT_L1+<17>TXOUT_L2+<17>
TXOUT_L0-<17>TXOUT_L1-<17>TXOUT_L2-<17>
DPB_HPD <16>
DP_DATA0_N <16>DP_DATA1_N <16>DP_DATA2_N <16>DP_DATA3_N <16>
DP_DATA0_P <16>DP_DATA1_P <16>DP_DATA2_P <16>DP_DATA3_P <16>
DPD_C_AUXR# <16>
DPD_C_AUXR <16>
DP_EN<16>
DDC1_EN<16>
SDVO_CTRLCLK<8>
SDVO_CTRLDATA<8>
+3VS
+3VS
+VCCP
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
Cantiga(3/6)-VGA/LVDS/TV
Custom
10 47Saturday, July 18, 2009
2006/02/13 2006/03/10Compal Electronics, Inc.
PEGCOMP trace widthand spacing is 20/25 mils.
000 = FSB 1066MHz
CFG[4:3] Reserved
CFG60 = The iTPM Host Interface is enable
1 = The iTPM Host Interface is disable *
Reserved
CFG10 (PCIE Lookback enable)
(Default)11 = Normal Operation10 = All Z Mode Enabled
00 = Reserved01 = XOR Mode Enabled
*
0 = Enable
1 = Disable *
CFG9
(PCIE Graphics Lane Reversal)
CFG[2:0] FSB Freq select
Reserved
ReservedCFG[15:14]
Strap Pin Table
ReservedCFG[18:17]
(Lane number in Order)
Others = Reserved
011 = FSB 667MHz
010 = FSB 800MHz
*
1 = Reverse Lane
0 = Reverse Lane,15->0, 14->1
1 = Enabled
0 = Normal Operation
0 = Disabled
*
0 = DMI x 2
*
*
*
1 = PCIE/SDVO are operating simu.
0 = Only PCIE or SDVO is operational. *
1 = Normal Operation,Lane Number in order
1 = DMI x 4
0 =(TLS)chiper suite with no confidentiality
1 =(TLS)chiper suite with confidentiality
CFG5 (DMI select)
CFG19 (DMI Lane Reversal)
CFG16 (FSB Dynamic ODT)
CFG6
CFG7 (Intel Management Engine Crypto strap)
CFG20 (PCIE/SDVO concurrent)
CFG11
CFG[13:12] (XOR/ALLZ)
CFG8
Close to pin D32 and keep30mil space to otherpart/trace.
layout note:
Place R53 <500mils to U4 pin U45&T44.
For make layout clearance, delTP for channel B. 10/18
10/18
10/18
10/19
10/19
07/08 <BOM> HW request 4.22K->3.24K
R67 4.02K_0402_1% @1 2
R953
100K_0402_5%
12
Q15A2N7002DW-7-F_SOT363-6
61
2
R53 49.9_0402_1%1 2
C82 0.1U_0402_16V7K
1 2
C87 0.1U_0402_16V7K1 2
R55 10K_0402_5%
1 2
Q15B2N7002DW-7-F_SOT363-6
3
5
4
C88 0.1U_0402_16V7K1 2
R9502.2K_0402_5%
12
C83 0.1U_0402_16V7K1 2
Q16A2N7002DW-7-F_SOT363-6
61
2
C89 0.1U_0402_16V7K1 2
C84 0.1U_0402_16V7K1 2
R621.02K_0402_1%
12
R9512.2K_0402_5%
12
C90 0.1U_0402_16V7K1 2
Q16B2N7002DW-7-F_SOT363-6
3
5
4
LVDS
PCI-EXPRESS GRAPHICS
TV
VGA
U4C
CANTIGA GMCH SFF_FCBGA1363
PEG_COMPIU45
PEG_COMPOT44
PEG_RX#_0D52
PEG_RX#_1G49
PEG_RX#_2K54
PEG_RX#_3H50
PEG_RX#_4M52
PEG_RX#_5N49
PEG_RX#_6P54
PEG_RX#_7V46
PEG_RX#_8Y50
PEG_RX#_9V52
PEG_RX#_10W49
PEG_RX#_11AB54
PEG_RX#_12AD46
PEG_RX#_13AC55
PEG_RX#_14AE49
PEG_RX#_15AF54
PEG_RX_0E51
PEG_RX_1F48
PEG_RX_2J55
PEG_RX_3J49
PEG_RX_4M54
PEG_RX_5M50
PEG_RX_6P52
PEG_RX_7U47
PEG_RX_8AA49
PEG_RX_9V54
PEG_RX_10V50
PEG_RX_11AB52
PEG_RX_12AC47
PEG_RX_13AC53
PEG_RX_14AD50
PEG_RX_15AF52
PEG_TX#_0L47
PEG_TX#_10AB46
PEG_TX#_3H54
PEG_TX#_4L55
PEG_TX#_5T46
PEG_TX#_7U49
PEG_TX#_8T54
PEG_TX#_9Y46
PEG_TX#_1F52
PEG_TX#_11W53
PEG_TX#_12Y54
PEG_TX#_13AC49
PEG_TX#_14AF46
PEG_TX#_15AD54
PEG_TX#_2P46
PEG_TX_0J47
PEG_TX_1F54
PEG_TX_2N47
PEG_TX_3H52
PEG_TX_4L53
PEG_TX_5R47
PEG_TX_6R55
PEG_TX_7T50
PEG_TX_8T52
PEG_TX_9W47
PEG_TX_10AA47
PEG_TX_11W55
PEG_TX_12Y52
PEG_TX_13AB50
PEG_TX_14AE47
PEG_TX_15AD52
L_CTRL_CLKK38
L_CTRL_DATAL37
L_DDC_CLKJ37
L_DDC_DATAL35
L_VDD_ENB36
LVDS_IBGF50
LVDS_VBGH46
LVDS_VREFHP44
LVDS_VREFLK46
LVDSA_CLK#D46
LVDSA_CLKB46
LVDSA_DATA#_0G45
LVDSA_DATA#_1F46
LVDSA_DATA#_2G41
LVDSA_DATA_1G47
LVDSA_DATA_2F40
LVDSB_CLK#D44
LVDSB_CLKB44
LVDSB_DATA#_0B40
LVDSB_DATA#_1A41
LVDSB_DATA#_2F42
LVDSB_DATA_1C41
LVDSB_DATA_2G43
L_BKLT_ENC37
TVA_DACJ27
TVB_DACE27
TVC_DACG27
TVA_RTNF26
CRT_BLUEJ29
CRT_DDC_CLKD36
CRT_DDC_DATAC35
CRT_GREENG29
CRT_HSYNCJ33
CRT_TVO_IREFD32
CRT_REDF30
CRT_IRTNE29
CRT_VSYNCG31
LVDSA_DATA_0F44
LVDSB_DATA_0D40
L_BKLT_CTRLD38
TV_DCONSEL_0B34
TV_DCONSEL_1D34
PEG_TX#_6R53
LVDSA_DATA#_3C45
LVDSA_DATA_3A45
LVDSB_DATA#_3D48
LVDSB_DATA_3B48
Q4A2N7002DW-7-F_SOT363-6
61
2
R54 10K_0402_5%
1 2
R56 3.24K_0402_1%
1 2
C85 0.1U_0402_16V7K1 2
Q1A2N7002DW-7-F_SOT363-6
61
2
R952100K_0402_5%
12
Q4B2N7002DW-7-F_SOT363-6
3
5
4
T4@
C81 0.1U_0402_16V7K
1 2
C86 0.1U_0402_16V7K1 2
Q1B2N7002DW-7-F_SOT363-6
3
5
4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1
.5V
_S
M_
CK
G
+1.05VM_PEGPLL
+1.05VM_HPLL
+1.05VM_HPLL
+1.05VM_MPLL
+1.05VM_PEGPLL
+1.05VM_DPLLA
+VCCP
+3VS
+VCCP
+1.5VS+1.5VS_QDAC
+VCCP
+1.05VM_MPLL
+1.05VM_HPLL
+1.05VM_DPLLA
+1.5VS
+1.05VM_PEGPLL
+VCCP
+3VS
+VCCP_D
+1.5VS_QDAC
+1.8V
+1.8V
+VCCP
+VCCP
+VCCP
+VCCP
+VCCP
+VCCP
+VCCP
+1.8V_TXLVDS+1.8V
+VCCP
+1.5V
+1.8V_TXLVDS
+1.5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-52 21P 1.0
Cantiga(4/6)-PWRCustom
11 47Saturday, July 18, 2009
2006/02/13 2006/03/10Compal Electronics, Inc.
9/27
9/27
9/27
12/12
Near T41 Pin
747.5mA
852mA
07/18 C108 use 330U_D2_2V_R9
06/19 Remove it on PV memo
07/09 Change Y5V-->X5R or X7R
07/09 Change Y5V-->X5R or X7R
+ C93220U_B2_2.5VM_R25M
@
1
2
C99
0.1U_0402_16V7K
1
2
C122
0.1U_0402_16V7K
1
2
C1
17
10
U_
08
05
_6
.3V
6M
1
2
R7
31
_0
40
2_
1%
12
D3 CH751H-40_SC76 2 1C126
0.1U_0402_16V7K
1
2
C1
18
10U
_0
80
5_
16
V6
K_
X5
R
1
2
+ C91
220U_B2_2.5VM_R25M
@ 1
2
C1
02
10U
_0
80
5_
16
V6
K_
X5
R
1
2
C116
4.7U_0805_10V5K
1
2
C1
00
4.7
U_
08
05
_1
0V
5K
1
2
C92
0.1U_0402_16V7K
1
2
C11560.1U_0402_16V7K
1
2
C981000P_0402_50V7K
1
2
C124
0.1U_0402_16V7K
1
2
C9
74
.7U
_0
80
5_
10
V5
K
1
2
L2
BLM18PG121SN1D_06031 2
C1
12
1000P
_0
40
2_
50
V7
K
1
2
C9
64
.7U
_0
80
5_
10
V5
K
1
2
C120
0.1U_0402_16V7K
1
2
C1
04
0.1
U_
04
02
_1
6V
7K
1
2
C125
0.1U_0402_16V7K
1
2
C103
1U_0603_16V6K
1
2
C9
5
2.2
U_
08
05
_1
0V
_X
5R
1
2
R76
BLM18PG181SN1D_06031 2
C1
21
0.1
U_
04
02
_1
6V
7K
1
2
C1
31
0.0
1U
_0
40
2_
16
V7
K
1
2
C1
10
4.7
U_
08
05
_1
0V
5K
1
2
C127
1U_0603_16V6K
1
2
C1
28
0.4
7U
_0
60
3_
10
V7
K
1
2
C1
29
0.4
7U
_0
60
3_
10
V7
K
1
2
+ C113220U_B2_2.5VM_R25M
@
1
2
C1
15
10U
_0
80
5_
16
V6
K_
X5
R
1
2
L1
BLM18PG181SN1D_06031 2
R71
BLM18PG181SN1D_06031 2
C12310U_0805_16V6K_X5R
1
2
C1
14
0.1
U_
04
02
_1
6V
7K
1
2
R68
BLM18PG181SN1D_06031 2
POWER
CRT
PLL
A PEG
A SM
TV
D TV/CRT
LVDS
VTTLF
PEG
SM CK
AXF
VTT
DMI
HV
A LVDS
HDA
U4H
CANTIGA GMCH SFF_FCBGA1363
VCCA_CRT_DACJ31
VCCA_DPLLAJ45
VCCA_DPLLBL49
VCCA_HPLLAF10
VCCA_MPLLAE1
VCCA_TV_DACK30
VCCD_PEG_PLLAE43
VTT_12T2
VTT_13R1
VCCD_HPLLAH12
VTT_1R13
VTT_2T12
VTT_4T10
VTT_5R9
VTT_6T8
VTT_7R7
VTT_8T6
VTT_9R5
VTT_10T4
VTT_11R3
VTT_3R11
VCCA_DAC_BGL31
VCCD_TVDACN32
VTTLF1K14
VTTLF2Y12
VTTLF3P2
VCC_DMI_1AM44
VCC_DMI_2AN43
VCC_SM_CK_1BK24
VCC_SM_CK_2BL23
VCC_SM_CK_3BJ23
VCC_SM_CK_4BK22
VCCD_LVDS_1M46
VCCD_QDACN34
VCC_AXF_1M25
VCC_AXF_2N24
VCC_AXF_3M23
VCC_TX_LVDST41
VCC_HV_1C33
VCC_HV_2A33
VCC_PEG_1AB44
VCCD_LVDS_2L45
VCC_PEG_2Y44
VCC_PEG_3AC43
VCC_PEG_4AA43
VCC_DMI_3AL43
VSSA_DAC_BGM33
VCC_HDAA31
VCCA_SM_CK_1AU31
VCCA_SM_CK_2AU29
VCCA_SM_CK_3AU28
VCCA_SM_CK_4AU27
VCCA_SM_1AW24
VCCA_SM_2AU24
VCCA_SM_3AW22
VCCA_SM_4AU22
VCCA_SM_5AU21
VCCA_SM_6AW20
VCCA_SM_7AU19
VCCA_SM_8AW18
VCCA_SM_9AU18
VCCA_SM_10AW16
VCCA_SM_11AU16
VCCA_SM_12AT16
VCCA_SM_13AR16
VCCA_SM_14AU15
VCCA_SM_15AT15
VCCA_SM_16AR15
VCCA_SM_17AW14
VCCA_PEG_BGAJ43
VCCA_PEG_PLLAG43
VCCA_LVDS1U43
VCCA_LVDS2U41
VSSA_LVDSV44
VCCA_SM_CK_NCTF_1AT31
VCCA_SM_CK_NCTF_2AR31
VCCA_SM_CK_NCTF_3AT29
VCCA_SM_CK_NCTF_4AR29
VCCA_SM_CK_NCTF_5AT28
VCCA_SM_CK_NCTF_6AR28
VCCA_SM_CK_NCTF_7AT27
VCCA_SM_CK_NCTF_8AR27
VCCA_SM_NCTF_1AT24
VCCA_SM_NCTF_2AR24
VCCA_SM_NCTF_3AT22
VCCA_SM_NCTF_4AR22
VCCA_SM_NCTF_5AT21
VCCA_SM_NCTF_6AR21
VCCA_SM_NCTF_7AT19
VCCA_SM_NCTF_8AR19
VCCA_SM_NCTF_9AT18
VCCA_SM_NCTF_10AR18
R74 10_0402_5% 1 2
C1
09
10
U_
08
05
_6
.3V
6M
1
2
C1010.1U_0402_16V7K
1
2
C9
4
0.4
7U
_0
60
3_
10
V7
K
1
2
C1
05
10
U_
08
05
_6
.3V
6M
1
2
C1
33
4.7
U_
06
03
_6
.3V
1
2
C132
0.1U_0402_16V7K
1
2
C111
1U_0603_16V6K
1
2
R70
BLM18PG181SN1D_06031 2
+C108
330U_D2_2V_R9
1
2
C1
19
10
U_
08
05
_6
.3V
6M
1
2
C1
30
0.4
7U
_0
60
3_
10
V7
K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCSM_LF2VCCSM_LF3
VCCSM_LF1
VCCSM_LF6VCCSM_LF7
VCCSM_LF4VCCSM_LF5
+VCC_CM_BB36+VCC_CM_BE35
+VCC_CM_BB16
+VCC_CM_BF24+VCC_CM_BL19
+VCC_CM_BF24+VCC_CM_BL19+VCC_CM_BB16
+VCC_CM_BB36+VCC_CM_BE35
+VCC_CM_BC29
+VCC_CM_BC29
+VCCGFX
+VCCP
+VCCP
+VCCGFX
+1.5V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
Cantiga(5/6)-PWR/GND
Custom
12 47Friday, July 17, 2009
2006/02/13 2006/03/10Compal Electronics, Inc.
Extnal Graphic: 1210.34mAintegrated Graphic: 1930.4mA
3000mA-->4140mA
1853mA(VCC and VCC_NCTF)
5739mA-->7700mA(VCC_AXG and VCC_AXG_NCTF)
05/22 RF request Add x1 10P cap
06/19 Remove it on PV memo
07/09 Y5V->X5R or X7R
C1
54
1U
_0
60
3_
16
V6
K
1
2
C1
53
0.4
7U
_0
40
2_
6.3
V6
K
1
2
C1
45
0.1
U_
04
02
_1
6V
4Z
1
2
C1560.1U_0402_16V7K
1
2
C1
36
4.7
U_
08
05
_1
0V
4Z
1
2
C1
35
0.2
2U
_0
40
2_
10
V4
Z
1
2
C1
11
0
0.1
U_
04
02
_1
6V
7K
1
2
+C137
220U_B2_2.5VM_R25M @
1
2
C1
42
10
U_
08
05
_6
.3V
6M
1
2
C1
34
0.1
U_
04
02
_1
6V
4Z
1
2
C1
39
10
U_
08
05
_6
.3V
6M
1
2
C1
40
0.0
1U
_0
40
2_
16
V7
K
1
2C
15
51
U_
06
03
_1
6V
6K
1
2
C1
51
0.2
2U
_0
60
3_
10
V7
K
1
2
C1158
0.1
U_
04
02
_1
6V
4Z
1
2
+C146
330U_D2E_2.5VM_R9
1
2
C1
52
0.2
2U
_0
60
3_
10
V7
K
1
2
C1
44
0.2
2U
_0
40
2_
10
V4
Z
1
2
C1
10
5
0.1
U_
04
02
_1
6V
7K
1
2
C157
0.1U_0402_16V7K
1
2
C1
48
10
U_
08
05
_6
.3V
1
2
POWER
VCC NCTF
VCC CORE
U4F
CANTIGA GMCH SFF_FCBGA1363
VCC_NCTF_1AT38
VCC_NCTF_20AH37
VCC_NCTF_29T37
VCC_NCTF_9Y38
VCC_NCTF_10W38
VCC_NCTF_11U38
VCC_NCTF_12T38
VCC_NCTF_13R38
VCC_NCTF_14AT37
VCC_NCTF_15AR37
VCC_NCTF_17AM37
VCC_NCTF_18AL37
VCC_NCTF_19AJ37
VCC_NCTF_2AR38
VCC_NCTF_24AC37
VCC_NCTF_25AA37
VCC_NCTF_3AN38
VCC_NCTF_30R37
VCC_NCTF_31AT35
VCC_NCTF_32AR35
VCC_NCTF_38R34
VCC_NCTF_4AM38
VCC_NCTF_5AL38
VCC_NCTF_6AG38
VCC_NCTF_7AE38
VCC_NCTF_8AA38
VCC_NCTF_33U35
VCC_NCTF_34AT34
VCC_NCTF_35AR34
VCC_NCTF_36U34
VCC_NCTF_37T34
VCC_NCTF_26Y37
VCC_NCTF_27W37
VCC_NCTF_28U37
VCC_NCTF_16AN37
VCC_NCTF_21AG37
VCC_NCTF_22AE37
VCC_NCTF_23AD37
VCC_1AT41
VCC_2AR41
VCC_3AN41
VCC_4AJ41
VCC_5AH41
VCC_6AD41
VCC_7AC41
VCC_8Y41
VCC_9W41
VCC_10AT40
VCC_11AM40
VCC_12AL40
VCC_13AJ40
VCC_14AH40
VCC_15AG40
VCC_16AE40
VCC_17AD40
VCC_18AC40
VCC_19AA40
VCC_20Y40
VCC_21AN35
VCC_22AM35
VCC_23AJ35
VCC_24AH35
VCC_25AD35
VCC_26AC35
VCC_27W35
VCC_28AM34
VCC_29AL34
VCC_30AJ34
VCC_31AH34
VCC_32AG34
VCC_33AE34
VCC_34AD34
VCC_35AC34
VCC_36AA34
VCC_37Y34
VCC_38W34
VCC_39AM32
VCC_40AL32
VCC_41AJ32
VCC_42AH32
VCC_46AM31
VCC_47AL31
VCC_48AJ31
VCC_50AM29
VCC_51AL29
VCC_52AM28
VCC_53AL28
VCC_55AM27
VCC_56AL27
VCC_57AM25
VCC_58AL25
VCC_61N36
VCC_43AE32
VCC_44AD32
VCC_45AA32
VCC_49AH31
VCC_54AJ28
VCC_59AJ25
VCC_60AM24
C1
43
0.2
2U
_0
40
2_
10
V4
Z
1
2
+C141
220U_B2_2.5VM_R25M
1
2
C1
02
11
0P
_0
40
2_
25
V8
J
C1
10
4
0.1
U_
04
02
_1
6V
7K
1
2
C1
10
6
0.1
U_
04
02
_1
6V
7K
1
2
C1
50
0.1
U_
04
02
_1
6V
4Z
1
2
C1
38
10
U_
08
05
_6
.3V
6M
1
2
C1
47
10
U_
08
05
_6
.3V
1
2
C1157
0.1
U_
04
02
_1
6V
4Z
1
2
C1
10
3
0.1
U_
04
02
_1
6V
7K
1
2
C1
49
1U
_0
60
3_
10
V4
Z
1
2
C1
10
2
0.1
U_
04
02
_1
6V
7K
1
2
POWER
VCC SM
VCC GFX
VCC GFX NCTF
VCC SM LF
VCC GFX
U4G
CANTIGA GMCH SFF_FCBGA1363
VCC_SM_10AW30
VCC_SM_20BF28
VCC_SM_30AW26
VCC_SM_6BH30
VCC_SM_7BF30
VCC_SM_8BD30
VCC_SM_9BB30
VCC_SM_11BL29
VCC_SM_12BJ29
VCC_SM_13BG29
VCC_SM_14BE29
VCC_SM_15BC29
VCC_SM_16BA29
VCC_SM_17AY29
VCC_SM_18BK28
VCC_SM_19BH28
VCC_SM_2BE35
VCC_SM_21BD28
VCC_SM_22BB28
VCC_SM_23BL27
VCC_SM_24BJ27
VCC_SM_25BG27
VCC_SM_26BE27
VCC_SM_27BC27
VCC_SM_28BA27
VCC_SM_29AY27
VCC_SM_3AW34
VCC_SM_31BF24
VCC_SM_33BB16
VCC_AXG_NCTF_11R27
VCC_AXG_NCTF_12U25
VCC_AXG_NCTF_13T25
VCC_AXG_NCTF_14R25
VCC_AXG_NCTF_15U24
VCC_AXG_NCTF_16U22
VCC_AXG_NCTF_17T22
VCC_AXG_NCTF_18R22
VCC_AXG_NCTF_19U21
VCC_AXG_NCTF_20T21
VCC_AXG_NCTF_3T31
VCC_AXG_NCTF_21R21
VCC_AXG_NCTF_30U19
VCC_AXG_NCTF_29W19
VCC_AXG_NCTF_28AC19
VCC_AXG_NCTF_27AD19
VCC_AXG_NCTF_26AE19
VCC_AXG_NCTF_25AG19
VCC_AXG_NCTF_24AH19
VCC_AXG_NCTF_23AL19
VCC_AXG_NCTF_4R31
VCC_AXG_NCTF_42U18
VCC_AXG_NCTF_43T18
VCC_AXG_NCTF_44R18
VCC_AXG_NCTF_41W18
VCC_AXG_NCTF_40Y18
VCC_AXG_NCTF_39AA18
VCC_AXG_NCTF_38AC18
VCC_AXG_NCTF_37AD18
VCC_AXG_NCTF_36AE18
VCC_AXG_NCTF_35AG18
VCC_AXG_NCTF_5U29
VCC_AXG_NCTF_34AH18
VCC_AXG_NCTF_33AJ18
VCC_AXG_NCTF_32AL18
VCC_AXG_NCTF_22AM19
VCC_AXG_NCTF_31AM18
VCC_AXG_62AJ16
VCC_AXG_NCTF_6T29
VCC_AXG_NCTF_7R29
VCC_AXG_NCTF_8U28
VCC_AXG_NCTF_9U27
VCC_AXG_NCTF_10T27
VCC_SM_4AW32
VCC_SM_5BK30
VCC_AXG_NCTF_2U31
VCC_SM_1BB36
VCC_AXG_22AG27
VCC_AXG_24AD27
VCC_AXG_25AC27
VCC_AXG_27Y27
VCC_AXG_28W27
VCC_SM_LF1AU45
VCC_SM_LF2BF52
VCC_SM_LF3BB38
VCC_SM_LF4BA19
VCC_SM_LF5BE9
VCC_SM_LF6AU9
VCC_SM_LF7AL9
VCC_AXG_26AA27
VCC_AXG_55AD21
VCC_AXG_56AC21
VCC_AXG_57AA21
VCC_AXG_29AH25
VCC_AXG_30AD25
VCC_AXG_31AC25
VCC_AXG_32W25
VCC_AXG_58Y21
VCC_AXG_23AE27
VCC_AXG_50AA22
VCC_AXG_7Y31
VCC_AXG_20AA28
VCC_AXG_3AE31
VCC_AXG_54AH21
VCC_AXG_15Y29
VCC_AXG_53AJ21
VCC_AXG_49AC22
VCC_AXG_6AA31
VCC_AXG_13AC29
VCC_AXG_10AG29
VCC_AXG_52AL21
VCC_AXG_5AC31
VCC_AXG_2AG31
VCC_AXG_19AE28
VCC_AXG_12AD29
VCC_AXG_51AM21
VCC_AXG_9AH29
VCC_AXG_21AH27
VCC_AXG_14AA29
VCC_AXG_4AD31
VCC_AXG_18AG28
VCC_AXG_17AH28
VCC_AXG_11AE29
VCC_AXG_16W29
VCC_AXG_8W31
VCC_AXG_59W21
VCC_AXG_60AM16
VCC_AXG_33AJ24
VCC_AXG_34AH24
VCC_AXG_35AG24
VCC_AXG_36AE24
VCC_AXG_37AD24
VCC_AXG_38AC24
VCC_AXG_39AA24
VCC_AXG_40Y24
VCC_AXG_41W24
VCC_AXG_61AL16
VSS_AXG_SENSEAE13
VCC_AXG_SENSEAG13
VCC_AXG_42AM22
VCC_AXG_43AL22
VCC_AXG_44AJ22
VCC_AXG_45AH22
VCC_AXG_46AG22
VCC_AXG_47AE22
VCC_AXG_63AH16
VCC_AXG_64AD16
VCC_AXG_65AC16
VCC_AXG_66AA16
VCC_AXG_67U16
VCC_AXG_68T16
VCC_AXG_69R16
VCC_AXG_70AM15
VCC_AXG_71AL15
VCC_AXG_72AJ15
VCC_AXG_73AH15
VCC_AXG_74AG15
VCC_AXG_75AE15
VCC_AXG_76AA15
VCC_AXG_77Y15
VCC_AXG_78W15
VCC_AXG_79U15
VCC_AXG_80T15
VCC_SM_32BL19
VCC_AXG_1W32
VCC_AXG_48AD22
VCC_AXG_NCTF_1T32
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
Cantiga(6/6)-PWR/GND
Custom
13 47Friday, July 17, 2009
2006/02/13 2006/03/10Compal Electronics, Inc.
12/12 FOR NO CRACK DETECT FUNCTION
12/12 FOR NO CRACK DETECT FUNCTION
VSS
U4I
CANTIGA GMCH SFF_FCBGA1363
VSS_1BA55
VSS_182AN28
VSS_2AU55
VSS_3AN55
VSS_4AJ55
VSS_5AE55
VSS_6AA55
VSS_7U55
VSS_8N55
VSS_9BD54
VSS_10BG53
VSS_11AJ53
VSS_12AE53
VSS_13AA53
VSS_14U53
VSS_15N53
VSS_16J53
VSS_17G53
VSS_19K52
VSS_20BG51
VSS_21BA51
VSS_22AW51
VSS_23AU51
VSS_24AR51
VSS_25AN51
VSS_26AL51
VSS_27AJ51
VSS_28AG51
VSS_29AE51
VSS_30AC51
VSS_31AA51
VSS_32W51
VSS_33U51
VSS_34R51
VSS_35N51
VSS_36L51
VSS_37J51
VSS_38G51
VSS_39C51
VSS_40BK50
VSS_41AM50
VSS_42K50
VSS_43BG49
VSS_44E49
VSS_45C49
VSS_46BD48
VSS_47BB48
VSS_48AY48
VSS_49AV48
VSS_50AT48
VSS_51AP48
VSS_52AM48
VSS_53AK48
VSS_54AH48
VSS_55AF48
VSS_56AD48
VSS_57AB48
VSS_58Y48
VSS_59V48
VSS_60T48
VSS_61P48
VSS_62M48
VSS_63K48
VSS_64H48
VSS_65BL47
VSS_66BG47
VSS_67E47
VSS_68C47
VSS_69A47
VSS_70BD46
VSS_71AY46
VSS_72AM46
VSS_73AK46
VSS_74AH46
VSS_75BG45
VSS_76AE45
VSS_77AC45
VSS_78AA45
VSS_79W45
VSS_80R45
VSS_81N45
VSS_82E45
VSS_83BD44
VSS_84BB44
VSS_85AV44
VSS_86AK44
VSS_87AH44
VSS_97R43
VSS_100C43
VSS_101A43
VSS_102BD42
VSS_103H42
VSS_104BG41
VSS_105AY41
VSS_106AU41
VSS_107AM41
VSS_108AL41
VSS_109AG41
VSS_110AE41
VSS_111AA41
VSS_112R41
VSS_113M41
VSS_114E41
VSS_115BD40
VSS_116AU40
VSS_117AR40
VSS_118AN40
VSS_119W40
VSS_120U40
VSS_121T40
VSS_122R40
VSS_123K40
VSS_124H40
VSS_125BL39
VSS_126BG39
VSS_127BA39
VSS_128E39
VSS_129C39
VSS_130A39
VSS_131BD38
VSS_132AU38
VSS_133H38
VSS_134BG37
VSS_135AU37
VSS_136M37
VSS_137E37
VSS_138BD36
VSS_139AW36
VSS_140H36
VSS_141BL35
VSS_142BG35
VSS_143AY35
VSS_144AU35
VSS_145AL35
VSS_146AG35
VSS_147AE35
VSS_148AA35
VSS_149Y35
VSS_150M35
VSS_151E35
VSS_152A35
VSS_153BD34
VSS_154AU34
VSS_155AN34
VSS_156H34
VSS_157BL33
VSS_158BG33
VSS_159AY33
VSS_160E33
VSS_161BD32
VSS_162AU32
VSS_163AN32
VSS_164AG32
VSS_165AC32
VSS_166Y32
VSS_88AF44
VSS_89AD44
VSS_90K44
VSS_91H44
VSS_92BL43
VSS_93BG43
VSS_94AY43
VSS_95AR43
VSS_96W43
VSS_99E43
VSS_168B32
VSS_170BG31
VSS_172AN31
VSS_18E53
VSS_175N30
VSS_177AN29
VSS_179M29
VSS_181AW28
VSS_167H32
VSS_169BJ31
VSS_171AY31
VSS_174E31
VSS_176H30
VSS_178AJ29
VSS_180A29
VSS_98M43
VSS_183AD28
VSS_184AC28
VSS_185Y28
VSS_186W28
VSS_187H28
VSS_188F28
VSS_189AN27
VSS_190AJ27
VSS_191M27
VSS_192BF26
VSS_193BD26
VSS_194N26
VSS_173M31
VSS_195H26
VSS_196BJ25
VSS_197AY25
VSS_198AU25
VSS
VSS NCTF
VSS SCB
U4J
CANTIGA GMCH SFF_FCBGA1363
VSS_199AN25
VSS_200AG25
VSS_201AE25
VSS_202AA25
VSS_203Y25
VSS_204E25
VSS_205A25
VSS_206BD24
VSS_207AN24
VSS_208AL24
VSS_210BG23
VSS_212E23
VSS_213BD22
VSS_214BB22
VSS_215AN22
VSS_216Y22
VSS_217W22
VSS_218H22
VSS_220BG21
VSS_221AY21
VSS_222AN21
VSS_223AG21
VSS_224AE21
VSS_225M21
VSS_226E21
VSS_227A21
VSS_230BG19
VSS_231AY19
VSS_232M19
VSS_233E19
VSS_234BD18
VSS_235N18
VSS_236H18
VSS_237BL17
VSS_238BG17
VSS_239AY17
VSS_240M17
VSS_241E17
VSS_243BD16
VSS_244AN16
VSS_245AG16
VSS_246AE16
VSS_247Y16
VSS_248W16
VSS_249N16
VSS_250H16
VSS_251BG15
VSS_252AY15
VSS_261BL13
VSS_260H14
VSS_259BD14
VSS_258E15
VSS_257M15
VSS_256R15
VSS_255AC15
VSS_253AN15
VSS_254AD15
VSS_219BL21
VSS_NCTF_1AJ38
VSS_NCTF_2AH38
VSS_NCTF_3AD38
VSS_NCTF_4AC38
VSS_NCTF_5T35
VSS_NCTF_6R35
VSS_NCTF_7AT32
VSS_NCTF_8AR32
VSS_NCTF_9U32
VSS_NCTF_10R32
VSS_NCTF_11T28
VSS_NCTF_12R28
VSS_NCTF_13AT25
VSS_NCTF_14AR25
VSS_NCTF_15T24
VSS_SCB_1BL55
VSS_SCB_2BL1
VSS_SCB_3A55
VSS_SCB_4D1
VSS_SCB_5B55
VSS_SCB_6B2
VSS_347AU43
VSS_348BB42
VSS_349AW38
VSS_350BA35
VSS_351L29
VSS_352N28
VSS_353N22
VSS_354N20
VSS_355N14
VSS_262BG13
VSS_263AY13
VSS_264AU13
VSS_209H24
VSS_211AY23
VSS_242A17
VSS_265AR13
VSS_266AJ13
VSS_267AC13
VSS_268AA13
VSS_269W13
VSS_270U13
VSS_NCTF_16R24
VSS_NCTF_17AN19
VSS_NCTF_18AJ19
VSS_NCTF_19AA19
VSS_NCTF_20Y19
VSS_NCTF_21T19
VSS_NCTF_22R19
VSS_NCTF_23AN18
VSS_333C5
VSS_334BH4
VSS_335BE3
VSS_336U3
VSS_337E3
VSS_338BC1
VSS_339AW1
VSS_340AR1
VSS_341AL1
VSS_342AG1
VSS_343AC1
VSS_344W1
VSS_345N1
VSS_346J1
VSS_359N42
VSS_360N40
VSS_361N38
VSS_362M39
VSS_228BD20
VSS_229H20
VSS_SCB_7A4
VSS_271M13
VSS_272E13
VSS_273A13
VSS_274BD12
VSS_275AV12
VSS_276AP12
VSS_277AM12
VSS_278AK12
VSS_279AB12
VSS_280V12
VSS_281P12
VSS_282H12
VSS_283BG11
VSS_284AG11
VSS_285E11
VSS_286BD10
VSS_287AY10
VSS_288AP10
VSS_289H10
VSS_290BL9
VSS_291BG9
VSS_292E9
VSS_293A9
VSS_294BD8
VSS_295BB8
VSS_296AY8
VSS_297AV8
VSS_298AT8
VSS_299AP8
VSS_300AM8
VSS_301AK8
VSS_326AA5
VSS_327W5
VSS_328U5
VSS_329N5
VSS_330L5
VSS_331J5
VSS_332G5
VSS_302AH8
VSS_303AF8
VSS_304AD8
VSS_305AB8
VSS_306Y8
VSS_307V8
VSS_308P8
VSS_309M8
VSS_310K8
VSS_311H8
VSS_312BJ7
VSS_313E7
VSS_314BF6
VSS_315BC5
VSS_316BA5
VSS_317AW5
VSS_318AU5
VSS_319AR5
VSS_320AN5
VSS_321AL5
VSS_322AJ5
VSS_323AG5
VSS_324AE5
VSS_325AC5
VSS_356AL13
VSS_357B10
VSS_358AN13
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D32
DDR_A_D7
DDR_A_D34DDR_A_D35
DDR_A_D47
DDR_A_D36DDR_A_D37
DDR_A_D44
V_DDR_MCH_REF
DDR_A_D8
DDR_A_MA2
DDR_A_D40
DDR_A_MA0
DDR_A_D41
DDR_A_D10
DDR_A_D25
DDR_A_MA1
DDR_A_D42
DDR_A_D11
DDR_A_MA3
DDR_A_D43
DDR_A_MA4DDR_A_MA5
DDR_A_D24
DDR_A_D45
DDR_A_MA6
DDR_A_D46
DDR_A_MA8
DDR_A_MA7
DDR_A_D12
DDR_A_D30
DDR_A_MA9
DDR_A_MA10
DDR_A_D13
DDR_A_MA11
M_CLK_DDR0
DDR_A_MA12
M_CLK_DDR#0
DDR_A_MA13
M_CLK_DDR1
DDR_A_MA14
M_CLK_DDR#1
DDR_A_D9
DDR_CKE0_DIMMA DDR_CKE1_DIMMA
DDR_A_DM0
DDR_A_CAS#
DDR_A_D17
DDR_A_DM1
DDR_A_RAS#
DDR_A_D18
DDR_A_DM2
DDR_A_WE#
DDR_A_D19
DDR_A_DM3
DDR_A_D14
DDR_A_DM4
DDR_A_DM5
DDR_A_D21
DDR_A_DM6
DDR_A_D39
DDR_A_D16
DDR_A_DM7
DDR_A_D23
DDR_A_D15
DDR_A_D49
DDR_A_D33
DDR_A_D50
DDR_A_DQS0
DDR_A_D51
DDR_A_DQS1 SM_DRAMRST#
DDR_A_D52
DDR_A_DQS2
DDR_A_D20
DDR_A_D53
DDR_A_DQS3
DDR_A_D38
DDR_A_DQS4
DDR_A_D55
DDR_A_DQS5
DDR_A_D56
DDR_A_DQS6
DDR_A_D57
DDR_A_D22
DDR_A_DQS7
DDR_A_D58
MEM_SDATA
DDR_A_D59
MEM_SCLK
DDR_A_D26
DDR_A_DQS#0
DDR_A_D60
M_ODT0
DDR_A_D27
DDR_A_DQS#1
DDR_A_D61
M_ODT1
DDR_A_D48
DDR_A_D28
DDR_A_DQS#2
DDR_A_D62
DDR_A_D29
DDR_A_DQS#3
DDR_A_D63
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_D31
DDR_A_D0
DDR_A_D54
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_D1
DDR_A_BS0
DDR_A_D2
DDR_A_BS1
DDR_A_D3
DDR_A_BS2
DDR_A_D4
DDR_CS0_DIMMA#
DDR_A_D5
DDR_CS1_DIMMA#
DDR_A_D6
PM_EXTTS#0
DDR_A_DQS#[0..7]<9>
DDR_A_DQS[0..7]<9>
DDR_A_D[0..63]<9>
DDR_A_DM[0..7]<9>
DDR_A_MA[0..14]<9>
DDR_CKE1_DIMMA <8>
DDR_A_BS1 <9>DDR_A_RAS# <9>
DDR_CS0_DIMMA# <8>M_ODT0 <8>
DDR_CKE0_DIMMA<8>
DDR_A_BS2<9>
DDR_A_BS0<9>
DDR_A_WE#<9>DDR_A_CAS#<9>
DDR_CS1_DIMMA#<8>
M_CLK_DDR1 <8>M_CLK_DDR#1 <8>
M_ODT1 <8>
M_CLK_DDR0<8>M_CLK_DDR#0<8>
ICH_SMBCLK <4,15,21,25>ICH_SMBDATA <4,15,21,25>
SM_DRAMRST# <8>
PM_EXTTS#0 <8>
V_DDR_MCH_REF<8>
+0.75VS
+1.5V
+3VS
+0.75VS
+0.75VS
+1.5V
+1.5V +1.5V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
DDRIII-SODIMM SLOT
14 47Saturday, July 18, 2009
2006/02/13 2006/03/10Compal Electronics, Inc.
Layout Note:Place near JP3 203,204
Layout Note:Place near JP3
05/22 RF request Add x4 10P cap
06/19 Remove them on PV memo
C1
08
9
0.1
U_
04
02
_1
6V
4Z
~D
1
2
C1
67
0.1
U_
04
02
_1
6V
4Z
1
2
C1
15
3
10
U_
06
03
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.3V
6M
~D
@
1
2
C1
11
5
10
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06
03
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6M
~D
1
2
C1
12
31
U_
06
03
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4Z
~D
@
1
2
C1
01
81
0P
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40
2_
25
V8
J
C1
83
2.2
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06
03
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6K
~D
1
2
JP3
FOX_AS0A626-U4RN-7F
CONN@
VREF_DQ1
VSS12
VSS23
DQ44
DQ05
DQ56
DQ17
VSS38
VSS49
DQS#010
DM011
DQS012
VSS513
VSS614
DQ215
DQ616
DQ317
DQ718
VSS719
VSS820
DQ821
DQ1222
DQ923
DQ1324
VSS925
VSS1026
DQS#127
DM128
DQS129
RESET#30
VSS1131
VSS1232
DQ1033
DQ1434
DQ1135
DQ1536
VSS1337
VSS1438
DQ1639
DQ2040
DQ1741
DQ2142
VSS1543
VSS1644
DQS#245
DM246
DQS247
VSS1748
VSS1849
DQ2250
DQ1851
DQ2352
DQ1953
VSS1954
VSS2055
DQ2856
DQ2457
DQ2958
DQ2559
VSS2160
VSS2261
DQS#362
DM363
DQS364
VSS2365
VSS2466
DQ2667
DQ3068
DQ2769
DQ3170
VSS2571
VSS2672
A12/BC#83
A1184
A985
A786
VDD587
VDD688
A889
A690
CKE073
CKE174
VDD175
VDD276
NC177
A1578
BA279
A1480
VDD381
VDD482
A591
A492
VDD793
VDD894
A395
A296
A197
A098
VDD999
VDD10100
CK0101
CK1102
CK0#103
CK1#104
VDD11105
VDD12106
A10/AP107
BA1108
BA0109
RAS#110
VDD13111
VDD14112
WE#113
S0#114
CAS#115
ODT0116
VDD15117
VDD16118
A13119
ODT1120
S1#121
NC2122
VDD17123
VDD18124
NCTEST125
VREF_CA126
VSS27127
VSS28128
DQ32129
DQ36130
DQ33131
DQ37132
VSS29133
VSS30134
DQS#4135
DM4136
DQS4137
VSS31138
VSS32139
DQ38140
DQ34141
DQ39142
DQ35143
VSS33144
VSS34145
DQ44146
DQ40147
DQ45148
DQ41149
VSS35150
VSS36151
DQS#5152
DM5153
DQS5154
VSS37155
VSS38156
DQ42157
DQ46158
DQ43159
DQ47160
VSS39161
VSS40162
DQ48163
DQ52164
DQ49165
DQ53166
VSS41167
VSS42168
DQS#6169
DM6170
DQS6171
VSS43172
VSS44173
DQ54174
DQ50175
DQ55176
DQ51177
VSS45178
VSS46179
DQ60180
DQ56181
DQ61182
DQ57183
VSS47184
VSS48185
DQS#7186
DM7187
DQS7188
VSS49189
VSS50190
DQ58191
DQ62192
DQ59193
DQ63194
VSS51195
VSS52196
SA0197
EVENT#198
VDDSPD199
SDA200
SA1201
SCL202
VTT1203
VTT2204
G1205
G2206
C1
12
01
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06
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@
1
2
C1
11
6
10
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1
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C1
84
0.1
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04
02
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4Z
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1
2
C1
12
21
U_
06
03
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4Z
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@
1
2
C1
58
2.2
U_
06
03
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6K
~D
1
2
C1
11
4
10
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06
03
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1
2
C1
02
01
0P
_0
40
2_
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V8
J
R129 10K_0402_5%~D
1 2
C1
11
7
10
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06
03
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6M
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1
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C1
08
8
2.2
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06
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1
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C1
01
71
0P
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40
2_
25
V8
J
C1
15
4
10
U_
06
03
_6
.3V
6M
~D
1
2
C1
68
0.1
U_
04
02
_1
6V
4Z
1
2
C1
15
5
10
U_
06
03
_6
.3V
6M
~D
@
1
2
+
C1
11
93
30
U_
D2
_2
.5V
Y_
R1
5M
1
2
R128 10K_0402_5%~D 1 2
C1
12
11
U_
06
03
_1
0V
4Z
~D
@
1
2
C1
66
0.1
U_
04
02
_1
6V
4Z
1
2
TP161 PAD
@
C1
11
3
10
U_
06
03
_6
.3V
6M
~D
1
2
C1
59
0.1
U_
04
02
_1
6V
4Z
~D
1
2
C1
69
0.1
U_
04
02
_1
6V
4Z
1
2
C1
01
91
0P
_0
40
2_
25
V8
J
C1
11
8
10
U_
06
03
_6
.3V
6M
~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FSC
FSB
FSA
FSC
27_SEL
CLK_48M_ICH
CLK_14M_ICH
CLK_XTAL_IN
CLK_XTAL_OUT
CLK_XTAL_IN
CLK_XTAL_OUT
FSB
27_SELITP_EN
ITP_EN
CLK_14M_KBC
CLK_48M_ICH
CLK_14M_ICH
CLK_PCI_ICH
CLK_14M_KBC
CLK_PCI_EC
CLK_PCI_DB
CLK_PCI_DB
CLK_PCI_ICH
CLKREQ#_B
CLKREQ#_B
CLKREQ_WLAN#CLKSATAREQ#
CLKSATAREQ#
CLK_PCI_EC PCI_CLK3CLKREQ_WLAN#
CLK_PCIE_ICHCLK_PCIE_ICH#
CLK_PCIE_LAN_REQ#
FSA
CLK_PCI_DEBUG
PCI2_TME
PCI2_TME
CR#6
CR#11
CPU_BSEL0<5>
MCH_CLKSEL0 <8>
CLK_14M_ICH<21>
CLK_48M_ICH<21>
CLK_14M_KBC<32>
CPU_BSEL2<5>
MCH_CLKSEL2 <8>
CPU_BSEL1<5>
CLK_PCI_DB<31>
CLK_PCI_ICH<19>
CLKREQ#_B <8>
H_STP_PCI# <21>H_STP_CPU# <21>
ICH_SMBCLK <4,14,21,25>
CLK_CPU_BCLK# <4>CLK_CPU_BCLK <4>
CLK_MCH_BCLK# <8>CLK_MCH_BCLK <8>
ICH_SMBDATA <4,14,21,25>
CLK_PCIE_SATA <20>CLK_PCIE_SATA# <20>
CK_PWRGD <21>
CLK_MCH_3GPLL <8>CLK_MCH_3GPLL# <8>
CLKREQ_WLAN# <25>CLKSATAREQ# <21>
CLK_PCI_EC<32>
CLK_PCIE_MCARD# <25>CLK_PCIE_MCARD <25>
MCH_SSCDREFCLK <8>MCH_SSCDREFCLK# <8>
CLK_MCH_DREFCLK <8>CLK_MCH_DREFCLK# <8>
CLK_PCIE_ICH <21>CLK_PCIE_ICH# <21>
MCH_CLKSEL1 <8>
CLK_PCI_DEBUG<25>
CLK_PCIE_LAN# <23>CLK_PCIE_LAN <23>
CLK_PCIE_LAN_REQ# <23>
+3VS
+3VS_CK505
+3VS +3VS_CK505
+3VS
+3VS
+3VS
+3VS
+VCCP
+VCCP
+VCCP
+3VS
+3VS
+3VS
+3VS_CK505
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
CLOCK GENERATOR
15 47Saturday, July 18, 2009
2006/02/13 2006/03/10Compal Electronics, Inc.
1
1000
CLKSEL1
100
1
PCIMHz
200
0
SRCMHz
33.3
CPUMHzCLKSEL2
33.30
FSLACLKSEL0
166
FSLC
1
FSLB
Place close to U5
0 1000 2660 33.3
FSBMHz
1066
800
667
400mA
100mil
01/05 Reserved for WWAN
01/08 33 ohm-->22ohm
4/29 C185 @->18P
05/08 Update Y3 footprint
05/12 Del XDP signal then fine tune CLK_CPU_BCLK CLK_CPU_BCLK#
05/22 33 Del reserved 48MHZ_Clock
07/08 Reserved for low power clock gen
R9722_0402_1% 1 2
R91 10K_0402_5%12
R103
10K_0201_5%
@
12
C7
78
0.1
U_
04
02
_1
6V
4Z
1
2
R80 10K_0402_5%1 2
C1
94
0.1
U_
04
02
_1
6V
4Z
1
2
C1
90
0.1
U_
04
02
_1
6V
4Z
1
2
Y3
14.318MHZ_20P_ L8420-14.31818-2012
R83 10K_0402_5%1 2
R92
1K_0402_5%
1 2
R8822_0402_1% 1 2
C18612P_0402_50V8J
1 2
C1
95
0.1
U_
04
02
_1
6V
4Z
1
2
R102
10K_0402_5%
12
C1
91
0.1
U_
04
02
_1
6V
4Z
1
2
R86 0_0402_5%1 2
R99
10K_0201_5%
@
12
C1
89
10
U_
08
05
_1
0V
4Z
1
2
C18812P_0402_50V8J
1 2
C2
00
0.1
U_
04
02
_1
6V
4Z
1
2
R85022_0402_1% 1 2
R9433_0402_1%
1 2
R894 10K_0402_5%1 2
C96347P_0402_50V8C@
12
R93 0_0402_5%1 2
C7
79
0.1
U_
04
02
_1
6V
4Z
1
2
R98
10K_0402_5%
12
R9622_0402_1% 1 2
C1
93
0.1
U_
04
02
_1
6V
4Z
1
2
R82
1K_0402_5%
1 2
C1874.7P_0402_50V8C@
12
R95
0_0402_5%
12
C18518P_0402_50V8C
12
R101
10K_0201_5%
@
12
C20533P_0402_50V8J
1
2
C7
77
10
U_
08
05
_1
0V
4Z
1
2
R84 0_0402_5%1 2
R8733_0402_1%
1 2
C2024.7P_0402_50V8C@
12
R85
1K_0402_5%
1 2
U5
SLG8SP553VTR QFN 72P
X15
X24
USB_48MHz/FSLA20
GND30
VDDPLL327
PCI2/TME14
FSLB/TEST_MODE2
VDDSRC_IO52
SDATA9
GND4822
VDD4819
PCI315
SRCC4_LPR40
SRCT9_LPR44
PCI_STOP#54
GNDSRC34
GNDCPU69
SRCC9_LPR45
SRCC11_LPR47
SRCC7_LPR60
SRCT7_LPR61
SRCT6_LPR57
CPUT0_LPR_F71
PCI13
PCI4/27_Select16
VDDSRC_IO38
VDDPLL3_IO31
VDD96_IO23
VDDPCI12
GNDSRC59
GND26
SCLK10
NC11
GNDPCI18
CPU_STOP#53
PCI_F5/ITP_EN17
SRCT11_LPR48
CPUC1_LPR_F67
SRCT10_LPR50
SRCC10_LPR51
FSLC/TEST_SEL/REF07
CPUC0_LPR_F70
CPUT1_LPR_F68
VDDREF6
GNDREF3
VDDSRC_IO62
SRCC6_LPR56
VDDCPU_IO66
SRCC3_LPR36
CR#441
CR#1146
CR#943
VDDCPU72
GNDSRC42
CR#337
CR#A21
CR#658
CR10#49
SRCT4_LPR39
SRCT3_LPR35
VDDSRC55
REF18
CR7#65
CPUT2_ITP_LPR/SRCT8_LPR64
CPUC2_ITP_LPR/SRCC8_LPR63
SRCT2_LPR/SATAT_LPR32
SRCC2_LPR/SATAC_LPR33
SRCT0_LPR/DOTT_96_LPR24
SRCC0_LPR/DOTC_96_LPR25
27MHz_NonSS/SRCT1_LPR/SE128
27MHz_SS/SRCC1_LPR/SE229
CK_PWRGD/PD#1
C2035P_0402_50V8C@
12
R100
10K_0402_5%
12
C20433P_0402_50V8J
1
2
R81 2.2K_0402_5%
12
C1
99
10
U_
08
05
_1
0V
4Z
1
2
C1
92
0.1
U_
04
02
_1
6V
4Z
1
2
R79 10K_0402_5%1 2
C2
01
0.1
U_
04
02
_1
6V
4Z
1
2
R895 10K_0402_5%1 2R9033_0402_1%
1 2
R78
0_0805_5%12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
D PD_C_AUXR
DPD_C_AUXR#
DP_DATA3R_P
DP_DATA3R_N
DP_DATA3_P
DP_DATA3_N
DP_DATA2R_P
DP_DATA2R_N
DP_DATA1R_P
DP_DATA1R_N
DP_DATA1_P
DP_DATA0R_P
DP_DATA0R_N
DP_DATA0R_P
DP_DC AD
DP_DATA2R_NDP_DATA3R_P
DP_DATA0_N
DP_DATA1_N
DP_DATA1R_N
DP_DATA3R_N
DP_DATA0_P
DP_ HPD
DP D_C_AUXR_R
DP_DATA2_P
DP_DATA0R_N
DP_DATA2R_P
DP_DATA2_N
DP_DATA1R_P
D PD_C_AUXR#_R
DP _EN DDC1_ EN
DP_DC AD
DP_ HPD
DP B_HPD
D PD_C_AUXR#_R
DP D_C_AUXR_R
DP_DATA0_P<10>
DP_DATA0_N<10>
DP_DATA1_P<10>
DP_DATA1_N<10>
DP_DATA2_P<10>
DP_DATA2_N<10>
DP_DATA3_P<10>
DP_DATA3_N<10>
DPD_C_AUXR<10>
DPD_C_AUXR#<10>
DDC1_EN <10>
DP B_HPD <10>
DP _EN <10>
+3VS_DP
+5VS+5VS+3VS
+3VS_DP
+3VS
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA -5221P 1.0
Display Port Connector
16 47Fr iday, July 17, 2009
2008/09/15 2009/12/31Compal Electronics, Inc.
03/23 Update JDP1 to Dip conn
03/28 Q2B Drain and source are invrted
04/29 R115 5.1M->1M
4/29 Q3A on page18
07/16 Remove R980
05/12 Reserved R989 R990
R120
20K_0402_1%
12
L6
WCM-2012-900T_4P
@1
1
44
33
22
R111
10K_0402_5%
12
R1151M_0402_5%
12
Q2B
2N7002DW-7-F_SOT363-6
3
5
4
L4
WCM-2012-900T_4P
@1
1
44
33
22
R1180_0402_5%1 2
R1140_0402_5%1 2
C7
65
0.1
U_
04
02
_1
6V
4Z
1
2
R1190_0402_5%1 2
R1060_0402_5%1 2
R1090_0402_5%1 2
R1040_0402_5%1 2
F2
NANOSMDC050F 0.5A 13.2V POLY-FUSE
21
R110
10K_0402_5%
12
R1210_0402_5%1 2
R1070_0402_5%1 2
R123100K_0402_1%
12
Q3BTR 2N7002DW-7-F 2N SOT-363
3
5
4
R989100K_0402_5%@
12
R1161M_0402_5%
12
R1120_0402_5%1 2
L7
WCM-2012-900T_4P
@1
1
44
33
22
Q2A
2N7002DW-7-F_SOT363-6
61
2
R1050_0402_5%1 2
R990
100K_0402_5%
@
12
L5
WCM-2012-900T_4P
@1
1
44
33
22
R122
7.5K_0402_1%
12
JDP1
MOLEX_105062-0001_20P-T
C ONN@
GND24
GND23
GND22
GND21
DP_PWR20
RTN19
HP_DET18
AUX_CH-17
GND16
AUX_CH+15
GND14
CA_DET13
LANE3-12
LANE3_shield11
LANE3+10
LANE2-9
LANE2_shield8
LANE2+7
LANE1-6
LANE1_shield5
LANE1+4
LANE0-3
LANE0_shield2
LANE0+1
C7
66
10
U_
08
05
_1
0V
4Z
1
2
L3
WCM-2012-900T_4P
@1
1
44
33
22
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB20_P10USB20_N10
USB20_N10
USB20_P10
DISPLAY_ON
BLON_PWM_R
ENAVDD<10>
WEBCAM_ON/OFF#<21>
ENABLT<10>
LID_SW#<21,29,32>
TXOUT_L0- <10>TXOUT_L0+ <10>
TXOUT_L1- <10>TXOUT_L1+ <10>
TXOUT_L2- <10>TXOUT_L2+ <10>
TXCLK_L- <10>TXCLK_L+ <10>
DDC2_DATA <10>DDC2_CLK <10>USB20_P10<21>
USB20_N10<21>
BLON_PWM<10>
LCDVDDLCDVDD +3VS
+5VALW +5V_WEBCAM
+3VALW
+5VALW
+3VS
+3VS
B+
B+_LCD
LCDVDD
+5V_WEBCAM
+3VS
+3VALW
+5V_WEBCAM
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
LCD CONN & Q-Switch & GPIO Ext.
17 47Saturday, July 18, 2009
2005/03/10 2006/03/10Compal Electronics, Inc.
LCD POWER CIRCUIT
Connect LCD power source to+3VS directly. 5/16
LED/PANEL BD. CONN.
12/29 ESD requestNear JP5
G
D S
Q6SI2301 1P_SOT23
2
1 3
R849100K_0402_1%
12
C7670.1U_0402_16V4Z
1
2
R168 47K_0402_5%1 2
C9
58
5P
_0
40
2_
50
V8
C
@
1
2
C2
20
0.1
U_
04
02
_1
6V
4Z
1
2
C9
55
5P
_0
40
2_
50
V8
C
@
1
2
Q8DTC124EKAT146_SC59-3
IN2
OU
T1
GN
D3
C9
59
5P
_0
40
2_
50
V8
C
@
1
2
R99633_0402_5%
1 2
D54
CH751H-40_SC76
21
JP5
ACES_88242-3001_30PCONN@
13579
11131517192123252729
24681012141618202224262830
3132
Q41A2N7002DW-7-F_SOT363-6
61
2
R126
10K_0402_5%
12
C2
21
4.7
U_
08
05
_1
0V
4Z
1
2
C2
19
0.0
1U
_0
40
2_
16
V7
K
1
2
R1
24
2.2
K_
04
02
_5
%1
2
C9
54
5P
_0
40
2_
50
V8
C
@
1
2
Q41B
2N7002DW-7-F_SOT363-6
3
5
4
R169100K_0402_1%
12
D53
CH751H-40_SC76
21
C7684.7U_0805_10V4Z
1
2
R60110K_0402_5%
12
C7704.7U_0805_10V4Z@
1
2 R1
64
10
0K
_0
40
2_
5%
12
L8
LQM21FN4R7N00L_08051 2
D32
CM1293A-02SR_SOT143-4
GND1
IO12
IO23
VIN4
R1
25
2.2
K_
04
02
_5
%1
2
C9
56
5P
_0
40
2_
50
V8
C
@
1
2
C9
60
5P
_0
40
2_
50
V8
C
@
1
2
C5620.1U_0402_16V4Z
1
2
R63410K_0402_5%
12
R166100_0402_1%
12
C769 0.1U_0402_16V4Z1 2
C209 68P_0402_50V8J
12
C9
57
5P
_0
40
2_
50
V8
C
@
1
2
C9
61
5P
_0
40
2_
50
V8
C
@
1
2
C2
18
1U
_0
60
3_
10
V4
Z
1
2
C208 0.1U_0603_50V12
R602 47K_0402_5% 1 2
G
DS
Q5SI2301BDS_SOT23
2
13
R167 1M_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BT_LED
WL_LED
BT_LED
WL_LED
WL_LED
IDE_LED#
WL_BLUE_BTNWL/BT_LED#
APP_BUTTON_1APP_BUTTON_1_LED#
APP_BUTTON_2APP_BUTTON_2_LED#
APP_BUTTON_2
APP_BUTTON_2_LED#
APP_BUTTON_1
APP_BUTTON_1_LED#
WL/BT_LED#
WL_LED#WW_LED#
HDD_HALTLED#
HDD_HALTLED
BT_LED<30>
WL_LED# <25>
WW_LED#<25>
IDE_LED#<20>
HDD_HALTLED<21>
APP_BUTTON_2 <32>
APP_BUTTON_1 <32>
WL_BLUE_BTN <32>
CAPS_LOCK_KBC<32>
CAPS_LED#<29>
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
LEDS & LID
Custom
18 47Saturday, July 18, 2009
2006/02/13 2006/03/10Compal Electronics, Inc.
whiteAMBER
HDD active LED
To LED small board
5/16 Q91A on page 34
5/8 Add R982 R983 and uninstall Q9 and Q79
5/8 Add R982 R983 and uninstall Q9 and Q79
5/11 Remane WL/BT_LED->WL/BT_LED#
5/11 Remane WL/BT_LED->WL/BT_LED#
05/16 EMI request Add C1007 0.1u cap
5/16 Fine tune HD LED comtrol schDel Q32 Q18Add reserved Q98 Add R991
Q91BTR 2N7002DW-7-F 2N SOT-363
3
5
4
R880
470_0402_5%
12
R991
0_0402_5%
12
R171 100K_0402_5%
1 2
Q94BTR 2N7002DW-7-F 2N SOT-363
3
5
4
C9641U_0402_6.3V6K
1
2
C9670.22U_0402_10V4Z
1
2
C9680.22U_0402_10V4Z
1
2
G
D
S
Q972N7002_SOT23-3 @
2
13
JP6
ACES_85201-1005N CONN@
11
22
33
44
55
66
77
88
99
1010
GND11
GND12
Q94A
TR 2N7002DW-7-F 2N SOT-363
61
2
R982 0_0402_5%1 2
10K
47K
Q9
DTA114YKAT146_SOT23-3
@
2
13
R993
10K_0402_5%@
12
Q93BTR 2N7002DW-7-F 2N SOT-363
3
5
4
R852255_0402_1%
12
Q10BTR 2N7002DW-7-F 2N SOT-363
3
5
4
R853255_0402_1%
12
Q93A
TR 2N7002DW-7-F 2N SOT-363
61
2
R983 0_0402_5%1 2
D46
CH751H-40_SC76
2 1
Q3A
TR 2N7002DW-7-F 2N SOT-363
61
2
10K
47K
Q79DTA114YKAT146_SOT23-3@
2
13
R879
1M_0402_5%
12
R878
1M_0402_5%
12
R170 100K_0402_5%
1 2
C1007
0.1U_0402_16V4Z
1
2
WHITE
YELLOW
D5
HT-297UY5/BP5_YELLOW-WHITE
21
43
C9651U_0402_6.3V6K
1
2
R881
470_0402_5%
12
R334
1K_0402_5%1
2
D45
CH751H-40_SC76
2 1
Q10ATR 2N7002DW-7-F 2N SOT-363
61
2
R570
47K_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_ICH
PCI_GNT3#
PLT_RST#CLK_PCI_ICH
PCI_SERR#
PCI_REQ3#
PCI_REQ1#
PCI_REQ2#
PCI_FRAME#PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_IRDY#
PCI_PERR#PCI_PLOCK#
PCI_GNT0#
PCI_RST#
PCI_REQ0#
PCI_PIRQE#
PCI_PIRQH#
PCI_REQ2#
PCI_REQ3#
PCI_PIRQD#
PCI_DEVSEL#
PCI_TRDY#
PCI_FRAME#
PCI_STOP#
PCI_PLOCK#
PCI_IRDY#
PCI_PERR#
PCI_SERR#
PCI_PIRQB#
PCI_REQ0#
PCI_PIRQF#
PCI_GNT0#
PCI_PIRQF#PCI_PIRQE#
PCI_PIRQH#
PCI_PIRQA#PCI_PIRQB#
PCI_PIRQD#PCI_PIRQC#
PCI_GNT3#
PCI_PIRQG#
PCI_REQ1#
PCI_PIRQA#
PCI_PIRQG#
PCI_PIRQC#
CLK_PCI_ICH <15>PLT_RST# <8,23,25,27,31>
PCI_RST# <25>
KBC_SPI_CS1#<21>
ACCEL_INT# <25>
PCI_SERR# <31,32>
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
ICH9(1/4)-PCI/INT
19 47Saturday, July 18, 2009
2006/02/13 2006/03/10Compal Electronics, Inc.
0
1
1
Boot BIOS Location
PCI
PCI_GNT0# SPI_CS#1
0
1
Boot BIOS Strap
*
LPC
SPI
Place closely pin B10A16 swap override Strap
PCI_GNT3#Low= A16 swap override EnbleHigh= Default *
1
DEL J3. 9/29
R190 0_0402_5%
12
R1951K_0402_5%
12
R179 8.2K_0402_5%
1 2
R178 8.2K_0402_5%
1 2
R180 8.2K_0402_5%
1 2
R173 8.2K_0402_5%
1 2
R189 8.2K_0402_5%
1 2
R181 8.2K_0402_5%
1 2
R191 8.2K_0402_5%
1 2
R176 8.2K_0402_5%
1 2
R185 8.2K_0402_5%
1 2
R187 8.2K_0402_5%
12
R183 8.2K_0402_5%
1 2
R182 8.2K_0402_5%
1 2
R186 8.2K_0402_5%
1 2
R1961K_0402_5%@
12
R177 8.2K_0402_5%
1 2
R184 8.2K_0402_5%
1 2
R192 8.2K_0402_5%
1 2
R19310_0402_5%
@
12
PCI
Interrupt I/F
U8B
ICH9-M SFF ES_FCBGA569
AD0A11
AD1B12
AD2A10
AD3C12
AD4A8
AD5A12
AD6E10
AD7C11
AD8B9
AD9D8
AD10A4
AD11E8
AD12A3
AD13D9
AD14C8
AD15C2
AD16D7
AD17B3
AD18D11
AD19B6
AD20D5
AD21D3
AD22F4
AD23E3
AD24E4
AD25B2
AD26C4
AD27C1
AD28D1
AD29E2
AD30J4
AD31H2
REQ0#G4
GNT0#E1
REQ1#/GPIO50A9
GNT1#/GPIO51E12
REQ2#/GPIO52B11
GNT2#/GPIO53C10
REQ3#/GPIO54D6
GNT3#/GPIO55C6
C/BE0#D10
C/BE1#A5
C/BE2#E6
C/BE3#C9
IRDY#C3
PARB1
PCIRST#T3
DEVSEL#A7
PERR#D4
PLOCK#C5
SERR#H5
STOP#A6
TRDY#A2
FRAME#B8
PLTRST#A21
PCICLKB5
PME#T1
PIRQA#F1
PIRQB#F5
PIRQC#F2
PIRQD#C7
PIRQH#/GPIO5H4
PIRQG#/GPIO4F3
PIRQF#/GPIO3G1
PIRQE#/GPIO2G3
R175 8.2K_0402_5%
1 2
R172 8.2K_0402_5%
1 2
C1968.2P_0402_50V
@1
2
R1941K_0402_5% @
12
R188 8.2K_0402_5%
1 2
R174 8.2K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
KB_RST#GATEA20
SATA_TXP0_CR
AC97_SDOUT
SM_INTRUDER#
ICH_SRTCRST#
ICH_INTVRMEN
RTC1
ICH_RTCX2
HDA_BITCLK
H_FERR#
ICH_RTCX2
ICH_RTCRST#
CLK_PCIE_SATA#
SM_INTRUDER#
GATEA20
LPC_AD3
ICH_RTCX1
CLK_PCIE_SATA
KB_RST#
H_STPCLK#HDA_SYNC
LPC_AD0
H_FERR#_R
LPC_AD1
ICH_SRTCRST#
H_DPRSTP_R#
H_SMI#
HDARST#THRMTRIP_ICH#
ICH_INTVRMEN
ICH_RTCX1
LPC_AD2
AC97_SDOUT
RTC2
HDA_SDIN0
HDA_BITCLK_CODEC
HDA_SDOUT_CODEC
SATA_TXN0_CR
SATA_RXP0_CSATA_RXP0SATA_RXN0_C
SATA_TXN0_CRSATA_TXP0_CRSATA_TXP0_C
SATA_TXN0_C
SATA_RXN0
SATA_RXN0_CSATA_RXP0_C
GLAN_COMP
HDA_SDIN2
H_DPSLP# <5>H_DPRSTP# <5,8,42>
H_FERR# <4>
H_PWRGOOD <4,5>
H_IGNNE# <4>
H_INIT# <4>
H_NMI <4>H_SMI# <4>
H_STPCLK# <4>
H_THERMTRIP# <4,8>
LPC_AD[0..3] <31,32>
LPC_FRAME# <31,32>
H_A20M# <4>GATEA20 <32>
H_INTR <4>KB_RST# <32>
HDA_SYNC_CODEC<27>
HDA_RST#_CODEC<27>
HDA_BITCLK_CODEC<27>
HDA_SDOUT_CODEC<27>
IDE_LED#<18>
CLK_PCIE_SATA# <15>CLK_PCIE_SATA <15>
HDA_BITCLK_NB<8>
HDA_SYNC_NB<8>
HDA_RST#_NB<8>
HDA_SDIN2<8>
HDA_SDIN0<27>
HDA_SDOUT_NB<8>
+3VS
+RTCVCC
+3VS
+VCCP
+RTCVCC
+1.5VS
+RTCVCC +3VL
+3VS
+VCCP
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
ICH9(2/4)_LAN,HD,IDE,LPC
Custom
20 47Saturday, July 18, 2009
2006/02/13 2006/03/10Compal Electronics, Inc.
placed within 2" from
ICH9M
-+
L W=20mils
Within 500 mils
Place Close to U8.
2.5' SATA HDD Connector
Place component'sclosely SATACONN.(JP10)
12/22Remove damping R
04/02 Support HDMI audioAdd R971~R974
04/08 Y2 use CL=7pf XTAL and C206 C207 12P->8P
05/08 Update JP10 SATA footprint
07/13 Del test point ,reserved Via hole for SATA RX
R221 33_0402_5%
1 2
R209 0_0402_5% 1 2
C2
06
8P
_0
40
2_
50
V8
J
1
2
C774 0.01U_0402_16V7K1 2
R972 33_0402_5%
1 2
R22356_0402_5%
12
C600 56P_0402_50VNPO12
R207
56_0402_5%
12
R212 33_0402_5%
1 2
C763 0.01U_0402_16V7K1 2
R198 1M_0402_5%1 2
R974 33_0402_5%
1 2
R971 33_0402_5%
1 2
D8
CHN202UPT_SC-70
2
31
T49 PAD@
R2331K_0402_5%
1 2
C764 0.01U_0402_16V7K1 2
C602
56P_0402_50VNPO
12
C2
13
0.1
U_
04
02
_1
6V
4Z
1
2
R215 33_0402_5%
1 2
C197
1U_0603_10V4Z
1
2
R20520K_0402_5%
1 2
R229 10K_0402_5%12
R230 24.9_0402_1%
1 2
C2
11
10
U_
08
05
_1
0V
4Z
1
2
R231
10M_0402_5%
1 2
C198
1U_0603_10V4Z
1
2
R220 24.9_0402_1% 1 2
C210
1U_0603_10V4Z
1
2
R218 10K_0402_5%1 2
C2
12
0.1
U_
04
02
_1
6V
4Z
1
2
C773 0.01U_0402_16V7K1 2
T48 PAD
C2
07
8P
_0
40
2_
50
V8
J
1
2
T50PAD@
R226 54.9_0402_1%1 2
R232 0_0402_5%1 2
RTC
LAN / GLAN
IHDA
SATA
LPC
CPU
U8A
ICH9-M SFF ES_FCBGA569
RTCX1F25
RTCX2G25
INTVRMENE25
INTRUDER#C23
GLAN_CLKG22
LAN_RSTSYNCD14
LAN_RXD0A14
LAN_RXD1D12
LAN_RXD2B14
LAN_TXD0D13
LAN_TXD1C13
LAN_TXD2A13
HDA_BIT_CLKAE7
HDA_SYNCAB7
HDA_RST#AA7
HDA_SDIN0AB6
HDA_SDIN1AE6
HDA_SDIN2AC6
HDA_SDOUTAC7
SATALED#AC9
SATA0RXNAE14
SATA0RXPAD14
SATA0TXNAC15
SATA0TXPAD15
SATA1RXNAD13
SATA1RXPAC13
SATA1TXNAA14
SATA1TXPAB14
SATA_CLKNAC16
SATA_CLKPAB16
SATARBIAS#AD10
SATARBIASAE10
FWH0/LAD0H3
FWH1/LAD1J3
FWH2/LAD2K5
FWH3/LAD3L3
LDRQ0#H1
LDRQ1#/GPIO23J1
FWH4/LFRAME#J2
A20GATEN3
A20M#AB23
DPRSTP#AE23
DPSLP#AE24
FERR#AD25
CPUPWRGDAE22
IGNNE#AD23
INIT#AE21
INTRAD24
RCIN#L1
SMI#AC21
NMIAD21
STPCLK#AC25
THRMTRIP#AC23
RTCRST#G24
GPIO56D15
GLAN_COMPOH21
GLAN_COMPIH22
HDA_SDIN3AA5
SATA4TXNAB12
SATA4RXNAD12
SATA4TXPAA12
SATA4RXPAE12
TP11AC22
HDA_DOCK_EN#/GPIO33AD8
HDA_DOCK_RST#/GPIO34AB8
LAN100_SLPD25
SATA5RXNAC11
SATA5RXPAD11
SATA5TXNAB10
SATA5TXPAA10
SRTCRST#C24
R199 330K_0402_1%1 2
JBATT1
ACES_85204-02001
CONN@
11
22
G13
G24
R216 10K_0402_5%1 2
JP10
SANTA_192701-1_22P-T
CONN@
GND1
A+2
A-3
GND4
B-5
B+6
GND7
V338
V339
V3310
GND11
GND12
GND13
V514
V515
V516
GND17
Reserved18
GND19
V1220
V1221
V1222
NC23
NC24
GND25
GND26
Y2
32.768KHZ_7PF_Q13MC1461000100
O
SC
4
OS
C1
NC
3
NC
2
C2
14
0.1
U_
04
02
_1
6V
4Z
1
2
R206 1K_0201_5%
@
1 2
CL
RP
1S
HO
RT
PA
DS
12
R210 56_0402_5%1 2
R973 33_0402_5%
1 2
T111 PAD
R200 20K_0402_5%
1 2
R213 33_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SIRQ
LINKALERT#
ICH_RI#
PM_CLKRUN#
PCIE_C_TXP2PCIE_C_TXN2PCIE_RXP2PCIE_RXN2
PCIE_WAKE#
HDD_HALTLED
USB_OC#7
USB_OC#5USB_OC#6
USB_OC#0
DMI_IRCOMP
CLK_PCIE_ICH#CLK_PCIE_ICH
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN1
DMI_RXN3
DMI_RXP1
DMI_RXP2
DMI_RXP3
USBRBIAS
SUS_PWR_ACK
PM_PWROK
ICH_SUSCLK
SB_SPKR
DMI_RXN0
SLP_S4#
ICH_SMB_DATA
CL_DATA0
CLK_14M_ICH
XDP_DBRESET#
GPIO38
CK_PWRGD_R
DPRSLPVR
SIRQ
CL_RST#
CL_CLK0
SLP_S3#
R_STP_CPU#
SUS_PWR_ACK
THERM_SCI#
H_STP_PCI#
GPIO21
LINKALERT#
DMI_RXP0
CL_VREF0_ICH
ICH_RI#
PCIE_WAKE#
PM_CLKRUN#
GPIO37
PM_BMBUSY#
CLK_48M_ICH
PM_PWROK
CL_VREF1_ICH
MCH_ICH_SYNC# AC_PRESENT
DMI_RXN2
ISO_PREP#
CB_IN#
KBC_SPI_CLK
KBC_SPI_SI
KBC_SPI_CS0#
ICH_SMB_DATAICH_SMBDATA
VRMPWRGD
VRMPWRGD
CLK_14M_ICHCLK_48M_ICH
LAN_STATUS#_DLANLINK_STATUS#ISO_PREP#
KBC_SPI_CS1#
USB_OC#1USB_OC#2WXMIT_OFF#
USB_OC#0
XMIT_OFF#
USB_OC#4
RSMRST#
GPIO11
USB_OC#1
USB_OC#6
WXMIT_OFF#
USB_OC#2
GPIO11
EXP_RST
GPIO21
GPIO37
HDD_HALTLED
ICH_LOW_BAT#
LAN_STATUS#_D PM_PWROK
CB_IN#
EXP_RST
USB_OC#4
USB_OC#5
GPIO17
GLAN_RXP
GLAN_TXP_CGLAN_TXN_C
GLAN_RXN
USB_OC#7
ICH_LOW_BAT#
AC_PRESENT
GPIO17
GPIO39
XDP_DBRESET#
XMIT_OFF#
USB_OC#11
USB_OC#11
NPCI_RST#
WWAN_DETECT#_R
ICH_SMBCLK ICH_SMB_CLK
ICH_SMB_CLK
H_STP_PCI#<15>H_STP_CPU#<15>
SB_SPKR<27>
PCIE_TXN2<25>PCIE_RXP2<25>PCIE_RXN2<25>
PCIE_TXP2<25>
USB20_N6 <30>USB20_P6 <30>
USB20_N5 <28>USB20_P5 <28>
CK_PWRGD <15>
SIRQ<31,32>THERM_SCI#<4>
OCP#<43>
CLK_48M_ICH <15>CLK_14M_ICH <15>
SLP_S3# <23,32,33,34,37,38,40,41,43>SLP_S4# <8,28,30,34,39>
PM_DPRSLPVR <8,42>
DMI_RXP0 <8>DMI_RXN0 <8>
DMI_TXP0 <8>DMI_TXN0 <8>
CLK_PCIE_ICH# <15>CLK_PCIE_ICH <15>
DMI_RXP1 <8>DMI_RXN1 <8>
DMI_TXP1 <8>DMI_TXN1 <8>
DMI_RXP2 <8>DMI_RXN2 <8>
DMI_TXP2 <8>DMI_TXN2 <8>
DMI_RXP3 <8>DMI_RXN3 <8>
DMI_TXP3 <8>DMI_TXN3 <8>
USB20_N0 <30>USB20_P0 <30>
PM_RSMRST# <32>
CLKSATAREQ#<15>
PM_CLKRUN#<32>
CL_DATA0 <8>
CL_RST# <8>
XDP_DBRESET#<4>
CL_CLK0 <8>
MCH_ICH_SYNC#<8>
PM_BMBUSY#<8>
USB20_N7 <25>USB20_P7 <25>
ON/OFFBTN# <29>
USB20_P3 <28>USB20_N3 <28>
RUNSCI_EC#<32>
CB_IN#<24>
KBC_SPI_CLK_R<32>
KBC_SPI_SI_R<32>
KBC_SPI_CS0#_R<32>
PCIE_WAKE#<23>
ICH_SMBCLK<4,14,15,25>
ICH_SMBDATA<4,14,15,25>
ICH_SM_DA<4,14,15,25>
ICH_SM_CLK<4,14,15,25>
KBC_SPI_CS1#_R<32>
WEBCAM_ON/OFF#<17>
CLK_ENABLE# <42>
LID_SW#<17,29,32>
BT_OFF<30>
KBC_SPI_CS1#<19>
WXMIT_OFF#<25>
XMIT_OFF#<25>
RPGOOD <38>
KBC_SPI_SO<32>
PM_PWROK <8,32,42>
LP_EN <23>
USB20_P10 <17>USB20_N10 <17>
HDD_HALTLED <18>
GLAN_RXN<23>
GLAN_TXP<23>
GLAN_RXP<23>GLAN_TXN<23>
USB20_N1 <28>USB20_P1 <28>
ADP_PRES <23,32,36,37>
LANLINK_STATUS#<23,24>
WWAN_DETECT#<25>
NPCI_RST# <32>
+3VALW
+3VALW
+3VALW
+3VS
+3VS
+3VS +3VALW
+1.5VS
+3VALW
+3VALW
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VALW
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
ICH9(3/4)_DMI,USB,GPIO,PCIE
Custom
21 47Saturday, July 18, 2009
2006/02/13 2006/03/10Compal Electronics, Inc.
Within 500 mils
WLAN
GL
AN
MB
Bluetooth
WWAN
Within 500 mils
USB Camera
EXP
WWAN
Small board
card readerPlace closely pin H1Place closely pin AF3
Add in 9/14.
Small board
03/25 R254 10K-->100K
03/26 Del R268
03/26 Add R967
03/26 CB_IN_R->CB_IN#
03/31 Add NPCI_RST#
04/29 Q33A on page27
T53 PAD@
C227 0.1U_0402_16V4Z 1 2
C920 0.1U_0402_16V4Z 1 2
R967 0_0402_5%1 2
R263 10K_0402_5%1 2
TP43PAD@
R366 0_0402_5%1 2
R32110K_0402_5%
1 2
R29322.6_0402_1%
12
R595 10K_0402_5%1 2
R857 10K_0402_5%1 2
R237 8.2K_0402_5%
1 2
R289 15_0402_5%
1 2
R851 10K_0402_5%1 2
R250
10K_0402_5%
12
C453 0.1U_0402_16V4Z 1 2
TP42PAD@
R621 10K_0402_5%1 2
R2362.2K_0402_5%
12
R286 15_0402_5%
1 2
R25510K_0402_5%
1 2
R2
74
45
3_
04
02
_1
%
12
R24010_0402_5%
@
12
R858 10K_0402_5%@
1 2
R245 47K_0402_5%1 2
Q12A2N7002DW-7-F_SOT363-6
61
2
R275 8.2K_0402_5%
1 2
R24910K_0402_5%
12
R276 1K_0402_5% @1 2
R25210K_0402_5%
1 2
R253 0_0402_5%1 2
R23910_0402_5%
@
12
C547
0.1U_0402_16V4Z@
1
2
C228 0.1U_0402_16V4Z 1 2
R285 15_0402_5%
1 2
R2822.2K_0402_5%
12
C2
25
0.1
U_
04
02
_1
6V
4Z
1
2
Q12B2N7002DW-7-F_SOT363-6
3
5
4
R725 10K_0402_5%1 2
R280
10K_0402_5%
12
R2
78
45
3_
04
02
_1
%
12
R33510K_0402_5%
1 2
R332 0_0402_5%1 2
R32610K_0402_5%
1 2
Q33B
TR 2N7002DW-7-F 2N SOT-363
3
5
4
D40 CH751H-40_SC76 21
C2
26
0.1
U_
04
02
_1
6V
4Z
1
2
R726 10K_0402_5%
1 2
R291 0_0402_5%1 2
R508 8.2K_0402_5%
1 2
R87710K_0402_5%
1 2
R256 0_0402_5%1 2
R27210K_0402_5%
1 2
R26610K_0402_5%
1 2
R848 8.2K_0402_5%
1 2
R23410K_0402_5%
1 2
R254 100K_0402_5%12
R2773.24K_0402_1%
1 2
R72410K_0402_5%
1 2
C223
4.7P_0402_50V8C
@ 1
2
R23810K_0402_5%
1 2
SATA
SMB
SYS
GPIO
GPIO
GPIO
Clocks
Power MGT
Controller Link
MISC
U8C
ICH9-M SFF ES_FCBGA569
SATA0GP/GPIO21AE19
SATA1GP/GPIO19AA18
SATA4GP/GPIO36AE20
SATA5GP/GPIO37AA20
SMBCLKC18
SMBDATAC15
LINKALERT#/GPIO60/CLGPIO4B21
SMLINK0E18
SMLINK1A24
SUS_STAT#/LPCPD#T5
SYS_RESET#C25
PMSYNC#/GPIO0L2
GPIO1AE16
GPIO6AE18
GPIO7AD18
GPIO8B25
GPIO12C14
SMBALERT#/GPIO11A23
GPIO17AE17
GPIO18K3
SCLOCK/GPIO22AC19
SATACLKREQ#/GPIO35M4
STP_PCI#/GPIO15B15
STP_CPU#/GPIO25A20
SLOAD/GPIO38AB18
SDATAOUT0/GPIO39AC18
CLKRUN#/GPIO32M5
SDATAOUT1/GPIO48AB19
WAKE#C21
SERIRQL4
THRM#AD20
VRMPWRGDB24
CLK14K1
CLK48AB5
SUSCLKR3
SLP_S3#D18
SLP_S4#B20
SLP_S5#D16
PWROKD23
DPRSLPVR/GPIO16M1
BATLOW#C16
PWRBTN#U4
LAN_RST#D22
RSMRST#D19
RI#C20
S4_STATE#/GPIO26E14
GPIO27D17
GPIO28E20
TP12A19
CK_PWRGDU1
CLPWROKT4
SLP_M#B23
GPIO20AC8
CL_CLK0C22
CL_CLK1A18
CL_DATA0E22
CL_DATA1B18
CL_VREF0F21
CL_VREF1A17
CL_RST0#C17
GPIO10/SUS_PWR_ACKE16
WOL_EN/GPIO9D21
GPIO14/AC_PRESENTA15
MEM_LED/GPIO24A22
SPKRK4
TP3C19
CL_RST1#B17
GPIO49AC20
GPIO13D20
GPIO57/CLGPIO5A16
TP10AD17
TP8AB17
MCH_SYNC#AB20
TP9AC17
R2713.24K_0402_1%
1 2
R265 0_0402_5%1 2
R257100K_0402_5%
12
R2591K_0402_5%
1 2
R2352.2K_0402_5%
12
R284 24.9_0402_1% 1 2
R290 15_0402_5%
1 2
PCI-Express
Direct Media Interface
USB
SPI
U8D
ICH9-M SFF ES_FCBGA569
PERN1T25
PERP1T24
PETN1R24
PETP1R23
PERN2P25
PERP2P24
PETN2P21
PETP2P22
PERN3N23
PERP3N24
PETN3M21
PETP3M22
PERN4M25
PERP4M24
PETN4L24
PETP4L23
PERN5K24
PERP5K25
PETN5K21
PETP5K22
PERN6/GLAN_RXNH24
PERP6/GLAN_RXPH25
PETN6/GLAN_TXNJ24
PETP6/GLAN_TXPJ23
DMI0RXNV25
DMI0RXPV24
DMI0TXNU24
DMI0TXPU23
DMI1RXNW23
DMI1RXPW24
DMI1TXNV21
DMI1TXPV22
DMI2RXNY24
DMI2RXPY25
DMI2TXNY21
DMI2TXPY22
DMI3RXNAB24
DMI3RXPAB25
DMI3TXNAA23
DMI3TXPAA24
DMI_CLKNT21
DMI_CLKPT22
DMI_ZCOMPAB21
DMI_IRCOMPAB22
OC0#/GPIO59P4
OC1#/GPIO40N4
OC2#/GPIO41N1
OC3#/GPIO42P5
OC4#/GPIO43P1
OC5#/GPIO29P2
OC6#/GPIO30M3
OC7#/GPIO31M2
USBP0NAE2
USBP0PAD1
USBP1NAD3
USBP1PAD4
USBP2NAC2
USBP2PAC3
USBP3NAC5
USBP3PAB4
USBP4NAB2
USBP4PAB1
USBP5NAA3
USBP5PAA2
USBP6NY1
USBP6PY2
USBP7NW2
USBP7PW3
USBRBIAS#AD5
USBRBIASAE5
SPI_CLKE24
SPI_CS0#E23
SPI_CS1#/GPIO58/CLGPIO6F23
SPI_MOSIF22
SPI_MISOG23
OC8#/GPIO44P3
OC9#/GPIO45R1
USBP8PV2
USBP8NV1
USBP9NY5
USBP9PY4
USBP10NU3
USBP11NV4
USBP10PU2
USBP11PV5
OC10#/GPIO46R4
OC11#/GPIO47R2
R603 10K_0402_5%1 2
R2832.2K_0402_5%
12
C224
4.7P_0402_50V8C
@1
2
R25810K_0402_5%
1 2
R331
10K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCC_DMI
ICH_V5REF_SUS
ICH_V5REF_SUS
+1.5VS_GLAN
+1.5VS_DMIPLL
ICH_V5REF_RUN
VCC_LAN1_05_INT_ICH
ICH_V5REF_RUN
VCCCL1_05_ICH
+VCCP
+1.5VS
+RTCVCC
+1.5VS
+3VS
+3VS
+1.5VS
+1.5VS
+5VS +3VS +3VALW+5VALW
+3VS
+3VALW
+3VALW
+VCCP
+1.5VS_PCIE_ICH
+1.5VS
VCC_DMI
+1.5VS_VCCSATAPLL
+1.5VS
+1.5VS_PCIE_ICH
+1.5VS_USBPLL
+VCCP
+1.5VS
+3VS
+3VS
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
ICH9(4/4)_POWER&GND
Custom
22 47Friday, July 17, 2009
2006/02/13 2006/03/10Compal Electronics, Inc.
(DMI)
40 mils
20 mils
20 mils20 mils
9/29
9/29
646mA
2mA2mA
47mA
11mA
1342mA
78mA
23mA
212mA
1634mA
23mA
48mA
308mA
04/02 Support HDMI audio +3VS-->+1.5VS
04/02 Support HDMI audio Add R976 R977
07/09 Use 1u_0402
C2
62
4.7
U_
08
05
_1
0V
4Z
1
2
C2170.1U_0402_16V4Z
1 2
C2
48
0.1
U_
04
02
_1
6V
4Z
1
2
C2
65
0.1U_0402_16V4Z
1
2
C2
53
0.1
U_
04
02
_1
6V
4Z
1
2
C2
66
0.1
U_
04
02
_1
6V
4Z
1
2
R977
150_0402_1%
12
C2
39
10
U_
08
05
_1
0V
4Z
1
2
C252
1U_0402_6.3V6K
1
2
C2
60
0.1
U_
04
02
_1
6V
4Z
1
2
C2
44
10
U_
08
05
_1
0V
4Z
1
2
R296
MBK1608301YZF 0603
1 2C2
40
10
U_
08
05
_1
0V
4Z
1
2
C251
1U_0603_10V6K
1
2
C2
38
0.1
U_
04
02
_1
6V
4Z
1
2
C2
61
0.1
U_
04
02
_1
6V
4Z
1
2
R297
MBK1608301YZF 0603
1 2
R301
MBK1608301YZF 0603
1 2
R303MBK1608301YZF 0603
1 2
C2
70
10
U_
08
05
_1
0V
4Z
1
2
C2
57
10
U_
08
05
_1
0V
4Z
1
2
C2
59
1U
_0
60
3_
10
V4
Z
1
2
C2
45
1U
_0
60
3_
10
V4
Z
1
2
CORE
VCCA3GP
ATX
ARX
USB CORE
PCI
GLAN POWER
VCCP_CORE
VCCPSUS
VCCPUSB
U8F
ICH9-M SFF ES_FCBGA569
V5REFG7
V5REF_SUSU7
VCC1_5_B[01]J19
VCC1_5_B[02]K18
VCC1_5_B[03]K19
VCC1_5_B[04]L18
VCC1_5_B[05]L19
VCC1_5_B[06]M18
VCC1_5_B[07]M19
VCC1_5_B[08]N18
VCC1_5_B[09]N19
VCC1_5_B[10]P18
VCC1_5_B[11]R18
VCC1_5_B[12]T18
VCC1_5_B[13]T19
VCC1_5_B[14]U18
VCC1_5_B[15]U19
VCC3_3[01]V18
VCCDMIPLLP19
VCC1_5_A[01]U13
VCC1_5_A[02]V13
VCC1_5_A[03]W13
VCCSATAPLLW17
VCC3_3[02]AE9
VCC1_5_A[04]U12
VCC1_5_A[05]V12
VCCUSBPLLU8
VCCLAN1_05[1]G11
VCCLAN1_05[2]H11
VCC1_05[01]L11
VCC1_05[02]L12
VCC1_05[03]L13
VCC1_05[04]L14
VCC1_05[05]L15
VCC1_05[06]M11
VCC1_05[07]M15
VCC1_05[08]N11
VCC1_05[09]N15
VCC1_05[10]P11
VCC1_05[11]P15
VCC1_05[12]R11
VCC1_05[13]R12
VCC1_05[14]R13
VCC1_05[15]R14
VCC1_05[16]R15
VCCLAN3_3[1]G12
VCCLAN3_3[2]H13
VCCHDAAD7
VCCSUSHDAV10
V_CPU_IO[1]V16
V_CPU_IO[2]U16
VCC3_3[07]H7
VCC3_3[08]H8
VCCRTCG17
VCCSUS3_3[01]G14
VCCSUS3_3[02]G15
VCCSUS3_3[03]H14
VCCSUS3_3[05]J7
VCCSUS3_3[06]J8
VCCSUS3_3[07]K7
VCCSUS3_3[08]K8
VCCSUS3_3[09]L7
VCCSUS3_3[10]L8
VCCSUS3_3[11]M7
VCCSUS3_3[12]M8
VCCSUS3_3[13]N7
VCCSUS3_3[14]N8
VCCSUS3_3[15]P7
VCCSUS3_3[16]P8
VCCSUS1_05[1]T7
VCCSUS1_05[2]H15
VCC1_5_A[12]H9
VCC1_5_A[13]V11
VCC1_5_A[14]U11
VCCSUS3_3[04]W8
VCC3_3[06]G8
VCCGLAN1_5[2]J18
VCCGLAN1_5[1]H19
VCCGLAN3_3K16
VCCGLANPLLJ17
VCC3_3[03]AA9
VCCSUS1_5[1]H16
VCCSUS1_5[2]V7
VCC_DMI[2]U17
VCC_DMI[1]T17
VCCCL1_05G18
VCCCL3_3[2]K14
VCCCL3_3[1]J14
VCCCL1_5H17
VCC1_5_A[06]W12
VCC3_3[04]V14
VCC3_3[05]W14
VCC1_5_A[10]W18
VCC1_5_A[11]G9
VCC1_5_A[09]V15
VCC1_5_A[08]U15
VCC1_5_A[07]W10
VCC1_5_A[15]T9
VCC1_5_A[16]U9
C2
35
0.1
U_
04
02
_1
6V
4Z
1
2
+C242220U_B2_2.5VM_R25
1
2
R300
MBK1608301YZF 0603 1 2
U8E
ICH9-M SFF ES_FCBGA569
VSS[001]B4
VSS[002]B7
VSS[003]B10
VSS[004]B13
VSS[005]B16
VSS[006]B19
VSS[007]B22
VSS[008]D2
VSS[009]D24
VSS[010]E5
VSS[011]E7
VSS[012]E9
VSS[013]E11
VSS[014]E13
VSS[015]E15
VSS[016]E17
VSS[017]E19
VSS[018]E21
VSS[019]F24
VSS[020]G2
VSS[021]G5
VSS[022]G10
VSS[023]G13
VSS[024]G16
VSS[025]G19
VSS[026]G21
VSS[027]H10
VSS[028]H12
VSS[029]H18
VSS[030]H23
VSS[031]J5
VSS[032]J9
VSS[033]J10
VSS[034]J11
VSS[035]J12
VSS[036]J13
VSS[037]J15
VSS[038]J21
VSS[039]J22
VSS[040]J25
VSS[041]K2
VSS[042]K9
VSS[043]K10
VSS[044]K11
VSS[045]K12
VSS[046]K13
VSS[047]K15
VSS[048]K17
VSS[049]K23
VSS[050]L5
VSS[051]L9
VSS[052]L10
VSS[053]L16
VSS[054]L17
VSS[055]L21
VSS[056]L22
VSS[057]L25
VSS[058]M9
VSS[059]M10
VSS[060]M12
VSS[061]M13
VSS[062]M14
VSS[063]M16
VSS[064]M17
VSS[065]M23
VSS[066]N2
VSS[067]N5
VSS[068]N9
VSS[069]N10
VSS[070]N12
VSS[071]N13
VSS[072]N14
VSS[073]N16
VSS[074]N17
VSS[075]N21
VSS[076]N22
VSS[077]N25
VSS[078]P9
VSS[079]P10
VSS[080]P12
VSS[081]P13
VSS[082]P14
VSS[083]P16
VSS[084]P17
VSS[085]P23
VSS[086]R5
VSS[087]R7
VSS[088]R8
VSS[089]R9
VSS[090]R10
VSS[091]R16
VSS[092]R17
VSS[093]R19
VSS[094]R21
VSS[095]R22
VSS[096]R25
VSS[097]T2
VSS[099]T10
VSS[100]T11
VSS[101]T12
VSS[102]T13
VSS[103]T14
VSS[104]T15
VSS[105]T16
VSS[106]T23
VSS[107]U5
VSS[108]U10
VSS[109]W11
VSS[110]U14
VSS[111]W16
VSS[112]U21
VSS[113]U22
VSS[114]U25
VSS[115]V3
VSS[116]V8
VSS[117]V19
VSS[118]V23
VSS[119]W1
VSS[120]W4
VSS[121]W5
VSS[122]W7
VSS[123]W9
VSS[124]W15
VSS[125]W19
VSS[126]W21
VSS[127]W22
VSS[128]W25
VSS[129]Y3
VSS[130]Y23
VSS[131]AA1
VSS[132]AA4
VSS[133]AA6
VSS[134]AA8
VSS[135]AA11
VSS[136]AA13
VSS[137]AA15
VSS[138]AA16
VSS[139]AA17
VSS[140]AA19
VSS[141]AA21
VSS[142]AA22
VSS[143]AA25
VSS[144]AB3
VSS[145]AB9
VSS[146]AB11
VSS[147]AB13
VSS[148]AB15
VSS[149]AC24
VSS[150]AC1
VSS[151]AC4
VSS[152]AC10
VSS[153]AC12
VSS[154]AC14
VSS[155]AD2
VSS[156]AD6
VSS[157]AD9
VSS[158]AD16
VSS[159]AD19
VSS[160]AD22
VSS[161]AE3
VSS[162]AE4
VSS[163]AE11
VSS[164]AE13
VSS[165]AE15
VSS_NCTF[01]A1
VSS_NCTF[02]A25
VSS_NCTF[03]AE1
VSS_NCTF[04]AE25
VSS[098]T8
VSS[166]V17
VSS[167]AE8
VSS[168]V9
VSS[169]J16
R976 180_0402_1%1 2
C2
54
0.1
U_
04
02
_1
6V
4Z
1
2
C2
36
0.1
U_
04
02
_1
6V
4Z
1
2
R298
100_0402_5%
12
C2
46
0.1
U_
04
02
_1
6V
4Z
1
2
C264 1U_0603_10V4Z1 2
C2
50
0.1
U_
04
02
_1
6V
4Z
1
2
R295
BLM18PG181SN1D_06031 2
C2
68
0.1
U_
04
02
_1
6V
4Z
1
2
C2
56
1U
_0
60
3_
10
V4
Z
1
2
C2670.1U_0402_16V4Z
12
C2
49
0.1
U_
04
02
_1
6V
4Z
1
2
C2
43
0.0
1U
_0
40
2_
16
V7
K
1
2
C2
47
4.7
U_
08
05
_1
0V
4Z
1
2
D11
CH751H-40_SC76
21
C2
63
0.1
U_
04
02
_1
6V
4Z
1
2
C2
58
1U
_0
60
3_
10
V4
Z
1
2
C2
69
10
U_
08
05
_1
0V
4Z
1
2
C2
37
0.1
U_
04
02
_1
6V
4Z
1
2
C2
41
2.2
U_
06
03
_6
.3V
4Z
1
2
R299
100_0402_5%
12
D12
CH751H-40_SC76
21
C2
55
0.1
U_
04
02
_1
6V
4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LAN_EE_DATALAN_EE_CLK
LAN_EE_CLKLAN_EE_DATA
LANLINK_STATUS#
CLK_LAN_REQ#PCIE_RXP6_LANPCIE_RXN6_LAN
CLK_LAN_REQ#
LAN_X1LAN_X2
LAN_ACT#
PCIE_WAKE#
CLK_PCIE_LAN#CLK_PCIE_LAN
LAN_X1LAN_X2LAN_DIS#
LAN_DIS#
CTRL18
CTRL12
CTRL18CTRL12
GLAN_TXP<21>GLAN_TXN<21>
GLAN_RXN<21>GLAN_RXP<21>
PLT_RST#<8,19,25,27,31>
LAN_MDI0N<24>
LAN_MDI3P<24>LAN_MDI3N<24>
LAN_MDI1P<24>
LAN_MDI2P<24>LAN_MDI2N<24>
LAN_MDI0P<24>
LAN_MDI1N<24>
LAN_ACT# <24>
LANLINK_STATUS# <21,24>
PCIE_WAKE#<21>
SLP_S3#<21,32,33,34,37,38,40,41,43>
ADP_PRES<21,32,36,37>
CLK_PCIE_LAN_REQ#<15>
CLK_PCIE_LAN<15>CLK_PCIE_LAN#<15>
LP_EN<21>
+3V_LAN
+3V_LAN
+3V_LAN
+3V_LAN
+3VS
V1.8_LAN
+3V_LAN
+3V_LAN
V1.2_LAN
V1.8_LAN
V1.2_LAN
V1.2_LAN
+3VALW+3V_LAN
+3V_LAN
+3V_LAN
+3VS
+3VS
+3V_LAN
V1.8_LAN
+3V_LAN
V1.2_LAN
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
23 47Saturday, July 18, 2009
2008/10/03 2009/10/03Compal Electronics, Inc.
88E8072 88E8075
Insert
R653
C533
R440
Q28
R654
R655
U36
C694
R659
R658
R656
R652
R660
370mA
151mA
379mA03/30 U33 use AT24C08BN
03/31 Modify Q91 pin deifne (Avoid +3VS leakage on S3 mode)
05/08 Update Y6 footprint
05/16 Reserved R992
05/22 Del reserved co-layouy part
05/22 Del reserved co-layouy part
C50910U_0805_10V4Z
12
C92627P_0402_50V8J
12
R717
10K_0402_5%
12
R5574.7K_0402_5%
12
C915
0.1U_0402_16V4Z
1
2
C490
0.1U_0402_16V4Z
1
2
C511
0.1U_0402_16V4Z
12 D57
CH751H-40_SC76
21
R992 0_0402_5%@
12
R539
47K_0402_5%
12
R714 4.7K_0402_5%
12
R544 0_0402_5%
1 2
C9160.1U_0402_16V4Z
1
2
C50827P_0402_50V8J
12
C491
0.1U_0402_16V4Z
1
2
R7194.7K_0402_5%
12
Y625MHZ_20P_ 8425-25.000-20
12
C9254.7U_0805_10V4Z
12
C494
0.1U_0402_16V4Z
1
2
R710
47K_0402_5%12
R540
10K_0402_5%
12
Q68
2SB1188T100R_SC62-3
1
23
G
DS
Q96
2N7002_SOT23-3
2
13
Q692SB1188T100R_SC62-3
1
23
R709
10K_0402_5%
12
C9190.1U_0402_16V4Z 12
C913
0.1U_0402_16V4Z
1
2
U33
AT24C08BN-SH-T SOIC 8P
CS#1
SO2
WP#3
GND4
VCC8
HOLD#7
SCK6
SI5
G
DS
Q65SI2301BDS_SOT23
2
13
C51310U_0805_10V4Z
12
C9240.1U_0402_16V4Z
1
2
R715
4.99K_0402_1%1 2
C4930.1U_0402_16V4Z
1
2
Q92B2N7002DW-7-F_SOT363-6
3
5
4
C495
0.1U_0402_16V4Z
1
2
R541
10K_0402_5%
12
R718 4.7K_0402_5%
12
C953
0.1U_0402_16V4Z
1
2
C918
0.1U_0402_16V4Z
1
2
C917
0.1U_0402_16V4Z
1
2
C914
0.1U_0402_16V4Z
1
2
Q92A2N7002DW-7-F_SOT363-6
61
2
C9274.7U_0805_10V4Z
12
PCI-E
LED
CLOCK
FLASHMEMORY
EEPROM
TEST
Media
Analog
POWER
&
GROUND
No Connect
U31
88E8072 & 88E8075_QFN64
TX_P49
TX_N50
RX_P54
RX_N53
WAKEn6
REFCLKP55
REFCLKN56
PERSTn5
MDIP017
MDIN018
MDIP120
MDIN121
MDIP226
MDIN227
MDIP330
MDIN331
VPD_CLK38
VPD_DATA41
SPI_DO34
SPI_DI35
SPI_CLK37
SPI_CS36
XTALI15
XTALO14
LOM_DISABLEn(USB_DM-)10
VAUX_AVLBL12
SWITCH_VCC(LOM_DISABLEn)11
VMAIN_AVLBL47
SWITCH_VAUX(USB_DP+)9
RSET16
CTRL184
CTRL123
LED_ACTn59
LED_LINK10/100n60
LED_LINK1000n62
LED_DUPLEXn63
TESTMODE46
AVDDH8
AVDD19
NC22
NC23
AVDD28
VDDO_TTL1
VDDO_TTL40
VDDO_TTL45
VDDO_TTL61
VDD2
VDD7
VDD13
VDD33
VDD39
VDD44
VDD48
VDD58
CLKREQn42
EAPD65
(PD18LDO)NC32
NC51
NC52
SMALERTn57
SMCLK64
Reserved24
Reserved25
Reserved29
SMDATA43
R711 10K_0402_5%
1 2
C492
0.1U_0402_16V4Z
1
2
R546 0_0402_5%
1 2
C489
0.1U_0402_16V4Z
1
2
C4970.1U_0402_16V4Z 12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MCT3TRM_CT
TRM_CT
MDO2+
MDO3+
MCT1
MCT0
TRM_CT
MDO1+
MDO0-
MDO0+
MDO1-
TRM_CT
MDO3-
MDO2-
MCT2
LANLINK_STATUS#
LAN_ACT#
MDO1+
MDO1-
MDO0+
MDO0-
MDO2-
MDO2+
MDO3+
MDO3-
LAN_ACT#
LANLINK_STATUS#
CB_IN#
LAN_MDI3N<23>
LAN_MDI0P<23>
LAN_MDI2N<23>
LAN_MDI2P<23>
LAN_MDI0N<23>
LAN_MDI1P<23>
LAN_MDI3P<23>
LAN_MDI1N<23>
LAN_ACT#<23>
LANLINK_STATUS#<21,23>
CB_IN# <21>
V1.8_LAN
V1.8_LAN
V1.8_LAN
V1.8_LAN
+3V_LAN
+3V_LAN
+3V_LAN
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
Magnetic & RJ45
24 47Friday, July 17, 2009
2006/02/13 2006/07/26Compal Electronics, Inc.
Delete all termination cause they are already inside BOAZMAN. 9/28
12/23+1.8VM-->V1.8_LAN
Reserve toprevent ESD issueas other project.1/18
03/36 Add R968 C994 and Del R89
C307 0.01U_0402_50V7K 1 2
1:1
1:1
1:1
1:1
T69
X'FORM_ NS692405 LAN_24P
TCT11
TD1+2
TD1-3
TCT24
TD21+5
TD2-6
TCT37
TD3+8
TD3-9
TCT410
TD4+11
TD4-12
MX4-13
MX3-16
MCT318
MX2-19
MX2+20
MCT221
MX1-22
MX1+23
MCT124
MX4+14
MCT415
MX3+17
R339 300_0603_5% 1 2
D44PACDN042_SOT23~D@
231
C310 0.01U_0402_50V7K 1 2
C311680P_0402_50V7K@1 2
C309 0.01U_0402_50V7K 1 2
C312680P_0402_50V7K@1 2
C305 0.1U_0402_16V7K
12
C297 0.1U_0402_16V7K
12
R31975_0402_1%
12
C306 1000P_1808_3KV7K
1 2
C304 0.1U_0402_16V7K
12
R341 300_0603_5%
1 2
R32375_0402_1%
12
JP7
SANTA_130452-3_13P-TCONN@
PR1-2
PR1+1
PR2+3
PR3+4
PR3-5
PR2-6
PR4+7
PR4-8
Green LED-10
Green LED+9
Yellow LED-12
Yellow LED+11
SHLD114
SHLD115
DETECT PIN113
R33075_0402_1%
12
C308 0.01U_0402_50V7K 1 2C299 0.1U_0402_16V7K
12
C994
680P_0402_50V7K
@
1
2
R968
10K_0402_5%
@
12
R32975_0402_1%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
UIM_CLK
UIM_RST
M_WXMIT_OFF#
UIM_CLK
UIM_VPP
WW_LED#
UIM_RSTUIM_VPP
XMIT_D_OFF#
PCIE_C_RXP2PCIE_C_RXN2
WL_LED#
PCI_RST#
XMIT_D_OFF#
UIM_PWR
M_WXMIT_OFF#
PLT_RST#
UIM_DATA
UIM_PWR
UIM_DATAUIM_PWR
WL_LED#
WWAN_DETECT#
WXMIT_OFF#<21>
USB20_N7 <21>USB20_P7 <21>
CLK_PCIE_MCARD<15>CLK_PCIE_MCARD#<15>
PLT_RST# <8,19,23,27,31>
PCIE_TXN2<21>
PCIE_TXP2<21>
WL_LED# <18>
PCIE_RXP2<21>PCIE_RXN2<21>
XMIT_OFF# <21>
CLKREQ_WLAN#<15>
ACCEL_INT#<19>
ICH_SM_DA<4,14,15,21>ICH_SM_CLK<4,14,15,21>
WW_LED# <18>
CLK_PCI_DEBUG<15>PCI_RST#<19>
WWAN_DETECT# <21>
+3VS
+3VS
+3VS
+3VS
+1.5VS
+1.5VS
+3VS
+3VS
+3VS
+3
VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
WLAN&WWAN Mini-Card/Accelerometer
25 47Friday, July 17, 2009
2005/05/26 2006/07/26Compal Electronics, Inc.
Mini-Express Card--WWAN ACCELEROMETER
WWLAN/WiMax Mini-Express Card
Add to prevent leakage issue.
L Must be placed in the center of the system.
Change Power rail sameas pin2, 52. 8/16
Note1
Note2Reserve for 800 & 900MHzEMI issue. 8/16
Note2
Close to JP14
DEL in 9/26
Change valueto 47K. 9/27
Add in 9/27
Add back 9/27
Delete R407, R409, R522, R528, R529, & R530 of LPC forlayout improve. 2/21
2/21
2/21
Change U12 part description fromLIS302DLTR LGA to HP302DLTR8 as HPchange list. 12/03
Del R345 & improve+3V_WLAN. 12/11
Del R354 &improve+3V_WWAN.12/11
delete R362~R364,
not support Clink
on 2008 products to
WWAN slot 5/22
half size
Full size
0 0 1 1 1 0 1 b
07/08 Install C590 C591 10P cap
R365 10K_0402_5%12
D16
CH751H-40_SC76
21
R359 0_0603_5%
1 2JP15
TAITW_PMPAT6-06GLBS7N14N0CONN@
VCC1
RST2
CLK3
GND4
VPP5
I/O6
GND8
GND9
DET7
C3
33
0.0
1U
_0
40
2_
16
V7
K
1
2
C3
41
10
U_
08
05
_6
.3V
6M
1
2
R347 0_0402_5%1 2
C3
16
0.1
U_
04
02
_1
6V
4Z
1
2
C3
43
0.1
U_
04
02
_1
6V
4Z
1
2
R346 0_0402_5%1 2
C3
17
4.7
U_
08
05
_1
0V
4Z
1
2
R360 0_0603_5%1 2
C3
20
4.7
U_
08
05
_1
0V
4Z
1
2
JP14
MOLEX_67910-5700CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
3939
4040
4141
4242
4343
4444
4545
4646
4747
4848
4949
5050
5151
5252
GND153
GND254
D15DAN217T146_SC59-3@
2
31
C3
18
0.0
1U
_0
40
2_
16
V7
K
1
2
C5
90
10
P_
04
02
_2
5V
8J
1
2
JP13
FOX_AS0B226-S40N-7F
CONN@
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
4141
4343
4545
4747
4949
5151
GND153
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
3030
3232
3434
3636
3838
4040
4242
4444
4646
4848
5050
5252
GND254
U13
S DIO(BR) NUP4301MR6T1 TSOP-6@
CH11
Vn2
CH23
CH34
Vp5
CH46
D13 CH751H-40_SC762 1
C5
92
39
P_
04
02
_5
0V
8J
@
1
2
LIS302DLU12
HP302DLTR8_LGA14_3X5
VDD_IO1
GND2
RSVD3
GND4
GND5
VDD6
CS7
INT 18
INT 29
GND10
RSVD11
SDO12
SDA / SDI / SDO13
SCL / SPC14
C5
91
10
P_
04
02
_2
5V
8J
1
2
C3
42
4.7
U_
08
05
_1
0V
4Z
1
2
C3
35
4.7
U_
08
05
_1
0V
4Z
1
2
R965
10K_0402_5%
12
C3
36
18
P_
04
02
_5
0V
8J
@
1
2
T80 PAD
C3
34
0.1
U_
04
02
_1
6V
4Z
1
2
C3
40
0.1
U_
04
02
_1
6V
4Z
1
2
R3
67
47
K_
04
02
_5
%
@
12
C3
15
0.0
1U
_0
40
2_
16
V7
K
1
2
C3
19
0.1
U_
04
02
_1
6V
4Z
1
2
R96610K_0402_5%
@
12
T78 PADT79 PAD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number R ev
Date: Sheet o f
LA-5221P 1.0
Card reader board
26 47Friday, July 17, 2009
12/17 Remove to small board
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
MON O_IN_HD
G AIN1
SPKR_L-
HP _IN_L
SPKR_L+
HP_I N_R
SPKR_R+
HP_DET
SPKR_R-
M IC2_C
HDA_SD IN0_CODEC
SENSEA
+MIC_BIAS_CHD A_RST#_CODEC
SENSEB
+MIC_BIAS_BHDA _SDOUT_CODEC
M IC1_C
HD A_RST#_CODEC
HP _IN_LH DA_BITCLK_CODEC
M IC_INT_R_R
HDA_SYNC_ CODEC
L INE_OUTRLINE_OUTL
HP_I N_R
MON O_IN_HD
MIC_INT_L_R
HP_DET
SENSEB
G AIN0
LI NE_C_OUTR
LINE_C_OUTL
LINE_OUTL
L INE_OUTR
SPKR_L+SPKR_L-SPKR_R+SPKR_R-
EAPD#
MUTE_LED_CNTL
SENSEA
HP_DET#
SPKR_ENA_SD#
EAPD#
SB_SPKR<21> HP_OUTR <28>
HP_OUTL <28>
HDA_SYNC_CODEC<20>
HDA _SDOUT_CODEC<20>
HDA_RST#_CODEC<20>
MIC1 <28>HDA_SDIN0<20>
HDA_BITCLK_CODEC<20>
HP_DET<28>
+MIC_BIAS_B <28>
+MIC_BIAS_C <28>MIC_INT_R <28>MIC_INT_L <28>
MIC_SENSE<28>
MUTE_LED_CNTL<32>
A_SD#<32>
PLT_RST# <8,19,23,25,31>
+V DDA_CODEC
+3VS_DVDD
+3VS
+3VS_DVDD +VDDA_CODEC
+V DDA_CODEC
+VDDA_CODEC
+VDDA_CODEC
+VDDA_CODEC
+VDDA_CODEC
+5VS
+5VS
+V DDA_CODEC
+VDDA_CODEC
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA -5221P 1.0
IDT CODEC 92HD75B2
27 47S aturday, July 18, 2009
2007/05/29 2008/05/29Compal Electronics, Inc.
TPA6044 no longer needed. So delete BOM options & co-layoutcomponents for TPA6044. SGND and SGND1 nets can also bedeleted. Only TPA6041 will be supported. 9/5
11/25
Jack MIC
HP Jack
AMP. FOR INTERNAL SPEAKER
Place close to U49
GNDAGND
Internal SPKR.
Internal MIC
0 1 10dB
GAIN0 GAIN1 Av(inv)
0 6dB
15.6dB
21.6dB
0
1
0
1
1
audio ground must be connect to
digital ground with an 80mil copper
bridge located directly under codec
to prevent ESD latch up.
40mils
40mils
3/26 Sense B-->Sense A
3/26 <BOM> R824 100K-->10K
3/26 <BOM> R823 100K-->10K
05/21 Contact to PLT_RST#
05/08 Del reserved R978
4/2 U49 use 92HD75B1X5NLGXYBX8 for HDMI audio
05/08 Remane A_SD#->SPKR_EN
5/8 Del D4 Q11 and R825
Remane A_SD#->MUTE_LED_CNTL
05/08 Add D6 and R981
05/08 Audio request 1u->2.2u
05/08 Q33B on page21
06/19 X5R can pass Audio test
Port A = External HeadphonePort B = External MicPort C = Internal MicPort D = Internal SpeakersPort E = (Unused)
C705 0.022U_0603_25V4Z_X7R1 2
D6
CH751H-40PT_SOD323-2
21
C749 1U_0603_10V6K_X5R12
C752 2.2U_0805_10V_X5R
C709 0.1U_0402_16V4Z1 2
C783220P_0402_50V7K
1
2
C706 0.022U_0603_25V4Z_X7R1 2
C745 1U_0603_16V7_X7R12
C743
1U
_0
60
3_
10
V6
K
1
2
C7100.1U_0402_16V4Z
1 2
R803
100K_0402_5%
@
12
R802
100K_0402_5%
12
C7
35
10
U_
08
05
_6
.3V
_X
5R
1
2
R839
4.7K_0402_5%
12
Q84A
2N7002DW-7-F_SOT363-6
61
2
R8080_0402_5%@
12
R845
BLM18BD601SN1D_060312
Q84B
2N7002DW-7-F_SOT363-6
3
5
4
C780220P_0402_50V7K
1
2
C737 10U_0805_16V6K_X5R
12
C718 0.1U_0805_25V7M12
C747 1U_0603_16V7_X7R12
U 49
92HD75B1X5NLGXYBX8_QFN32_5X5
DVDD_LV1
DMIC0/GPIO129
SPDIF_OUT_1/GPIO728
DMIC_CLK30
HDA_SDO2
HDA_BITCLK3
DVSS4
HDA_SDI5
DVDD_CORE6
HDA_SYNC7
HDA_RST#8
SPDIF_OUT_032
EAPD/GPIO0/SPDIF_OUT 0 or 131
AVDD17
AVSS18
CAP222
VREFFILT19
PORT_A_L26
PORT_A_R27
PORT_B_L13
PORT_B_R14
VREFOUT_B20
PORT_C_L15
PORT_C_R16
VREFOUT_C21
PORT_D_L24
PORT_D_R25
PORT_E_L11
PORT_E_R12
PC_BEEP/MONO9
SENSE_A10
SENSE_B23
TPAD33
C7
41
10
U_
08
05
_6
.3V
_X
5R
1
2
R81610K_0402_5%
12
R823
10K_0402_5%
12
JP18
E-T_3806K-F04N-03R_4P-TC ONN@
11
22
33
44
GND15
GND26
C714
0.1
U_
04
02
_1
6V
7K
1
2
R83433_0402_5%
1 2
R828
20K_0402_1%
12
C738 10U_0805_16V6K_X5R
12
Q33A
TR 2N7002DW-7-F 2N SOT-363
61
2
C748 1U_0603_10V6K_X5R12
C781220P_0402_50V7K
1
2
R835
39.2K_0402_1%
12
C750 1U_0603_10V6K_X5R12
C717 0.1U_0805_25V7M12
U14
TPA6047A4RHBR_QFN32_5X5
LOUT+6
C1N12
SPVDD8
SPKR_LIN-4
SPKR_LIN+3
HPVDD17
ROUT-19
CPVDD9
LOUT-7
SPGND5
SPKR_RIN-1
SPKR_RIN+2
SPVDD18
HPVSS14
CPGND11
ROUT+20
C1P10
CPVSS13
SPGND21
SPKR_EN23
BYPASS24
REG_EN25
SGND28
REG_OUT29
VDD30
GAIN031
GAIN132
TML33
HP_OUTR15
HP_OUTL16
HP_INR26
HP_INL27
HP_EN22
C7420.01U_0402_16V7K
1
2
C753 2.2U_0805_10V_X5R
C75433P_0402_50V8K
@
12
R810100K_0402_5%
1 2
C7
36
10
U_
08
05
_6
.3V
_X
5R
1
2
R826
2.49K_0402_1%
12
R98110K_0402_5%
12
C751 2.2U_0603_10V6K_X5R
1 2
D 17PJSOT05C_SOT23
2 31
C703 0.022U_0603_25V4Z_X7R1 2
R817
10K_0402_5%
12
C711
0.01U_0402_16V7K
1
2
C756 2.2U_0603_10V6K_X5R
1 2
C744
1U
_0
60
3_
10
V6
K
1
2
C719 0.1U_0805_25V7M12
C724
1000P_0402_50V7K_X7R
1
2
D4
CH751H-40PT_SOD323-2
21R81810K_0402_5%
12
C715
0.1
U_
04
02
_1
6V
7K
1
2
C723 0.47U_0603_10V7K_X7R
1 2
C704 0.022U_0603_25V4Z_X7R1 2
R979 0_0402_5%
12
C746 1U_0603_10V6K_X5R12
C725
1000P_0402_50V7K_X7R
1
2
R805 0_1206_5%12
R82410K_0402_5%
12
C716
0.1
U_
04
02
_1
6V
7K
1
2
R806
0_0402_5%
12
C782220P_0402_50V7K
1
2
R827
2.49K_0402_1%
12
C720 0.1U_0805_25V7M12
D18PJSOT05C_SOT23
2 31
R84047_0402_5%@
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4INT_MIC_1_3
INT_MIC_1_4
EXT_MICL_3
MIC_EXT_LEXT_MIC EXT_MIC_1
INT_MIC_2_3
INT_MIC_2_4
HP_OUTLHP_OUTRHP_DET
USB20_N5USB20_P5
SLP_S4#
USB20_P1USB20_N1
USB20_P3USB20_N3
EXT_MIC
INT_MIC_1_2INT_MIC_2_2
INT_MIC_2_2
EXT_MIC
INT_MIC_1_2INT_MIC_2_2
MIC1 <27>
MIC_INT_R<27>
MIC_INT_L<27>
HP_OUTR <27>HP_OUTL <27>
HP_DET <27>
USB20_P5 <21>USB20_N5 <21>
SLP_S4#<8,21,30,34,39>
USB20_N1<21>USB20_P1<21>
USB20_N3<21>USB20_P3<21>
MIC_SENSE <27>
+MIC_BIAS_C<27>
+MIC_BIAS_B<27>
+CODEC_REF
+VDDA_CODEC
+VDDA_CODEC
+VDDA_CODEC
+VDDA_CODEC
+CODEC_REF
+CODEC_REF
+CODEC_REF
+5VALW +5VALW
+3VS
+5VALW+5VALW
+VDDA_CODEC
+VDDA_CODEC
+VDDA_CODEC
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
AMP & Audio Jack
28 47Saturday, July 18, 2009
2007/05/29 2008/05/29Compal Electronics, Inc.
AMP. FOR EXTERNAL MICROPHONE
AMP. FOR INTERNAL MICROPHONE
Place close to U18
USB I/O connx2 , Aduio JACK
Card reader transfer conn
04/03 C726 @-->15P
05/22 33 Del reserved 48MHZ_Clock
R819
10K_0402_5% 1 2
R905120K_0402_5% 1
2
C974
220P_0402_25V8J
1
2
C726 15P_0402_50V8K1 2
U18CTLV2464_TSSOP14
P4
G1
1
OUT8
+10
-9
C707 0.068U_0603_16V7K
1 2
C7
12
0.1
U_
04
02
_1
6V
4Z
1
2
R9022.2K_0402_5%
12
U51
LMV331IDCKRG4_SC70-5~D
P5
IN+1
IN-3
G2
O4
C75968P_0402_50V8J
1
2
C7
84
0.1
U_
04
02
_1
6V
4Z
1
2
R8373K_0402_5%
12
C976
1U_0603_16V6K_X5R
@
1
2
C7
27
10
0P
_0
40
2_
50
V8
J
1
2
R8383K_0402_5%
12
L14HLC0603CSCCR10JT_0603
1 2
C7
30
10
0P
_0
40
2_
50
V8
J
1
2
R903100K_0402_5%
1 2
C7
31
10
0P
_0
40
2_
50
V8
J
1
2
R907
3K_0402_5%@
12
C732 100P_0402_50V8J
@
1 2
C7
13
0.1
U_
04
02
_1
6V
4Z
1
2
R908
3K_0402_5%@
12
R820 10K_0402_5%
1 2C722 0.47U_0402_6.3V6K_X5R
12
C76068P_0402_50V8J
1
2
C7
55
4.7
U_
08
05
_1
0V
4Z
1
2
C76168P_0402_50V8J
1
2
R909
3K_0402_5%@
12
C975
1U_0603_16V7_X7R
@
1
2
JP9
ACES_88242-3001_30PCONN@
1357911131517192123252729
2468
1012141618202224262830
31 32
L15HLC0603CSCCR10JT_0603
1 2
D56
CHN202UPT_SC-70
2 31
R812 100K_0402_5% 1 2
L16HLC0603CSCCR10JT_0603
1 2
U18ATLV2464_TSSOP14
P4
G1
1
OUT1
+3
-2
R906
3K_0402_5%@
12
R84110K_0402_5%
12
U18BTLV2464_TSSOP14
P4
G1
1
OUT7
+5
-6
U18DTLV2464_TSSOP14
P4
G1
1
OUT14
+12
-13
C9731U_0603_10V6K
1
2
R813 100K_0402_5% 1 2
R904560K_0402_5%
12
R814 100K_0402_5%
1 2
C708 0.068U_0603_16V7K
1 2
C734 100P_0402_50V8J
@
1 2
R84210K_0402_5%
12
R82110K_0402_5%
1 2
KSI[0..7]
KSO[0..11]
KSI0
KSI1
KSI5
KSI3
KSI4
KSI2
KSI_D_0
KSI_D_8
KSI_D_9
KSI_D_1
KSI_D_2KSI_D_5
KSI_D_10
KSI_D_11
KSI_D_3
KSI_D_13
KSI_D_12
KSI_D_4
KSI6KSI_D_14
KSI_D_6
ON/OFFBTN_KBC#
KSI_D_12
KSI_D_6
KSO4
KSI_D_4
KSI_D_8
KSO9
KSI_D_5
KSO8
KSI_D_14
KSI_D_9
KSO1
KSO3
KSO11
KSO5
KSI_D_11
KSO10
KSI_D_3
KSO0
KSI_D_0
KSO2
KSI_D_13
KSO6
KSI_D_1
KSI_D_10
KSI7
KSO7
KSI_D_2
KSI_D_12
KSI_D_6
KSO4
KSI_D_4 KSI_D_8
KSI_D_5
KSO8
KSI_D_14
KSI_D_9
KSO1
KSO3
KSO11
KSO5
KSI_D_11
KSO10
KSI_D_3
KSO0
KSI_D_0
KSO2
KSI_D_13
KSO6
KSI_D_1 KSI_D_10
KSI7
KSO7
KSI_D_2
KSO9
LID_SW#STB_LED
ON/OFFBTN# <21>
ON/OFFBTN_KBC# <32>
KSI[0..7]<32>
KSO[0..11]<32>
TP_CLK<32>TP_DATA<32>
LID_SW# <17,21,32>STB_LED <31,32>
AMBER_BATLED# <32>GREEN_BATLED# <32>
CAPS_LED#<18>
+3VALW
+3VL+5VS
+5VS
+3VS
+3VS
+3VL
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
MDC/KBD/ON_OFF/LID
29 47Saturday, July 18, 2009
2005/03/10 2006/03/10Compal Electronics, Inc.
T/P BOARD.Power BTN/LED and Lid switch BD
PS:GND use DC in jack GND
INT_KBD CONN.
12/31 KB LED power
20mil
Pin 1 Pin 1
Dior KB up contact
Pin1 reserve , so net name is reserve for Fossil down contact
DB use
03/28 +3VALW->+3VL
05/16 EMI request Add C1000 C1001
07/13 EMI request Add C1159 C1160
JP22
HRS_FH28-60(30)SB-1SH(86)CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
3131
3232
2525
2626
2727
2828
2929
3030
GND133
GND234
D24
DAP202U_SOT323-3
2
31
C9620.1U_0402_16V4Z
1
2
JP8
ACES_85201-06051
CONN@
GND7
GND8
11
22
33
44
55
66
D25
DAP202U_SOT323-3
2
31
D20
DAP202U_SOT323-3
2
31
CP3
100P_1206_8P4C_50V8K
234 5
6781
CP7
100P_1206_8P4C_50V8K
234 5
6781
C4610.1U_0402_16V4Z
1
2
D28
CH751H-40_SC76
21
R474 100K_0402_5%1 2
C1159
0.1U_0402_16V4Z
1
2
C1000120P_0402_50V8
CP4
100P_1206_8P4C_50V8K
234 5
6781
CP2
100P_1206_8P4C_50V8K
234 5
6781
C1001120P_0402_50V8
D26
DAP202U_SOT323-3
2
31
CP6
100P_1206_8P4C_50V8K
234 5
6781
D22
DAP202U_SOT323-3
2
31
D39
PACDN042Y3R_SOT23-3
231
R893 470_0402_5%1 2
D23
DAP202U_SOT323-3
2
31
CP1
100P_1206_8P4C_50V8K
234 5
6781
C4631U_0603_10V4Z
1
2
R4
72
10
0K
_0
40
2_
5%
12
C1160
0.1U_0402_16V4Z
1
2
CP5
100P_1206_8P4C_50V8K
234 5
6781
JP28
AC
ES
_8
71
51
-04
05
1_
4P
CO
NN
@
1234
56
D21
DAP202U_SOT323-3
2
31
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB20_N0USB20_P0
USB20_N0
USB20_P0
SLP_R
USB20_P6_R
USB20_N6_R
USB20_P6_RUSB20_N6_R
USB20_N0<21>USB20_P0<21>
BT_OFF<21>
SLP_S4#<8,21,28,34,39>
USB20_N6 <21>BT_LED <18>
USB20_P6 <21>
+5VALW
USB_VCCC
+3VAUX_BT+3VALW
USB_VCCC
+3VAUX_BT
+3VAUX_BT
+3VS
+3VALW
+1.5V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
USB & BT Connector
30 47Friday, July 17, 2009
2006/02/13 2006/07/26Compal Electronics, Inc.
160mils
USB CONNECTOR 32A normal with 3.5A Max(1ms)
4A
BT(SoftBreeze) Connector
5/8 Add C995 for GMT request
5/8 Update footprint
05/16 EMI request Add C1002 0.1u cap
05/16 EMI request Add C1003 C1004 C1005 0.1u cap
05/16 EMI request Add C1006 0.1u cap
C1003
0.1U_0402_16V4Z
1
2
R48010K_0402_5%
12
R477 0_0402_5%12
JP32
SUYIN_020173MR004S582ZL_4P-T
CONN@
11
22
33
44
GND5
GND6
GND7
GND8
R475 0_0402_5%12
+
C4
80
15
0U
_B
2_
6.3
VM
_R
45
M
1
2
C1004
0.1U_0402_16V4Z
1
2
C4
81
0.1
U_
04
02
_1
6V
4Z
9.2
1
2
R705
220K_0402_1%
1 2
C1005
0.1U_0402_16V4Z
1
2
C1006
0.1U_0402_16V4Z
1
2
C4
71
0.1
U_
04
02
_1
6V
4Z
1
2
C995
1U_0603_10V4Z
12
C4
72
10
U_
08
05
_1
0V
4Z
1
2
C4
82
10
00
P_
04
02
_5
0V
7K
1
2
U23
G546A1P1UF_SO8
GND1
IN2
EN1#3
EN2#4
OC1#8
OUT17
OUT26
OC2#5
G
DS
Q39SI2301BDS_SOT23
2
13
R628 10K_0402_5%1 2
D55
CM1293A-02SR_SOT143-4@
GND1
IO12
IO23
VIN4
JP29
ACES_87213-0800G_8PCONN@
12345678C1002
0.1U_0402_16V4Z
1
2
D31
CM1293A-02SR_SOT143-4
@
GND1
IO12
IO23
VIN4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SPI_WP#
SPI_HOLD#_0
SPI_SI SPI_SO_R
SPI_WP#
SPI_HOLD#_0_JP34SPI_SO_JP34SPI_SI_JP34SPI_SI
SPI_CLK
8051_RECOVER#
8051_RECOVER#
SPI_CLK_JP34 SPI_CLK_JP34
SPI_CS0#SPI_CS0#_JP34
SPI_CS0#_JP34SPI_SI_JP34
SPI_SO_RSPI_SO_JP34
SIRQ
SPI_HOLD#_0SPI_HOLD#_0_JP34
SPI_CLK
SPI_CS0#
PLT_RST#<8,19,23,25,27>
LPC_AD0<20,32>LPC_AD1<20,32>LPC_AD2<20,32>LPC_AD3<20,32>
VCC1_PWRGD<32,33>
8051RX<32>8051_RECOVER#<32>
LPC_FRAME#<20,32>
CLK_PCI_DB<15>
SPI_CS0#<32>
SPI_CLK<32>
SPI_SI<32> SPI_SO <32> 8051TX<29,32>
SIRQ<21,32>
KBC_SPI_CS1#_R_JP34<32>
PCI_SERR#<19,32>
B+
+3VL
+3VL
+3VL
+3VL
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
TCG/BIOS ROM/PS2/SW LPC DEBUG
31 47Saturday, July 18, 2009
2005/03/10 2006/03/10Compal Electronics, Inc.
BIOS ROM20mils
LPC Debug Port
20mils
20mils
Add SIRQ and connect topin5. 10/08
03/26 HP review Add R964
03/30 Add R970 for PCI_SERR#
04/04 SMT SPI ROM under 43 level
R8994.7_0402_5%
@
12
R507 0_0402_5%1 2
JP34
ACES_87216-2404_24PCONN@
Ground1
LPC_PCI_CLK2
Ground3
LPC_FRAME#4
+V3S5
LPC_RESET#6
+V3S7
LPC_AD08
LPC_AD19
LPC_AD210
LPC_AD311
VCC_3VA12
PWR_LED#13
CAPS_LED#14
NUM_LED#15
VCC1_PWRGD16
SPI_CLK17
SPI_CS#18
SPI_SI19
SPI_SO20
SPI_HOLD#21
Reserved22
Reserved23
Reserved24
R632 0_0402_5%1 2
R506 0_0402_5%@1 2
R504 0_0402_5%1 2
&U1
MX25L1605AM2C-12G_SO8-200mil
@
C969680P_0402_50V7K
@
1
2
R501 3.3K_0402_5%1 2
C496
0.1U_0402_16V4Z
1
2
R5
00
10
0K
_0
40
2_
5%
12
R502 15_0402_5%
1 2
R505 3.3K_0402_5%1 2
R846 0_0402_5%1 2
R503 0_0402_5%12
R964
10K_0402_5%@
12
R970 0_0402_5%1 2
U25
16M MX25L1605DM2I-12G SOP 8P
S1
VCC8
Q2
HOLD7
VSS4
D5
C6
W3
AB1B_DATA
SMB_EC_CK1
AB1B_CLKSMB_EC_DA1
RUNSCI_EC#
PGD_IN
KSI3KSI0
ADP_PRES
PS2_CLK
PM_PWROK
THM_TRAVEL#
KBC_PWR_ON
KBC_SPI_CS1#_R
TP_DATA
KSO6
SMB_EC_CK1
KSO1KSO0
EA#
TEST
KSO11
KBC_SPI_CS1#_R
ADP_PS0
KSO3
AB1B_CLK
VCC1_PWRGD
KSO4
8051_RECOVER#
GREEN_BATLED#
KSO7
PGD_IN
KSO9
KSO2
PWR_GD
AB1B_DATA
CLK_PCI_EC
KSO10
AMBER_BATLED#CR Y2CR Y1
KSO8
SMB_EC_DA1
PS2_CLK
KBC_PWR_ON
TP_CLK
KSO5
32K_CLK
PS2_DATAADP_PRES
RUNSCI_EC#
PM_RSMRST#
THM_TRAVEL#
KBRST#
ADP_ID
CLK_14M_KBC
ADP_PS1
ADP_PS0
ADP_PS1
ADP_ID
KSI2KSI1
KSI5
KSI0KSI1
KSI3KSI4
KSI6
KSI2
KSI7
KSI7KSI6KSI5KSI4
TP_CLKTP_DATA
PS2_DATA
APP_BUTTON_1APP_BUTTON_2
SP_CLKSP_DATA
SP_CLKSP_DATA
AC_AND_CHG
WL_BLUE_BTN
APP_BUTTON_2APP_BUTTON_1WL_BLUE_BTN
8051RX <31>
KB_RST# <20>
KSO[0..11]<29>
KSI[0..7]<29>
TP_CLK<29>
TP_DATA<29>
SIRQ<21,31>
LPC_AD3<20,31>
LPC_AD0<20,31>
LPC_AD2<20,31>LPC_AD1<20,31>
LPC_FRAME#<20,31>
PM_CLKRUN#<21>
CLK_PCI_EC<15>RUNSCI_EC#<21>
NPCI_RST#<21>
PM_PWROK <8,21,42>ADP_EN <43>
KBC_SPI_SI_R<21>
KBC_SPI_CS0#_R<21>
KBC_SPI_CLK_R<21>SPI_CLK<31>
SPI_CS0#<31>
SPI_SO<31>
SPI_SI<31>
LID_SW# <17,21,29>
A_SD# <27>
CLK_14M_KBC <15>
PM_RSMRST# <21>
KBC_SPI_SO<21>
CELLS <37>
KBC_SPI_CS1#_R <21>KBC_SPI_CS1#_R_JP34<31>
ADP_PRES <21,23,36,37>
MUTE_LED_CNTL <27>
CHGCTRL <37>
AMBER_BATLED# <29>
FAN_PWM <4>
VCC1_PWRGD <31,33>
GATEA20 <20>
GREEN_BATLED# <29>
PWR_GD <33,42>
SLP_S3# <21,23,33,34,37,38,40,41,43>
KBC_PWR_ON <38>
SMB_EC_DA1 <36>
BAT_PWM_OUT <37>
8051TX <29,31>
ON/OFFBTN_KBC# <29>
PCI_SERR# <19,31>
BAT_ID# <36>
SMB_EC_CK1 <36>
8051_RECOVER# <31>
STB_LED <29,31>
APP_BUTTON_1 <18>APP_BUTTON_2 <18>
ADP_ID <43>
ADP_PS0 <43>
ADP_PS1<43>
CAPS_LOCK_KBC <18>
AC_AND_CHG <36,37>
WL_BLUE_BTN <18>
+3VS
+5VS
+3VL
+3VL
+3VL
+3VL
+3VL
+3VS
+3VL
+3VL
+3VL
+3VL
+3VL
+3VL
+5VS
+3VL
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
KBC1091
32 47Saturday, July 18, 2009
2006/02/13 2006/07/26Compal Electronics, Inc.
Modify in 2/23.
03/25 <BOM> R521 ->@
03/02added for CAPS LOCK function
03/25<BOM> R723->@
03/30 PCI_RST#-->NPCI_RST#
05/08 R517->@ and reamne EAPD->MUTE_LED_CNTL
05/08 Remane A_SD->A_SD#
0709 ESD request
R531 1K_0402_5%1 2
R872 10K_0402_5%1 2
R729 10K_0201_5% @
1 2
R6330_0402_5%
1 2
C5000.1U_0402_16V4Z
1
2
R900 10K_0402_5%1 2
R728 10K_0402_5%1 2
R730 10K_0402_5%1 2
D33CH751H-40_SC76
21R867 10K_0402_5%1 2
R869 10K_0402_5%1 2
R882 100K_0402_5%1 2
R545 0_0402_5%1 2
R535 10_0402_5% @1 2
R604 10K_0402_5%1 2
C5010.1U_0402_16V4Z
1
2
C5
06
33
P_
04
02
_5
0V
8J
1
2
R532
10K_0402_5%
1 2
R862 10K_0402_5%1 2
C1
00
80
.1U
_0
40
2_
16
V4
Z
1
2
R521
10K_0201_5%
@
1 2
C9720.1U_0402_16V4Z
1
2
R523 2.2K_0402_5%1 2
R533
10K_0402_5%
1 2
R868 10K_0402_5%1 2
R874 4.7K_0402_5%
12
C339
4.7U_0805_10V6K
@
1
2
C1
00
90
.1U
_0
40
2_
16
V4
Z
1
2
R883 100K_0402_5%1 2
R901 10K_0402_5%1 2
R863 10K_0402_5%1 2
C1
01
00
.1U
_0
40
2_
16
V4
Z
1
2
R870 10K_0402_5%1 2
C4
98
0.1
U_
04
02
_1
6V
4Z
1
2
R875 4.7K_0402_5%
12
C4990.1U_0402_16V4Z
1
2
R543 1.2K_0402_5%12
R52410K_0402_5%
1 2
Y5
32.768KHZ_12.5PF_9H03200413
OS
C4
OS
C1
NC
3
NC
2
R538 100K_0402_5%1 2
R873 4.7K_0402_5%
12
C9710.1U_0402_16V4Z
1
2
R536 1K_0402_5%1 2
R864 10K_0402_5%1 2
R876 4.7K_0402_5%
12
R884 100K_0402_5%1 2
R62210K_0402_5%1 2
R865 10K_0402_5%1 2
R723 10K_0201_5%
@
1 2
R517 0_0402_5%@
1 2
R847 0_0402_5%1 2
R320 100K_0402_5%1 2
C5
07
33
P_
04
02
_5
0V
8J
1
2
R871 10K_0402_5%1 2
R866 10K_0402_5%1 2
C505 10P_0402_25V8K @1 2
C504 4.7U_0805_10V6K1 2
C970 0.1U_0402_16V4Z12
R861 10K_0402_5%1 2
C503
4.7U_0805_10V4Z
12
C5020.1U_0402_16V4Z
1
2
General Purpose I/O Interface
Keyboard/Mouse Interface
LPCBus
Power Mgmt/SIRQ
Miscellaneous
Access Bus Interface
SMSC_1091-NU_TQFP-128P
U26
KBC1091-NU_TQFP128_14X14
AG
ND
72
KSO021
KSO120
KSO219
KSO318
KSO417
KSO516
KSO613
KSO712
KSO810
KSO99
KSO108
KSO117
KSO12/GPIO00/KBRST6
KSO13/GPIO185
KSI029
KSI128
KSI227
KSI326
KSI425
KSI524
KSI623
KSI722
IMCLK35
IMDAT36
KCLK38
KDAT40
EMCLK41
EMDAT42
CLKRUN#55
SER_IRQ57
PCI_CLK54
EC_SCI#76
LAD[3]51
LAD[2]50
LAD[1]48
LAD[0]46
LFRAME#52
LRESET#53
LPCPD#/GPIO2345
XTAL170
XTAL271
VC
C1
14
TEST PIN69
VS
S1
1
VS
S3
7
VS
S4
7
VS
S5
6
VS
S1
04
VS
S8
2
VS
S1
17
VC
C1
39
VC
C1
58
VC
C1
84
VC
C1
10
6
VC
C1
11
9
VC
C2
49
OUT0124
OUT1/IRQ8#125
OUT7/SMI#123
OUT8/KBRST122
OUT9/PWM2121
OUT10/PWM0120
OUT11/PWM1118
GPIO0279
GPIO0380
GPIO04/KSO1481
GPIO05/KSO1583
GPIO07/PWM385
GPIO08/RXD86
GPIO09/TXD87
GPIO11/AB2A_DATA88
GPIO12/AB2A_CLK89
GPIO13/AB2B_DATA90
GPIO14/AB2B_CLK91
GPIO15/FAN_TACH192
GPIO16/FAN_TACH2101
GPIO17/A20M102
GPIO20/PS2CLK103
GPIO21/PS2DAT105
AB1A_DATA111
AB1A_CLK112
AB1B_DATA109
AB1B_CLK110
PGM Strap/GPIO2573
GPIO01107
EA Strap#/GPIO26/KSO17108
CLOCKI59
32KHZ_OUT/GPIO2275
RESET_OUT#/GPIO0660
PWRGD78
VCC1_PWRGD77
24MHZ_OUT/GPIO19/WINDMON61
GPIO24/KSO164
GPIO2774
DMS_LED#/GPIO10116
BAT_LED#113
PWR_LED#/8051TX115
FDD_LED#/8051RX114
GPIO401
HSTCLK2
FLCLK3
GPIO3930
HSTCS1#31
FLCS1#32
GPIO3833
GPIO3734
NC43
NC44
GPIO3662
GPIO3563
GPIO3464
GPIO3365
NC66
NC67
HSTDATAIN94
FLDATAIN95
HSTCS0#96
FLCS0#97
HSTDATAOUT127
FLDATAOUT128
CAP15
GPIO2893
GPIO2998
GPIO3099
GPIO31100
GPIO32126
VCC068
2VREF_393
2VREF_393PWR_GD <32,42>
VCCP_PG<40>
VCC1_PWRGD <31,32>
SLP_S3# <21,23,32,34,37,38,40,41,43>
DDR3_PG<8,39>
+5VALW
+5VALW
+5VS
+3VS
+0.75VS
+3VL+3VL
2VREF_51125
+3VS
+1.5VS
+1.8V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
POK CKT
33 47Saturday, July 18, 2009
2005/05/26 2006/07/26Compal Electronics, Inc.
WWAN Card STANDOFF CPU support
WWLAN Card STANDOFF
05/12 Update P/N
07/16 Update screw hole
R556 10K_0402_5% 12
H12HOLEA
1
R562 1M_0402_5%
12
U37
SN74AHCT1G125GW_SOT353-5
A2
Y4O
E#
1G
3P
5
H6HOLEA
1
FM1
1
R386 3.3K_0402_5%@
1 2
H7HOLEA
1
H5HOLEA
1
H8HOLEA
1
H10HOLEA
1
R56128K_0402_1%@
12
C5231000P_0402_50V7K
1
2R478
11.5K_0402_1%1 2
H13HOLEA
1
R9540_0402_5%
@
1 2
H11HOLEA
1
H2HOLEA
1
H1HOLEA
1
R5511M_0402_5%
12
R566 75K_0402_1%1 2
R560 3.3K_0402_5%
1 2
H14HOLEA
1
H3HOLEA
1
R558 34.8K_0402_1%12
R56730.1K_0402_1%
12
H15HOLEA
1
R55310K_0402_5%
12
U30A
LM393M_SO8
+3
-2
O1
P8
G4
C5270.033U_0402_16V7K
12
FM3
1
J6 SHORT PADS1 2
H4HOLEA
1
U30B
LM393M_SO8
+5
-6
O7
P8
G4
H16HOLEA
1
H17HOLEA
1
FM4
1
D43 CH751H-40_SC762 1
R962 41.2K_0402_1%1 2
FM2
1
H19HOLEA
1
R555 76.8K_0402_1%12
R564 3.3K_0402_5% 1 2
R479 49.9K_0402_1%12
R963 34K_0402_1%1 2
H9HOLEA
1
R59123.7K_0402_1%
12
C215
0.1U_0402_16V4Z
1
2
R565 10K_0402_5% 12
C5263300P_0402_50V7K
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
RUNON
SLP_S3
SLP_S3 SLP_S3SLP_S3
RUNON
SLP_S3
RUNON
SLP_S3#
SLP_S3
SLP_S4#
SLP_S4#<8,21,28,30,39> SLP_S3#<21,23,32,33,37,38,40,41,43>
+5VS+5VALW
+3VS +5VS
+3VS+3VALW
+0.75VS
B+
+3VL
+3VL
+1.5VS+1.5V
+3VALW+1.8V
+1.5VS
+1.8V+1.5V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P 1.0
DC/DC Circuits
34 47Friday, July 17, 2009
2006/02/13 2006/07/26Compal Electronics, Inc.
Discharge circuit-1
+5VALW to +5VS Transfer
+3VALW to +3VS Transfer
+1.5V to +1.5VS Transfer
VOUT=1.25(1+R912/R913)
VOUT=1.25(1+47k/100k)=1.83V
03/25 <BOM> R912_100k->47K, R913_215k->100K, C983->@,C985 22u->10u
03/28 Add R969 for SLP_S4#
05/08 Add C996 for GMT request
05/08 Del reserved R914
5/16 Q91B on page 18
5/22 Del 1.8V discharge circuit
07/07 Reserved R995
20mil 20mil
R578330K_0402_5%
12
G
D
S
Q57
RHU002N06_SOT323
@
2
13
R587
470_0402_5%
12
C5
40
10
U_
08
05
_1
0V
4Z
1
2
G
D
S
Q95
2N7002_SOT23-32
13
C54610U_0805_10V4Z
1
2
C9
78
0.1
U_
04
02
_1
6V
7K
1
2
U52
G916-390T1UF_SOT23-5
IN1
GND2
SHDN3
OUT5
BYP4
C5
39
0.1
U_
04
02
_1
6V
4Z
1
2
R911
0_0402_5%
1 2
R582100K_0402_5%
12
R969
0_0402_5%
@1 2
R994
330K_0402_5%
1 2
C9
80
10
U_
08
05
_6
.3V
4K
1
2
C9
79
0.1
U_
04
02
_1
6V
7K
1
2
Q91A
TR 2N7002DW-7-F 2N SOT-363
61
2
R592
470_0402_5%
12
Q59A
2N7002DW-7-F_SOT363-6
61
2
U36SI4800DY_SO8
S1
S2
S3
G4
D8
D7
D6
D5
R589
470_0402_5%
12
R912
47K_0402_1%
12
C98510U_0805_6.3V6M
12
U35SI4800DY_SO8
S1
S2
S3
G4
D8
D7
D6
D5
C996
1U_0603_10V4Z
12
C9
77
10
U_
08
05
_6
.3V
4K
1
2
C5
45
0.1
U_
04
02
_1
6V
4Z
1
2
Q52A
2N7002DW-7-F_SOT363-6
61
2
Q59B
2N7002DW-7-F_SOT363-6
3
5
4
R913100K_0402_1%
12
R579470_0402_5%
12
C5410.01U_0402_25V7K
1
2
R995
0_0402_5%
@
1 2
C54410U_0805_10V4M
1
2
Q52B
2N7002DW-7-F_SOT363-6
3
5
4
R583100K_0402_5%
@
12
R910
0_0402_5%
1 2
R586
470_0402_5%
12
Q42AO4430 1N SOIC-8
365
78
2
4
1
C53810U_0805_10V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
POWER BLOCK DIAGRAM
35 45Friday, July 17, 2009
Page41
TPS51117DC/DC (1.05V)
EN1
Page45
ISL6263DC/DC (VGA_CORE)
B+
G2992
Page42
+0.75VP 2A
Page40SLP_S3#
+1.05VCCP 8A
Page47
Switch
B+
TPS51117DC/DC (1.5V)
51125_PWR
ACAdapterin
TPS51125DC/DC (3V/5V)
ISL6266ACRZ-TDC/DC (CPU_CORE)
+3VALWP 3A
+5VALWP 4.5A
CPU_CORE (ICCDES=18A)
VDD VR_ON
PWR_GD+5VALW
BQ24740Charger
2VREF_51125
B+
B+
B+
+1.5VP 8A
VGA_COREP 5A
VIN
SWITCHADP_EN#
GFXVN_EN
EN0
SLP_S4# EN_PSV
Battery
LM393ThermalProtector
Page37
Page41
Page39
Page39
EN0
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
SMB_EC_CK1
SMB_EC_DA1
A DPIN
EC_SMDEC_SMC
SMB_EC_CK1 <32>
SMB_EC_DA1 <32>BAT_ID# <32>
ADP_SIGNAL <43>
ADP_PRES
AC_AND_CHG
EN0<4>
VIN
VMBBATT_1
+3VL
+3VL
+3VL
BATT
+3VL
VL
2VREF_51125
2VREF_51125
VL
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P LPSV
DCIN/BATT/CPU OTPCustom
36 45Friday, July 17, 2009
2005/03/10 2006/03/10Compal Electronics, Inc.
5/11 HP review
Add reserved PH1 circuit
1/13 PCN1 ping 5 and 6 should be
connected to GND, and ping 4 is
ideally connect to ADPIN to have
more power delivery.
[0331] For Airline adapter
Recovery at 47 +-3 degree C
CPU
CPU thermal protection at 90 +-3 degree C
PH1 under CPU botten side :
PQ1AO4435L_SO8
3 65
78
2
4
1
PC
41
00
0P
_0
40
2_
50
V7
K
12
PD
3B
AV
99
WT
1G
_S
C7
0-3
2 31
PH1100K_0603_1%_TSM1A104F4361RZ
12
PR9100_0402_5%
12
PR
10
37
.4K
_0
40
2_
1%
12
PR
14
47
0K
_0
40
2_
5%
12
PC
9@
10
0P
_0
40
2_
50
V8
J
12
PL1
HCB2012KF-121T50_0805
1 2
PD
2B
AV
99
WT
1G
_S
C7
0-3
2 31
PR7
75K_0402_1%
1 2
PR
12
4.7
K_
04
02
_5
%
12
PQ2A
2N7002KDWH-2N_SOT363-6
61
2
PCN2SUYIN_200275MR005G187ZR
1 1
3 3
4 4
5 5
GND 6
GND 7
2 2
PU103B
LMV393DR2G_SO8
+5
-6O 7
P8
G4
PCN1
ACES_87302-0441
1 1
3 34 4
GND 5
2 2
GND 6
G
D
S
PQ4SSM3K7002FU_SC70-3
2
13
PC
70
.01
U_
04
02
_5
0V
7K
12
PR
62
10
K_
04
02
_1
%
12
PC
11
00
P_
04
02
_5
0V
8J
12
PR15
150K_0402_1%
12G
D
S
PQ
3S
SM
3K
70
02
FU
_S
C7
0-3
2
13
PR2
470K_0402_1%
1 2
PL3HCB2012KF-121T50_0805
1 2
PC
8@
10
0P
_0
40
2_
50
V8
J
12
PC
61
00
0P
_0
40
2_
50
V7
K
12
PD
4B
AV
99
WT
1G
_S
C7
0-3
2 31
PC121000P_0402_50V7K
12
PR
1@
15
K_
04
02
_5
%
12
PR11
470K_0402_5%
12
PC
10
@1
00
P_
04
02
_5
0V
8J
12
PD
5PJS
OT
24
CH
_S
OT
23
-3
231
PU174LVC1G14GW_SOT353-5
A 2Y4
P5
NC
1
G3
PR
41
K_
04
02
_1
%
12
PQ
2B
2N
70
02
KD
WH
-2N
_S
OT
36
3-6
34
5
PC
31
00
P_
04
02
_5
0V
8J
12
PC
11
0.1
U_
06
03
_2
5V
7K
12P
D6P
JS
OT
24
CH
_S
OT
23
-3
231
PR5
150K_0603_1%
1 2
PL2
HCB2012KF-121T50_0805
1 2
PR
81
00
_0
40
2_
5%
12
PR3
100K_0402_5%
12
PD1@PJSOT24C_SOT23-3
2 31
PR13220K_0402_5%
12
PC
5@
10
0P
_0
40
2_
50
V8
J
12
PC
21
00
0P
_0
40
2_
50
V7
K
12
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
DL_CHG
DH_CHG
LX_CHG
CHGEN#
CHGEN#
REGNVADJ
BA
TT
AC_AND_CHG
C HG
CHGCTRL
ACDET
ACDETACDET
ACPA CN
A CNACP
IADAPT
BST_CHG
ADP_PRES <21,23,32>
CHGCTRL <32>
BATCAL#
ADP_EN# <43>
BAT_PWM_OUT<32>
SRSET <43>
CELLS<32>
IADAPT
AC_AND_CHG
SLP_S3#
<21,23,25,27,32,33,34,38,40,41,42,43>
VIN
BATT
P2
+3VL
VL
CHG_B+
B+P2
P2
P2
BQ24740VREF
+3VL
BQ24740VREF
+3VL
+3VL
+3VL
B+
CHG_B+
2VREF_51125
2VREF_51125
VL
P2BATT
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P LPSV 0.1
Charger
37 45Friday, July 17, 2009
2007/05/29 2008/05/29Compal Electronics, Inc.
Charge Detector
High 17.588
Low 16.624
AC Detector
High 13.19
Low 10.798
2007/9/27
Note: X7R type
12/30 HP review
Del this circuit
12/30 HP review
2VREF_8734-->2VREF_51125
12/30 HP review
2VREF_8734-->2VREF_51125
1/12 Update
for EMI&ESD.
For Airline adapter
4/01 Change for AC
detector setting
7/17 Change from
0.1uF to 10uF.
7/17 Change from
22.6k to 43.2k
PC
10
44
.7U
_0
80
5_
25
V6
-K
12
G
D
S
PQ107SSM3K7002FU_SC70-3
2
13
PR119
255K_0402_1%
1 2
PC1221U_0603_6.3V6M
12
PR1370_0402_5%
1 2
PR117 210K_0402_1%12
PD100RLS4148GTE-11 LL34-2
1 2
PQ100P1403EVG 1P SO8
3 65
78
2
4
1
PQ101AO4435L_SO8
365
78
2
4
1
PR1040_0402_5%
12
PL100HCB2012KF-121T50_0805
1 2
PC1100.1U_0402_10V7K
1 2
PU103A
LMV393DR2G_SO8
+3
-2O 1
P8
G4
G
D
S
PQ108SSM3K7002FU_SC70-3
2
13
PC
11
54
.7U
_0
80
5_
25
V6
-K
12
PR12611.3K_0402_1%
1 2
PU102BLM393DR_SO8
+5
-6O 7
P8
G4
PC
11
24
.7U
_0
80
5_
25
V6
-K
12
PC1091U_0805_25V6K
1 2
PC
12
7@
4.7
U_
08
05
_2
5V
6-K
12
PC1161U_0603_6.3V6M
12
G
D
S
PQ103SSM3K7002FU_SC70-3
2
13
PC
10
8
0.1
U_
06
03
_5
0V
7K
12
PC1111U_0603_6.3V6M
1 2
PR107150K_0402_5%
12
PR129
10K_0603_0.1%
12
PC
12
6@
68
0P
_0
60
3_
50
V8
J
12
PQ105DMN3031LSS-13 1N SOP-8L
365 7 8
2
4
1
PR
12
04
70
K_
04
02
_5
%
12
PR1150_0402_5%
1 2
PD1021SS355_SOD323-2
12
PR14124K_0402_1%
12
PR118147K_0402_1%
12
PR108
0_0402_5%
1 2
PR124200K_0402_1%
12
PC1170.1U_0402_10V7K
1 2
PD101RLS4148GTE-11 LL34-2
12
PR143100K_0402_5%
12
PR110
453K_0402_1%1
2
PQ102AO4435L_SO8
3 65
78
2
4
1
PR1270_0402_5%
1 2
PR1090.01_1206_1%
1 2
PC
10
34
.7U
_0
80
5_
25
V6
-K
12
PR101
56K_0402_1%
1 2
PU102ALM393DR_SO8
+3
-2O 1
P8
G4
PR103150K_0402_5%
12 PR106
10_0805_1%
1 2
PC119100P_0402_50V8J
12
PR114
100K_0402_5%
12
PR
13
9@
4.7
_1
20
6_
5%
12
PR1421M_0402_5%
1 2
PR130100K_0402_1%
12
PR13310K_0402_5%
12
[email protected]_0603_25V7K
12
PR1121M_0402_1%
12 PR113
43.2K_0402_1%
12
PC101
1U_0603_6.3V6M
1 2
G
D
S
PQ104SSM3K7002FU_SC70-3
2
13
PR105
220K_0402_5%
12
PR135100K_0402_1%
12
PR125
22K_0402_5%
12
PC100
0.1U_0603_25V7K
1 2
PR100200K_0402_5%
1 2
PC1251000P_0402_50V7K
1 2
PC1181U_0603_10V6K
12
PR13141.2K_0402_1%
12
BQ24740RHDR_QFN28_5X5PU100
AC
P3
LP
MD
4
CH
GE
N1
AC
N2
AC
DE
T5
AC
SE
T6
IADSLP8
SR
P19
BA
T17
IAD
AP
T15
PGND 22
SR
SE
T16
ISYNSET14
VADJ12
VDAC11
LP
RE
F7
VREF10
DP
MD
ET
21
LODRV 23
CE
LLS
20
SR
N18
AGND9
REGN 24
EXTPWR13
PH 25
HIDRV 26
BTST 27
PVCC 28
TP 29
PR12375K_0402_1%
12
PQ106AO4468L_SO8
365 7 8
2
4
1
PC
11
34
.7U
_0
80
5_
25
V6
-K
12
PC
10
24
.7U
_0
80
5_
25
V6
-K
12
PC
11
44
.7U
_0
80
5_
25
V6
-K
12
PR12210K_0402_5%
1 2PR121
270K_0402_1%
1 2
PU10174LVC1G14GW_SOT353-5
A2 Y 4
P5
NC
1
G3
PC1200.1U_0603_50V7K
12
PC12410U_0805_10V6K
12
PR136100K_0402_1%
12PL101
10UH +-20% #919AQ-H-100M=P3 5.3A
1 2
PC1230.047U_0402_16V7K
12
PR140
23.7K_0402_1%
12
PR111422K_0402_1%
1 2
PR102200K_0402_5%
1 2
PR1281K_0402_5%
1 2
PR1380_0402_5%
1 2
PC1070.01U_0402_16V7K
12
PR116 0_0402_5%
1 2
PR
13
24
70
K_
04
02
_5
%
12
[email protected]_0603_25V7K
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
BST_5V
LX_5V
LG_3V
LX_3V
UG_3V UG_5V
BST_3V
EN
TR
IP2
EN
TR
IP1
LG_5V
UG1_3V
EN0
EN
TR
IP1
EN
TR
IP2
KBC_PWR_ON <32>
RPGOOD <21>SLP_S3#<21,23,25,27,32,33,34,37,40,41,42,43>
MAINPWON <4>
EN0 <4>
B++
+5VALWP
+5VLP
+3VALWP
B++
B++
2VREF_51125
B+
+3VL+3VLP
+3VLP
2VREF_51125
VL
+5VALWP
+3VALW
+5VALW
+3VALWP
VL+5VLP
+3VL
B++
+3VALWP +5VALWP
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P LPSV 0.1
3.3VALWP/5VALWPCustom
38 45Friday, July 17, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
(4.5A,180mils ,Via NO.= 9)
(3A,120mils ,Via NO.= 6)
7/14 Add one more
pull low resistance.
7/14 Change Cap
form 0.22uF to 1uF,
7/14 Add one more
cap for HP request.
7/16 Change from
22uF to 10uF.
PQ301SIS412DN-T1-GE3 1N POWERPAK1212-8
35
2
4
1
PC3001U_0603_16V7
12
PQ304A
2N7002KDWH-2N_SOT363-6
61
2
PR3190_0402_5%
1 2
PR321100K_0402_1%
12
PC
30
62
20
0P
_0
40
2_
50
V7
K
12
PC
30
2
22
00
P_
04
02
_5
0V
7K
12
PR3080_0402_5%
1 2
PL300HCB2012KF-121T50_0805
1 2
PQ303AO4712L 1N SO8
4
7 865
123
PC314@680P_0603_50V8J
12
+ PC301@100U_25V_M
1
2
PQ304B
2N7002KDWH-2N_SOT363-6
34
5
PC3110.1U_0402_10V7K
1 2
PR320@0_0402_5%
1 2
PC
31
81
0U
_0
80
5_
10
V6
K
12
PL3014.7UH_MSCDRI-74D-4R7M-E_4A_20%
12
PR318330K_0402_5%
12
PC315@680P_0603_50V8J
12
PL30210UH +-20% #919AQ-H-100M=P3 5.3A
1 2
PR304105K_0402_1%
1 2
PC
30
74
.7U
_0
80
5_
25
V6
-K
12
[email protected]_1206_5%
12
PQ302AO4468L_SO8
36 578
2
4
1
PR3160_0402_5%
1 2
PQ300SIS412DN-T1-GE3 1N POWERPAK1212-8
35
2
4
1
PJP303
PAD-OPEN 2x2m
2 1
PR313@0_0402_5%
1 2
PR30320K_0402_1%
1 2
PR3090_0402_5%
1 2
PJP300
PAD-OPEN 4x4m
1 2
PC
30
3
0.1
U_
04
02
_2
5V
6
12
G
D
S
PQ305SSM3K7002FU_SC70-3
2
13
PR30220K_0402_1%
1 2
PC
31
71
0U
_0
80
5_
10
V6
K12
PR317100K_0402_5%
1 2
PR3121M_0402_1%
1 2+PC312150U_B2_6.3VM_R45M
1
2
PC310 0.1U_0402_10V7K
1 2PR306 0_0402_5%
1 2
PR315191K_0402_1%
12
PJP301
PAD-OPEN 4x4m
1 2
PR305115K_0402_1%
1 2
PD300@1SS355_SOD323-2
12
PC
30
50
.1U
_0
40
2_
25
V6
12
PC
30
44
.7U
_0
80
5_
25
V6
-K
12
PR30013.7K_0402_1%
1 2
PR3070_0402_5%
1 2
PC
30
84
.7U
_0
80
5_
25
V6
-K
12
PR30130.9K_0402_1%
1 2
PR314@100K_0402_5%
12
PU300
TPS51125RGER_QFN24_4X4
VR
EF
3
TO
NS
EL
4
EN
TR
IP1
1
VF
B1
2
VF
B2
5
EN
TR
IP2
6
VREG38
DRVL1 19
VR
EG
517
GN
D15
VBST1 22
VIN
16
SK
IPS
EL
14
DRVL212
LL211
VO27
DRVH210 DRVH1 21
PGOOD 23
LL1 20
VC
LK
18
VBST29
VO1 24
EN
013
P PAD25
PJP302
PAD-OPEN 2x2m
2 1
+
PC313150U_B2_6.3VM_R45M
1
2
PC30910U_0805_6.3V6M
12
PC3160.1U_0603_25V7K
12
[email protected]_1206_5%
12
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
+5VALW
BST_1.8V
UG1_1.5V
LG_1.5V
+5VALW
LX_1.5V
UG_1.5V
SLP_S4#<21,34>
DDR3_PG <33>
+1.5VP
+1.5VP
B+
+5VALW
+1.5VP
+1.5V_B+
+1.5VP +1.5V
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P LPSV 0.1
1.5VP
39 45Friday, July 17, 2009
2008/10/31 2009/10/31Compal Electronics, Inc.
(3A,120mils ,Via NO.= 6)
PR407 4.12k -> 10k;1.8VP ->1.5V
PC4094.7U_0805_6.3V6K
12
PC4050.1U_0402_10V7K
1 2
PC
40
34
.7U
_0
80
5_
25
V6
-K
12
PU400
TPS51117RGYR_QFN14_3.5x3.5
VOUT3
V5FILT4
EN
_P
SV
1
TON2
VFB5
PGOOD6 DRVL 9
DRVH 13
LL 12
GN
D7
PG
ND
8
TRIP 11
V5DRV 10
VB
ST
14
TP
15
PQ401
AO4710L 1N SO84
7 865
123
PR404 0_0402_5%1 2
PL4012.2UH_PCMC063T-2R2MN_8A_20%
1 2
PC
40
20
.1U
_0
40
2_
25
V6
12
PC408@10P_0402_50V8J
1 2
PQ400DMN3031LSS-13 1N SOP-8L
365 7 8
2
4
1
PC
40
44
.7U
_0
80
5_
25
V6
-K
12
PR407 10K_0402_1%
1 2
[email protected]_0402_16V7K
12
[email protected]_1206_5%
12
PR405316_0402_1%
1 2
PC4061U_0603_10V6K
12
PR402
255K_0402_1%
1 2
PR4032.2_0402_5%
1 2
PC4074.7U_0805_10V6K
12
PR4010_0402_5%
1 2
PL400
HCB1608KF-121T30_0603
1 2
PC411@680P_0603_50V8J
12PR409
10K_0402_1%
12
PR4000_0402_5%
1 2
+
PC410220U_B2_2.5VM_R25M
1
2
PC
40
12
20
0P
_0
40
2_
50
V7
K
12
PR406 12.4K_0402_1%1 2
PJP400
PAD-OPEN 4x4m
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+5VALW
LX_VCCP
L G_VCCP
UG_ VCCP
+5VALW
UG 1_VCCP
BST_VCCP
SLP_S3#<21,23,25,27,32,33,34,37,38,41,42,43>
VCCP_PG <33>
+1.05VCCP +VCCP
+1.05VCCP
+1.05VCCP
B+
+5VALW
+1.05VCCP
VCCP_B+
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P LPSV 0.2
1.05VCCP
40 45Fr iday, July 17, 2009
2006/11/23 2007/11/23Compal Electronics, Inc.
(8A,120mils ,Via NO.= 6)
P R5110_0402_5%
1 2
PR524255K_0402_1%
1 2
PR503
4.02K_0402_1%
1 2
PC
50
7@
4.7
U_
08
05
_2
5V
6-K
12PC511
0.1U_0402_10V7K
1 2
PL501
HCB1608KF-121T30_0603
1 2
PQ504AO4468L_SO8
365 7 8
2
4
1
PL5032.2UH_PCMB061H-2R2MS_6A_20%
1 2
PC526@10P_0402_50V8J
1 2
P R50410K_0402_1%
12
P C5191U_0402_6.3V6K
12
PQ502DMN3031LSS-13 1N SOP-8L
365 7 8
2
4
1
PR518316_0402_1%
1 2
PC
50
42
20
0P
_0
40
2_
50
V7
K
12
PJP500
PAD-OPEN 4x4m
1 2
PC
50
64
.7U
_0
80
5_
25
V6
-K
12
P R516
2K_0402_5%
12
PR5092.2_0402_5%
1 2
P U501
TPS51117RGYR_QFN14_3.5x3.5
VOUT3
V5FILT4
EN
_P
SV
1
TON2
VFB5
PGOOD6
DRVL9
DRVH13
LL12
GN
D7
PG
ND
8
TRIP11
V5DRV10
VB
ST
14
TP
15
P C5201U_0603_10V6K
12
PC517680P_0603_50V8J
12
PC
50
50
.1U
_0
40
2_
25
V6
12
PR519 0_0402_5%1 2
P R517 12.4K_0402_1%1 2
P C5144.7U_0805_6.3V6K
12
P R5134.7_1206_5%
12
PC5214.7U_0805_10V6K
12
+
P C515220U_B2_2.5VM_R25M
1
2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
SLP_S3#<21,23,25,27,32,33,34,37,38,40,42,43>
+0.75VSP
+5VALW
+5VALW
+1.5V
+0.75VS+0.75VSP
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P LPSV 0.1
0.75VSP
41 45Friday, July 17, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
(2A,80mils ,Via NO.= 4)
G
D
S PQ600SSM3K7002FU_SC70-3
2
13
PR601
10K_0402_5%
12
PR600
1K_0402_1%
12
PR6021K_0402_1%
12
PR603
0_0402_5%
1 2
PU600
G2992F1U_SO8
VOUT4
NC 5GND2
VREF3
VIN1 VCNTL 6
NC 7
NC 8
TP 9
PC60410U_0805_6.3V6M
12
PC
60
30
.1U
_0
40
2_
10
V7
K
12
PJP600
PAD-OPEN 3x3m
1 2
PC6021U_0603_10V6K
12
PC
60
11
0U
_0
80
5_
10
V4
Z
12
G
D
S
PQ601SSM3K7002FU_SC70-3
2
13
PC
60
01
0U
_0
80
5_
6.3
V6
M
12
[email protected]_0402_16V7K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
UGATE_CPU2
VSUM
VSUM
BOOT_CPU1
LGATE_CPU1
BOOT_CPU2
LGATE_CPU2
PHASE_CPU2
VR_TT#
ISEN1
VCC_PRM
VCC_PRM
VCC_PRM
PHASE_CPU1
ISEN1ISEN2
VSUM
ISEN2
UGATE_CPU1
CP
U_
VID
4
<6
>
CP
U_
VID
3
<6
>
CP
U_
VID
5
<6
>C
PU
_V
ID2
<6
>
CP
U_
VID
1
<6
>
CP
U_
VID
0
<6
>
CP
U_
VID
6
<6
>
PW
R_
GD
<3
4>
PM_DPRSLPVR<8,22>
H_DPRSTP#<5,8,21>
H_PSI#<5>
VCCSENSE<6>
VSSSENSE<6>
CLK_ENABLE#<21>
VGATE<8,22,34>
PM_PWROK<5>
+3VALW
+3VS
+5VALW
+CPU_B+
+5VALW
+VCC_CORE
B+
+CPU_B+
+CPU_B+
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P LPSV 0.1
CPU_CORE
42 45Friday, July 17, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
PR245 4.89K (ULV)
PC231 0.022uF (ULV)
PC233 0.18uF (ULV)
PR225 12.1K (ULV)
PR219 No pop(ULV)
PC212 No pop(ULV)
PR220 0_0402_5%(ULV)
PR246 0 (ULV)
PR229 No pop (ULV)
PR232 287K (ULV)
PC221 270pF (ULV)
PC223 68pF (ULV)
PR235 255 (ULV)
PC225 1200pF (ULV)
PR
21
8
3.6
5K
_0
80
5_
1%
12
[email protected]_0402_16V7K1 2
[email protected]_1206_5%
12
PL2020.36UH +-20% ETQP4LR36WFC 24A
12
PR
20
90
_0
40
2_
5%1
2
PR244 1K_0402_1%
1 2
PR203 0_0402_5%
1 2
PQ203TPCA8030-H_SOP-ADV8-5
4
5
123
PC230 180P_0402_50V8J
1 2
PH20110KB_0603_5%_ERTJ1VR103J
12
PR241 0_0402_5%1 2
PL2010.36UH +-20% ETQP4LR36WFC 24A
12
PC
20
00
.02
2U
_0
40
2_
16
V7
K
12
PR215
499_0402_1%
12
PC220@680P_0603_50V8J
12
PR
24
3
11
K_
04
02
_1
%
12
PR201
1_0603_5%
12
PC
20
91
U_
06
03
_6
.3V
6M
12
PC212
0.22U_0603_10V7K
1 2
PQ
20
1A
ON
67
18
L 1
N D
FN
35
2
4
1
PR246 @0_0402_5%
1 2
PR238 0_0402_5%
1 2
PR222 @0_0402_5%1 2
PC228330P_0603_50V8
12
PC2160.022U_0603_25V7K
1 2
PR233 1_0603_5%
1 2
PR
20
60
_0
40
2_
5%1
2
PR
24
0
2.6
1K
_0
40
2_
1%
12
PC
20
80
.1U
_0
40
2_
25
V6
12
PR225 22.1K_0402_1%
1 2
PC
20
34
.7U
_0
80
5_
25
V6
-K
12
PC
23
62
20
0P
_0
40
2_
50
V7
K
12
PH200
@100K_0603_1%_TH11-4H104FT
1 2
PC
20
14
.7U
_0
80
5_
25
V6
-K
12
PR
20
80
_0
40
2_
5%1
2
PC
20
62
.2U
_0
60
3_
10
V6
K 12
PR2242.2_0603_5%
1 2
PR234@1K_0402_5%
12
PR
21
91
0K
_0
40
2_
1%
12
PR23610_0603_5%
1 2PR237 1K_0402_1%
1 2
PC2241U_0402_6.3V6K
12
ISL6262ACRZ-T_QFN48_7X7
PU200
PGOOD1
PSI#2
PMON3
RBIAS4
VR_TT#5
NTC6
SOFT7
OCSET8
VW9
COMP10
FB11
FB212
VD
IFF
13
VS
EN
14
RT
N15
DR
OO
P16
DF
B17
VO
18
VS
UM
19
VIN
20
GN
D21
VD
D22
ISE
N2
23
ISE
N1
24
NC25
BOOT226
UGATE227
PHASE228
PGND229
LGATE230
PVCC31
LGATE132
PGND133
PHASE134
UGATE135
BOOT136V
ID0
37
VID
138
VID
239
VID
340
VID
441
VID
542
VID
643
VR
_O
N44
DP
RS
LP
VR
45
DP
RS
TP
#46
CLK
_E
N#
47
3V
348
GN
D49
PR221 @0_0603_5%
1 2
PR2301_0402_5%
12
PR202 0_0402_5%
1 2
PR211 0_0402_5%
1 2
PR
22
8
3.6
5K
_0
80
5_
1%
12
PC2320.22U_0603_10V7K
12
PR
21
00
_0
40
2_
5%1
2
PC219 1000P_0402_50V7K
1 2
PR
20
70
_0
40
2_
5%1
2
PR
20
50
_0
40
2_
5%1
2
PR245 8.45K_0402_1%
1 2
PR
21
20
_0
40
2_
5%1
2
PC2181000P_0402_50V7K1 2
PQ200TPCA8030-H_SOP-ADV8-54
5
123
PC
21
34
.7U
_0
80
5_
25
V6
-K
12 P
C2
14
4.7
U_
08
05
_2
5V
6-K
12
PR2390_0402_5%
12
PC
20
24
.7U
_0
80
5_
25
V6
-K
12
PC2100.22U_0603_10V7K
1 2
PR2201_0402_5%
12
PC221 470P_0402_50V7K
12
PR242 0_0402_5%
1 2
PR2176.8_1206_5%
12
PR231 @0_0603_5%
1 2
PR
21
3@
1.9
1K
_0
40
2_
1%
12
PC
20
52
20
0P
_0
40
2_
50
V7
K
12
PC227 330P_0603_50V8
1 2
PC
20
44
.7U
_0
80
5_
25
V6
-K
12
PR
22
91
0K
_0
40
2_
1%
12
PR223 @4.22K_0402_1%
1 2
PL200SMB3025500YA_2P
1 2
PR235
255_0402_1%
1 2
PC211680P_0603_50V8J
12
PC
23
54
.7U
_0
80
5_
25
V6
-K
12
PQ
20
4A
ON
67
18
L 1
N D
FN
35
2
4
1
PR
20
40
_0
40
2_
5%1
2
PC225 1000P_0402_50V7K
1 2
PC233 0.22U_0402_6.3V6K
12
PC223 220P_0402_50V8J
1 2
PR216 147K_0402_1%1 2
PC2170.22U_0603_10V7K
1 2
PR232 97.6K_0402_1%
1 2
PC231 0.1U_0402_16V7K
1 2
PC
22
9
0.0
1U
_0
60
3_
50
V7
K
12
PR2142.2_0603_5%
1 2
PR227 6.81K_0402_1%
1 2
PC222
0.22U_0603_10V7K
1 2
PC
23
70
.1U
_0
40
2_
25
V6
12
PR200 0_0402_5%
1 2
PC2260.1U_0603_25V7K
12
PC
23
44
.7U
_0
80
5_
25
V6
-K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ADP_ID 38
ADP_PS0 38
SRSET 43
OCP# 15
IADAPT38,43
ADP_PS1 38
SLP_S3#
ADP_EN
ADP_EN# 43
BATCAL#43
ADP_SIGNAL
+3VL
+5VS
+3VS
+3VS
+5VS
+3VS
+5VS
+5VS
+3VS
+3VS
VIN
VIN
+5VS
VIN
BQ24740VREF
+3VL
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P LPSV
ADP_OCPCustom
43 45Friday, July 17, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
4/01 Change PR1000,PR1009,PC1002,PR1007.
PR1046191K_0402_1%
12
LMV321M5X NOPB SOT23 5P
PU1000
V-2
+IN1
-IN3
OUT4
V+5
PD1002RLS4148GTE-11 LL34-2
12
PU1001ALM393DR_SO8
+3
-2
O1
P8
G4
PR101210K_0402_5%
12
PR104329.4K_0402_1%
12
PR1001133K_0402_1%
12
PR105110K_0402_1%
12
PQ1007A2N7002KDWH-2N_SOT363-6
61
2
PC10051U_0603_10V6K
12
PR102110K_0402_5%
12
PD10001SS355_SOD323-2
12
PR102610K_0402_5%
12
PR1052
10K_0402_5%
12
PR1004 10K_0402_1%
1 2
PR1008
2K_0402_5%
12
PD10031SS355_SOD323-2
1 2
PR1049
47K_0402_5%
12
PR103110K_0402_5%
1 2
PU1003ALM393DR_SO8
+3
-2
O1
P8
G4
PR104747K_0402_5%
1 2
PR100310K_0402_5%
12
G
DSPQ1003NDS0610_G_SOT23-3
2
13
PR102522.6K_0402_1%
12
PU1002A
LM393DR_SO8
+3
-2
O1
P8
G4
PR101010K_0402_5%
12
PU1001BLM393DR_SO8
+5
-6
O7
P8
G4
PR1009105K_0402_1%
12
PR1019100K_0402_5%
1 2
PR1048470K_0402_5%
12
PR103421K_0603_1%
12
PR1000
511K_0402_1%
1 2
PR100680.6K_0402_1%
12
PR1014100_0402_5%
1 2
PR10171_0805_1%
12
PR1044220K_0402_5%
12
PD10011SS355_SOD323-2
12
PR10381M_0402_5%
1 2
PC10000.22U_0603_16V7K
1 2
PR1007
604K_0603_1%
1 2
PU1003BLM393DR_SO8
+5
-6
O7
P8
G4
PR104110K_0402_5%
12
PR103210K_0402_1%
12
PR102871.5K_0402_1%
12
PR10401M_0402_5%
1 2
PR1042220K_0402_5%
12
PR10291M_0402_5%
1 2
PC
10
03
39
00
P_
0402_50V
7K
1
2
PR10110_0402_5%
1 2
PC
10
01
0.0
1U
_0
40
2_
16V
7K
12
PQ1007B2N7002KDWH-2N_SOT363-6
34
5
PR
10
20
@0
_0
805_5%1
2
PU1002B
LM393DR_SO8
+5
-6
O7
P8
G4
PR
10
16
3.9
K_
04
02_5%
12
G
D
SPQ1004SSM3K7002FU_SC70-3
2
13
PC
10
02
0.0
27
U_
04
02
_16V
7K
12
PR10393.48K_0402_1%
12
PC10060.1U_0603_16V7K
12
PR1002100K_0402_5%
1 2
E
B
C
PQ1005MMBT3904WH_SOT323-3
2
31
PR104521K_0603_1%
1 2
PC10041U_0805_25V6K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BST_GFXDH_GFX
DL_GFX
VGAVR_ON
VGFX_PRM
VSUM1
LX_GFX
VGAVR_ON
VGFX_PRM
DFGT_VID_4<8>DFGT_VID_3<8>DFGT_VID_2<8>DFGT_VID_1<8>
GFXVR_EN<8>
DFGT_VID_0<8>
+5VALW
B+
GFX_B+
GFX_B+
+VCCGFXP
+3VS
+VCCGFX
+3VS
+5VALW
+VCCGFXP +VCCGFX
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5221P LPSV
GM VGA_COREB
44 45Friday, July 17, 2009
2005/03/10 2006/03/10Compal Electronics, Inc.
Parellel from VCCGFX and GND underneath GMCH at Interface Power pin
(5A,200mils ,Via NO.= 10)
2008-07-02
PR711 0_0402_5%1 2
PC716 330P_0402_50V7K
1 2
PC
71
91
00
0P
_0
40
2_
50
V7
K
12
PC
70
12
20
0P
_0
40
2_
50
V7
K
12
PR705 0_0402_5%1 2
PR724 4.53K_0402_1%
1 2
PR707 10K_0402_5%1 2
PR727 1K_0402_1%1 2
PC708 0.01U_0402_16V7K
12
PR731
4.99K_0402_1%
12
PR709 0_0402_5%1 2
PC710 1000P_0402_50V7K1 2
PR7082.2_0402_5%
1 2
PC7171000P_0402_50V7K
12
PR721
20K_0402_1%
1 2
PR702
10_0402_5%
12
PL701
1UH_MPL73-1R0_11A_20%
1 2
PR716 100K_0402_1%
12
PR719
0_0402_5%
12
PR
71
8
7.6
8K
_0
80
5_
1%
12
PH700
10KB_0603_5%_ERTJ1VR103J
1 2
PR723 12.4K_0603_1%1 2
PR712 @0_0402_5%
1 2
+
PC
70
6
33
0U
_D
2_
2V
_Y
1
2
PR71310K_0402_5%
1 2
PC
72
10
.1U
_0
60
3_
50
V7
K
12
PJP700
PAD-OPEN 4x4m
1 2PR7282.21K_0402_1%
12
PC7201000P_0402_50V7K
12
PC7001U_0603_10V6K
12
PC718
560P_0402_50V7K
12
[email protected]_1206_5%
12
PC7072.2U_0603_10V6K
12
PC714@68P_0402_50V8J
12
PR726 1.74K_0402_1%~N
1 2
PC712 0.022U_0402_16V7K
1 2
PC
71
51
80
P_
04
02
_5
0V
8J
12
PC709@680P_0603_50V8J
12
PR732 0_0402_5%
1 2
PR706 0_0402_5%1 2
PC
70
3
4.7
U_
08
05
_2
5V
6-K
12
PR70110_0402_5%
12
PR715 0_0402_5%
1 2
PQ701AO4710L 1N SO8
365 7 8
2
4
1
PQ700DMN3031LSS-13 1N SOP-8L
365 7 8
2
4
1
PR7223.57K_0402_1%
1 2
PR730
374_0402_1%
12
PR729 0_0402_5%
1 2
PR700@30K_0402_1%
12
PC7050.1U_0402_10V7K
12
PR725 6.98K_0402_1%1 2
PC
70
2
4.7
U_
08
05
_2
5V
6-K
12
PL700HCB1608KF-121T30_0603
12
PR720 150K_0402_1%12
PC7130.1U_0402_10V7K
12
PC711 0.033U_0402_16V7K
1 2
PU700
ISL6263CRZ-T_QFN32_5X5
D427
D326
D225
D124
D023
SPIR30
VO12
VR_ON29
VSUM13
UGATE18
PHASE19
PGND20
COMP5
DFB11
DROOP10
VIN14
LGATE21
I2UA28
FDE32
VSEN8
SOFT2
BOOT17
FB6
VCC16
VD
IFF
7
PGOOD31
OCSET3
RTN9
VW4
PVCC22
RBIAS1
VS
S1
5
EP
33
PC
72
3
0.1
U_
06
03
_1
6V
7
12
PC
72
2
0.1
U_
06
03
_1
6V
7
12
PR717
1_0402_5%
1 2
PR710 0_0402_5%1 2
PC
70
40
.01
U_
04
02
_5
0V
7K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3261P UMA
Changed - List Power HistoryCus tom
45 45Friday, July 17, 2009
2005/03/10 2006/03/10Compal Electronics, Inc.
3
P37P38
Version change list (P.I.R. List) Power section Page 1 of 1
Item Reason for change PG# Modify ListDate
Phase
42
17 42
18 42
19 43
14 38
15 39
16
6 38
1
2
20 42
10 38
11 38
12
8 42
5 P37
P38
9 4142
4
P38
13
38
7 39
41
43
43
Add one more cap for HP request. Add one more cap PC318 22uF. 2009/07/14 PV -> MV
Add pull low resistance for HP request. Add pull low resistance PR321 100k to ground. 2009/07/14
Change PC300 from 0.22uF to 1uF.Change PC300 from 0.22uF to 1uF.P38 2009/07/14
Change PC318 from 22uF to 10uF.And change PC124 from 0.1uF to 10uF.
Change PC318 from 22uF to 10uF.And change PC124 from 0.1uF to 10uF.Total capacitance is to 20uF.
2009/07/17
Change PR113 from 22.6k to 43.2k. Change PR113 to remodify switch between CCM and DCM,
PV -> MV
PV -> MV
PV -> MV
PV -> MV2009/07/17
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateEE change list-1
Cus tom
46 47Friday, July 17, 2009
2005/03/10 2006/03/10Compal Electronics, Inc.
Version change list (P.I.R. List) Page 1 of 2
Item Reason for change PG# Modify List Date Phase1 HP 2009 USB card reader common design P21 P28 USB port4 -->USB port3 of card reader device
2 Add Caps lock function P18 P29 P32 Add SMSC GPIO05 net and add Q34
2008/3/2
2008/3/2
3 Support HDMI dangle Add SDVO_CTRLCLK and SDVO_CTRLDATA netP8
4 Support HDMI dangle P10
P23
P33
P34
Remove Q71 Q72 R897 R898 , Add R950 R951 R952 R953 Q1 Q4 Q15 Q16
Add D57 and del Q14
Add R954 0ohm and U34 changt to SN74AHCT1G125GW
Fine tune USB control pin
5
6
7
Follow Dior LAN_DIS# design (LAN no function)
Fine tune VCC1_PWRGD design(Can not power on)
USB power switch use active high (USB no function)
2008/3/2
2008/3/2
2008/3/4
2008/3/4
2008/3/4
DB1->DB2
DB1->DB2
DB1->DB2
DB1->DB2
DB1->DB2
DB1->DB2
DB1->DB2
8
9
Lan IC use 1.2V LDO
Charger LED have light when unplug AC
P23
P32
Add Q81 R956 R957 R958 C990 C991 C992 U38 part
U26 Pin92 GPIO15-->AC_AND_CHG and R729 uninstall
2008/3/4
2008/3/5
DB1->DB2
DB1->DB2
10 Del R550 for Lan IC 8075 reserved P23R550 No request 2008/3/5 DB1->DB2
11 Montevina DPB_HPD is active low P16 Add R123 Q3 R120 as DB1 2008/3/5 DB1->DB2
12 Move WL_BLUE_BTN from GPIO 24 to 36 P32
13 Add diode for Display Port power leakage Add D6P16
14
P16
Remove JP35 of DB test P29
15 Connect U18 pin5 to GND P28
P28 P3416 Connect R628 pin1 to SLP_S4# and JP9 Pin14-->SLP_S4#
change U33 to AT24C16BN for fix LAN fail issue17 P23
2008/3/7
2008/3/7
2008/3/7
2008/3/7
2008/3/7
2008/3/7
2008/3/7
DB1->DB2
DB1->DB2
DB1->DB2
DB1->DB2
DB1->DB2
DB1->DB2
DB1->DB218 Fine tune PWR_GD circuit P33
19 R583 Q57 -->@ and Del SLP P34 Modify USB control pin 2008/3/9 DB1->DB2
20
21
22
23
24
25
P16 P20
P34
P34
P32
P21
Change to Dip type conn
Fine tune +1.8V LDO power
Fine tune +1.8V LDO power
ADP_PS0 and ADP_PS1 have more pull-high R
Fine tune PM_PWROK high level
Update Sata(JP10) and display(JDP1)footprint
R912 100K->47K and R913 215k->100k
C983 SMT-->@ and C985 22u-->10u
R521 and R723-->@
PM_PWROK R254 0201 10k-->0402 100K
2008/3/25
2008/3/25
2008/3/25
2008/3/25
2008/3/25
2008/3/25
DB2->SI
ME update drawing for H=omm space
26
27
External Headphone output is port A
Fine tune pull high R
P27
P27
Sense B-->Sense A for Headphone port
R823 R824 100K-->10K
2008/3/25
2008/3/25
DB2->SI
DB2->SI
DB2->SI
DB2->SI
DB2->SI
DB2->SI
DB2->SI
28
29
30
31
HP 2009 request P31 SPI_CS0# add reserved R964 pull high R
Modify CB_IN# voltage level
HP 2009 request
Del R89 R268 and Add reserved C994, R968 (C994 and R968 near JP7)P21 P24
R965 R966 R967 for WWAN_DETECT#P21 P25
2008/3/26
2008/3/26
2008/3/26
DB2->SI
DB2->SI
DB2->SI
32
33
34
35
0201 part-->0402 part (Without @ part) 2008/3/30 DB2->SI
P34
P16
Add R969
Q2B Drain and source are inverted
+1.8V use SLP_S4# not SLP_S3#
Modify Q2B pin define (HDMI Dangle function)
36
R964 pin2 +3VL-->+3VALW
JP3 Pin3 +3VALW->+3VL
P31
P29
Remove J7 P34 Short this pin
2008/3/30
2008/3/30
2008/3/30
2008/3/30
2008/3/30
DB2->SI
DB2->SI
DB2->SI
DB2->SI
DB2->SI
EC will keep power off and blink battery
37
38
39
LPC debug
LPC debug
P21 P32
P31
Connect ICH9M GPIO36(NPCI_RST#to KBC pin 53 (PCI_RST#->NPCI_RST#) 2008/3/30
2008/3/30
DB2->SI
DB2->SI
Update U33 P/N SA00002: P600 ( AT24C08BN) P23 LAN EEPROM use 1M size 2008/3/30 DB2->SI
40 Avoid +3VS leakage on S3 mode P23 Modify Q91 pin deifne 2008/3/31 DB2->SI
Add R970 for PCI_SERR#
41
42
43
P27
P21
Resolve a static noise at cold boot.
WWAN_DETECT# change to U8 GPIO22
U14 pin25 SLP_S3#-->+5VS
The function is merely detecting presence of WWAN module
2008/4/1
2008/4/1
DB2->SI
DB2->SI
44
45
46
47
48
49
50
51
Support HDMI Audio
Support HDMI Audio
Support HDMI Audio
Support HDMI Audio
Support HDMI Audio
P08
P11
P20
P22
P27
Add R975 and add HD bus contact ICH9
U4.A31 pin GND-->+1.5VS
Add R971~R974and add HD bus contact NB
U8.AD7 pin +3VS->+1.5VS and U8.V10 pin contact +1.5VALW (R976 R977)
Reserved R978 and audio code use 92HD75B1X5NLGXYBX8
More pull high R
Resolve a static noise at cold boot.
EMI request
HP request
P21
P27
P11
P11
Del R246
Add R979 pull high +5VS
Add C1157 C1158 on +VCCGFX
C726 @-->15P
2008/4/2
2008/4/2
2008/4/2
2008/4/2
2008/4/2
2008/4/2
2008/4/2
2008/4/2
2008/4/2
DB2->SI
DB2->SI
DB2->SI
DB2->SI
DB2->SI
DB2->SI
DB2->SI
DB2->SI
DB2->SI
52 Base on EPSON RTC report then fine tune Y2 C206 C207 P20 Y2 use CL=7pf X'TALand C206 C207 12P->8P 2008/4/8 DB2->SI
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateEE change list-2
Cus tom
47 47Friday, July 17, 2009
2005/03/10 2006/03/10Compal Electronics, Inc.
Version change list (P.I.R. List) Page 2 of 2
Item Reason for change PG# Modify List Date Phase53 R115 5.1M-->1M P16 Follow intel spec 2008/4/29 SI->PV
54
55
56
57
58
59
C185 @->18P P15 SMT memo and fine tune CLK_48M_ICH clock 2008/4/29 SI->PV
C751 C756 1u->2.2u P27 Audio code vender request 2008/5/8 SI->PV
60
61
62
63
64
65
66
67
68
Update Y3 footprint
Follow compal common deisgn
Footprint error
Follow compal common deisgn of Display power
Fine tune mute control circuit
Del Reserved R978
Add cap for GMT request (C995)
Add cap for GMT request (C996)
P15
P23
P30
P16
P32
P32
P27
P27
P27
P27
P30
P34
Follow compal common deisgn
Update Y6 footprint
Change single MOS to Dual MOS
Update USB JP32 footprint (SUYIN_020173MR004S582ZL_4P-T)
Del D6 diode and change to R980 0805 size
R517->@ and remane EAPD->MUTE_LED_CNTL
Remane A_SD->A_SD# of SMSC
Remane A_SD#->SPKR_EN
Del Q11 R825 and remane A_SD#->MUTE_LED_CNTL
MUTE_LED_CNTL and EAPD contact with SPKR_EN (Add D6 R981)
Add C995 near U23 pin2
Del reserved R914 and Add C996 near U52 pin1
Follow compal common deisgn
69
70
Follow HP request
Add R984~R988 for LPC debug port
P18
P25
Add R982 R983 0ohm and uninstall Q9 Q79
uninstall on MV phase
2008/5/8
2008/5/8
2008/5/8
2008/5/8
2008/5/8
2008/5/8
2008/5/8
2008/5/8
2008/5/8
2008/5/8
2008/5/8
2008/5/8
2008/5/8
2008/5/8
2008/5/8
SI->PV
SI->PV
SI->PV
SI->PV
SI->PV
SI->PV
SI->PV
SI->PV
SI->PV
SI->PV
SI->PV
SI->PV
SI->PV
SI->PV
SI->PV
Fine tune mute control circuit
Fine tune mute control circuit
Fine tune mute control circuit
Fine tune mute control circuit
71 Avoid +0.75VS leakage on S3 mode and save the power P34 Follow SI design 2008/5/8 SI->PV
72
73
Fine tune CLK_CPU_BCLK,CLK_CPU_BCLK# for WWAN noise
Follow HP request
P04 P15
P16
Del XDP signal and Del R859 R860
Reserved R989 R990
2008/5/12
2008/5/12
SI->PV
SI->PV
74 Audio vender request C752 C753 2.2u X5R 0603->2.2u X7R 0805P27 2008/5/12 SI->PV
75
76
77
78
Fine tune HD LED control circuit
EMI request
EMI request
RF request
P18
P29
P18 P30
P10
Del Q32 Q18 and Add R991 Add reserved Q97
Add C1000 C1001 120P cap
Add C1002~C1007 0.1 cap
R56 2.4K->4.22K (Same as skyy design)
2008/5/16
2008/5/16
2008/5/16
2008/5/16
SI->PV
SI->PV
SI->PV
SI->PV
79 ESD request P32 Add C1008~C1010 0.1u cap 2008/5/18 SI->PV
80
81
HP request P27
P18
U14 Pin 25 contact to PLT_RST#
Stuff R334 by 1K and reserve 10K(R993) at Q3A pin2HP request
2008/5/21
2008/5/21
SI->PV
SI->PV
82 Fine tune V5REF to +3VS(UP) waveform P34 Add R994 330K 2008/5/21 SI->PV
83
84
RF request
RF request
P07
P12 P14
Add x6 10P cap on +VCCP and +VCC_CORE
Add x5 10P cap on +1.5V
2008/5/22
2008/5/22
SI->PV
SI->PV
85
86
87
Del LAN powr 1.2V LDO reserved co-layouy part and del reserved R961
Del +1.8V discharge circuit
Del reserved 48MHZ_Clock for card reader clock
P23 No request
No requestP34
P15 P28 No request
2008/5/22
2008/5/22
2008/5/22
SI->PV
SI->PV
SI->PV
88 Avoid Electrical Printed Circuit Assembly Acoustic Noise issue P5 P11 C6 C108 use D2 470u 2V ESR4.5M cap 2008/5/27 SI->PV
89
90
Reserved R995 for +1.8V NB LVDS power
Reserved R996 R997
P34
P14 Reserved for low power clock gen that impact BAT life
2008/7/8
2008/7/8
PV->MV
PV->MV
91 @->SMT C590 C591 10P cap P25 RF request 2008/7/8 PV->MV
93
92 @->SMT C1008 C1009 C1010 0.1u cap P32 ESD request 2008/7/9 PV->MV
94
95
96
97
98
C72 C74 C77 C78 C80 change Y5V to X7R or X5R cap
C104 C114 C118 C115 C121 C103 C102 C111 change Y5V to X7R or X5R cap
R73 1_0605_5%->1_0402_1%
C154 C155 C156 C157 change Y5V to X7R or X5R cap
C110 C126 C1156 change Y5V to X7R or X5R cap
R299 10ohm->100ohm C252 0.1u_0402->1u_0402
P08
P11
P11
P12
P11
P22
Based on MVSFF DG_Ver2.2
Based on MVSFF DG_Ver2.2
Based on MVSFF DG_Ver2.2
Based on MVSFF DG_Ver2.2
Based on MVSFF DG_Ver2.2
Based on MVSFF DG_Ver2.2
2008/7/9
2008/7/9
2008/7/9
2008/7/9
2008/7/9
2008/7/9
PV->MV
PV->MV
PV->MV
PV->MV
PV->MV
PV->MV
99
100
Add C1159 C1160 0.1ux2 cap on LID_SW# and STB_LED net
Add C1161 0.1u cap on U53 pin1
P29 EMI request 2008/7/13
P08 EMI request 2008/7/13
PV->MV
PV->MV
Change C101, C132, C125, C116, C122, C124, C95, C123, C99, C127, C92, C120
Y5V to X7R or X5R101 P11 Based on MVSFF DG_Ver2.2 2008/7/13 PV->MV
102
103
Remove R980 0805 0 ohm on Display port power P16 No request
Add R996 0 ohm for EOS P17 Compal request
2008/7/16
2008/7/16
PV->MV
PV->MV