Embed Size (px)
Citation preview
POWER SUPPLY FOR SOLID
STATE LASERS
by
ZHAN MEI, B.S.
A THESIS
IN
ELECTRICAL ENGINEERING
Submitted to the Graduate Faculty
of Texas Tech University in Partial Fulfillment of the Requirements for
the Degree of
MASTER OF SCIENCE
IN
ELECTRICAL ENGINEERING
i^ppro^d
May, 2001
TABLE OF CONTENTS
ACKNOWLEDGEMENTS ii
ABSTRACT iii
LIST OF TABLES iv
LIST OF FIGURES v
L INTRODUCTION 1
n. BASIC PRINCIPLES AND THEORY 3
2.1 Step-Down (Buck) Converter 3
2.2 Basic Constraints to Transformer 10
m. PRACTICAL SELECTION OF COMPONENTS 16
3.1 UC3827N-1 Chip 16
3.2 Power Semiconductor Devices 18
3.3 Transformer Design 21
3.4 Simulation of Circuit 27
IV. TEST PLATFORM AND RESULT 38
4.1 Buck and Push-PuU Signals Realizafion 38
4.2 Push-Pull Isolated Buck Circuit With Feedback 42
4.3 Debug and Test 45
4.4 Physical PC Board 57
V. CONCLUSIONS 59
REFERENCES 61
ACKNOWLEDGEMENTS
I would like to thank all people who have given help in this project.
I would first like to thank Dr. James C. Dickens for offering me the opportunity.
Under his guidance, this project has enriched me with some priceless experiences, which
I will cherish forever. This project would not complete without his direct and help.
I would like to thank Dr. Michael Giesselmann and Dr. Neuber for serving on my
thesis committee and reviewing my paper.
I would like to thank Mic Cevallos for valuable hours of discussion. His
continuous support was indispensable for success of this project. I would like to thank
Efren Brito for reviewing my paper. He spent a lot time to improve my language and
without his help, this paper can not be written like this. I would like to thank my
colleagues Jano Blakewall and Roberto Izquierdob in the lab.
Among the technical and secretarial staff, I would like to thank Daniel Garcia for
his friendship.
I would like to thank my friends Kaye and Raymond who helped me a lot since I
came here. They taught me and encouraged me to face difficulties.
I would like to thank my friend Tang who helped me and taught me a lot during
the past two years.
I would like to thank my parents for their support and patience since I left home.
11
ABSTRACT
A compound converter was developed to get low voltage (2.5V) out and high
current (lOA) out.
The buck converter used Pulse Width Modulation (PWM). The PWM control
funcfion was contained in the UC3827N-1 controller chip. A voltage feedback loop was
used to control the duty cycle of the buck to produce a desired output voltage. A push-
pull operation followed the buck operation for high frequency.
The design specifications were:
• Input voltage = 50V
• Output voltage = 2.5V
• Output current = lOA
• Switching frequency = 50kHz
Two PC boards were designed. One had a 175mil output trace and was tested for
5A current output. The other one had a 500mil output trace and was tested for lOA
current output. Two types of transformers were designed, one used the core of P36/22
and the other used the core of P30/19.
Ill
LIST OF TABLES
3.1 Major Rating and Characteristics of 50SQ100 19
3.2 Major Rating and Characteristics of 47CTQ020 19
3.3 P36/22 Core Transformer 26
3.4 P30/19 Core Transformer 26
4.1 Power Supply Measurements for the 175mil Trace PCB 52
4.2 Power Supply Measurements for the 500mil Trace PCB 52
IV
LIST OF HGURES
2.1 Step-Down DC-DC Converter circuit 3
2.2 Waveform of output voltage 4
2.3 Buck converter with insertion of low-pass filter 4
2.4 Buck converter when switch on 5
2.5 Bock converter when switch off 5
2.6 Buck converter continuous conduction 6
2.7 Current at the boundary of continuous-discontinuous condition 7
2.8 Discontinuous condition 8
2.9 Converter characteristics with constant Vd 9
2.10 Converter characteristics with constant Vo 10
2.11 Hysteresis curve 15
3.1 Block diagram of UC3827N-1 16
3.2 Connection diagram of UC3827N-1 17
3.3 Symbol, actual and idealized I-V characteristic of diode 18
3.4 Block diagram of MOSFETIRF2807S/L 20
3.5 Normal push-pull isolated buck circuit 22
3.6 Sub-circuit and symbol of UC3827N-1 chip 27
3.7 Simulafion of buck converter 29
3.8 Basic transformer simulation circuit 30
3.9 Simulafion circuit of transformer using a P36/22 core and a P30/19 core 31
3.10 Input and output system with feedback 32
3.11 Feedback loop Amplifier 33
3.12 Feedback loop circuit 35
3.13 Electronics power supply system 35
3.14 Simulafion circuit with a P36/22 transformer core 36
3.15 Simulafion result with a P36/22 transformer core 36
3.16 Simulafion circuit with a P30/19 transformer core 37
3.17 Simulation result with a P30/19 transformer core 37
4.1 Pulsed width modulation 40
4.2 Buck and push-pull signal realization 41
4.3 Buck signal 42
4.4 Push and Pull signals 42
4.5 Buck and push-pull circuit 43
4.6 Isolation amplifier 44
4.7 Basic feedback control loop 44
4.8 Circuit design 45
4.9 Component layer of PCB with 175mil traces 46
4.10 Solder layer of PCB with 175mil traces 47
4.11 Component layer of PCB with 500mil traces 47
4.12 Solder layer of PCB with 500mil traces 48
4.13 Output voltage without load 50
4.14 Input signals for push-pull transformer 50
4.15 Output signals for push-pull transformer 51
vi
4.16 Current waveform of M1 53
4.17 Power waveform of M2 54
4.18 Block diagram of MOSFETIRF3710S/L 56
4.19 Power waveform of M2 with MOSFETIRF3710S/L 57
4.20 Physical PCB with 175mil trace 58
4.21 Physical PCB with 500mil trace 58
Vll
CHAPTER I
INTRODUCTION
This paper will discuss the design of a low voltage and high current de power
supply. This power supply will be used for Integrated Solid State Lasers.
Two basic dc-dc converter topologies are used in switching power supplies:
1. Step-up (boost) converter,
2. Step-down (buck) converter.
The first step in selecting a topology is to decide whether the output voltage is
higher or lower than the input voltage. A step-down converter was selected in this
project due to the requirement that the output voltage must be lower than the input
voltage.
In general, the available duty cycle for a converter can not be outside the limits of
approximately 10% minimum or 80% maximum; and transformers should have a
maximum primary to secondary turns ratio of 10:1 or a minimum of 1:10 [1]. Due to the
fairly large conversion ratio desired in this situation, a compound converter was designed.
The compound converter includes two stages:
• Buck converter step down power supply input,
• Push-pull transformer step down output of buck converter.
Current and voltage control model feedback loops can be used in switching power
supplies. Current control mode has two feedback loops, one to control the instantaneous
current, and one to control the capacitor voltage. Voltage control mode just has one
feedback loop, which is used to control the capacitor voltage. In this project, voltage
control mode was used.
Power electronics is one of the broadest growth areas in electrical technology. As
voltage for power supply becomes lower and lower (3.3V for portable computer), the
most important design priorities are compact size and high efficiency. The improvements
and quick development in semiconductors make these design priorities possible to meet.
Therefore, the design of a power supply using electronics for most effective power
delivery is the focus of this paper.
CHAPTER n
BASIC PRINCIPLES AND THEORY
In this chapter, the basic circuit of a buck converter is introduced as a means of
reducing the dc voltage. The characteristics of it are presented, and, the principles of
transformers are illustrated.
2.1 Step-Down (Buck) Converter
The buck converter reduces the dc voltage using ideal switches, inductors, and
capacitors that do not dissipate power. For example, when the switch is closed, its
voltage is zero and the current is zero when the switch is open. The basic ideal switch
circuit can be seen in Figure 2.1. The instantaneous output voltage VQ waveform is
shown in Figure 2.2 [2].
The output voltage is
1 1 f
Ts Ts Ts (2.1)
y V =—^V = KV u *0 » , ^control ^^ ^ controlH-
(2.2)
Figure 2.1 Step-Down DC-DC Converter circuit
V Ol
t,
1 / . ^d
, 1
Vo
V
'on - * • * - ^ o f f - * l
T = —-• fs
Figure 2.2 Waveform of output voltage
Ideally, whenever the switch is closed the voltage drop across the switch is going
to be zero, hence the power loss (product of voltage drop across it and the current through
it) is zero. Whenever the switch is open, no current follows; and the power loss is zero.
2.1.1 Continuous-conduction
When the inductor current flows continuously, the mode is operating in
continuous conduction. To remove the switching harmonics and pass only the dc
component of input to the output, an appropriate low-pass filter was chosen. The circuit
is shown in Figure 2.3.
U—'-' ('
Vd
O , H O ^
")
7
h i
\D
k
L
C
d
- Vo
'-0
Figure 2.3 Buck converter with insertion of low-pass filter
In Figure 2.4, the switch is closed with the diode reverse biased, the source
provides energy to the load as well as to the inductor. The inductor voltage is given by
4
Vi = Vout - Vin . (2.3)
Figure 2.4 Buck converter when switch on
In Figure 2.5, the switch is open. The inductor now acts as a source and switches
polarity forward biasing the diode. Inductor current flows though the diode and energy is
transferred to the load. Inductor current keeps flowing due to the inductive energy
storage. The inductor voltage represented by
V, = -Vout (2.4)
Figure 2.5 Buck converter when switch off
Ideally, the output capacitor is assumed to be very large so the load can get a
constant output voltage.
In steady-state operation, the inductor current waveform must repeat itself from
one period to the other one. Therefore, the integral of the inductor voltage v, o\er a time
period must be zero:
T. 1 s ton Ts
\vid^=\vidt+\vidt = 0 (2.5) ton
{V,-V^)ton = V^{Ts-ton) (2.6)
D = ton (2.7)
y. = 'fv.=Dv,. (2.8)
Assuming the input power equals the output power, then
Pin = Pout (2.9)
yoh=yj, (2.10)
h n D (2.11)
Figure 2.6 shows continuous operafion of step-down circuit [2].
Figure 2.6 Buck converter continuous conduction
The switch period, T^, depends on the switching speed of the semiconductor
devices.
r = ^ =ton + toff (2.12)
The complement of the duty rafio is defined as (1-D). By varying the duty ratio D
in a range of 0 to 1, VQ can be controlled.
2.1.2 Boundary between confinuous and discontinuous conduction
The current at the boundary of continuous-current-conduction is shown in Figure
2.7 [2]. The inductor current goes to zero at the end of the off interval. The average
inductor current is
7 ,^ = {Vin-Vout) -i LB
( DTs^
,2L , = /
OB (2.13)
where the subscript B refers to the boundary. Therefore, if the average inductor current
becomes smaller than ^^^, the converter will operate in the discontinuous conduction
mode.
h M ih)
Figure 2.7 Current at the boundary of continuous-discontinuous condition
2.1.3 Disconfinuous-Conducfion
First, discontinuous conduction with constant V^ is discussed.
In this application, Vj remains constant and VQ is controlled by varying the duty
cycle D. The average inductor current at the edge of the continuous-conduction mode is
r hs = D(^-D)
2L (2.14)
Equafion 2.14 shows that the output current required for a continuous-conduction
mode is maximum at D=0.5:
LB,max
TsV,
SL (2.15)
/ . . = 4 /^^_Z)( l -Z) ) (2.16)
Figure 2.8 indicates voltage and current [2].
*L. peak
Figure 2.8 Discontinuous conduction
The voltage ratio is calculated by equation 2.17
Vout
~vin~ D
D~-¥-{IoutlIi^_^) 4
(2.17)
The voltage rafio is plotted as a function of out. for various values of duty LB,max
ratio keeping V constant and is shown in Figure 2.9 [2].
1.0 D = 1.0
Vj = Constant
0.9
0.75
0.50
0.25
0
r\ ^^ " ^^^
\ ^^"^"v^ '
V ..-'-'
0.7
0.5
0.3
0.1
— — 1 1 1 1 .
0.5 1.0 1.5 2.0 ^ i m mat'
'LB,m»x
LB. max
8L
Figure 2.9 Converter characteristics with constant Vj
Second, discontinuous conduction with constant Vo is discussed.
In this section, input voltage will fluctuate, but the output voltage will remain
constant by adjusting the duty ratio D.
The average inductor current at the edge of continuous-conduction mode is
fTsVA hs = (^-D^ 2L
(2.18)
D=0:
Maximum output current required for a continuous-conduction mode occurs at
LB,max
TsV,
2L (2.19)
T =T {\-D), 1 LB 1 LB.max ^ '
(2.20)
The voltage rafio is calculated by equation 2.21,
^^VQ loutll^^^^^,,^
V. l - \ (2.21)
The duty ratio as a function of "jA is plotted for various values of ^ LB,max
keeping v^ constant and is shown in Figure 2.10 [2].
D
1.0
0.75
0.50
0.25
Vg = Constant
\ \
\ \
Discontini
\ \
wus \
\
^ = 2.0 Vo
^ = 5.0 Vo
0.25 0.50 0.75 1.0 1.25 (—Li—)
fLB.
^iJB, max T V
— ' o 2L
Figure 2.10 Converter characteristics with constant VQ
2.2 Basic Constraints to Transformer
The transformer does not store energy and is used to transfer energy from the
primary side to the secondary side without a time delay.
2.2.1 Basic Magnetic theory
The force of attraction or repulsion between two magnetic poles of strength /?zj
and m2 is directly proportional to the product of their strength and is inversely
proportional to the square of the distance between them.
10
Magnefizing force is defined as the force per unit pole strength or
H= — = ^ (2.22)
where F is the force of attracfion or repulsion depending on the polarity.
r is the distance between the magnetic poles,
fi is the constant of proportionality, called permeability.
Flux density is obtained by multiplying both sides of equafion 2.22 by ji
m B = iuH=^. (2.23)
The relationship between B and H is determined by the core characteristics. For
free space or air,
B = iHoH (2.24)
where |Uo is the permeability of the free space.
The core permeability \i is expressed as a product of relative permeability: fir and
Mo-
M=MoM. (2.25)
If a total magnetic flux O is passing through a surface S having an area A, then
the total flux O is equal to the integral of the normal component of the flux density over
the surface.
0 = JB.dA (2.26) surfaces
where dA is the vector area element and its direction is normal to the surface.
11
In magnetic circuits, the proportionality constant is called reluctance R. It is
directly proportional to the length of the magnetic path and is inversely proportional to
the area through which the flux flows.
R = — (2.27)
2.2.2 Faraday's Law
The flux induces a voltage V(t) given by
JO v{t) = -— . (2.28)
dt For a uniform flux distribution, V(t) can be rewritten as
m = A , ^ . (2.29) dt
2.2.3 Ampere's Law
If a uniform strength passes through an element of length in the magnetic field, a
force is generated and is given by
F = Hl. (2.30)
The ideal transformer is essentially a two-winding inductor. One is used for
storing energy in the transformer, and the other is used for dumping the core energy into
the output. The first coil is called the primary winding and the second coil is called the
secondary winding. The voltage and current equations are given by
N » i secondary -.j /'") '2 1 \
secondary «T primary ^ ^ / primary
12
J _ primary j , ^ ^^s secondary j.j ^ nrimnr\ • \^"^^/
secondary
where Vprtmary is the voltage applied to the primary winding,
^primary is the uumbcr of turns in the primary winding,
Iprimary IS the currcut flowlug in the primary winding,
ysecondary is the voltagc iuduccd iu the secondary winding,
^secondary is the uumbcr of turns in the secondary winding,
hecondary is the currcnt fiowing in the secondary winding.
Multiplying equation2.31 by equation 2.32
V I =V I (2 33) secondary secondary primary primary ' v • /
Dividing equation 2.32 by equafion 2.33 V
secondary r^ J secondary
secondary
(N \ sec ondary
N • primary
2
.z (2.34)
primary
In the ideal transformer, the core reluctance R approaches zero. Equations 2.35,
2.36 and 2.37 are given by
0 = njii + n2i2 (2.35)
JO V, = / 2 ,
^^ (2.36) JO
V2 = « 2 dt
n, «2 . (2.37)
13
2.2.4 Hysteresis Curve
Hysteresis is a characterisfic of a magnetic material describing how a change in
magnetization lags the application of a magnetizing force. During an interval of one
traverse of the hysteresis loop, the energy delivered to a coil containing a ferromagnetic
core is
E = jvidt (2.38)
where v is in volts,
/ is in amperes,
t is in seconds, and
Eis in joules.
V and H can be expressed as
v = A^-^xlO"' (2.39) dt
H = ^ . (2.40)
As the magnetizing fore H is increased from zero, the fiux density B increases
proportionally. When H reaches a certain value, B begins to level off. As H continues to
increase, B reaches a saturation value B^. Once saturation is reached, a further increase
in H will not increase B. If / / is decreased to zero, B will fall back along a different path
to residual value B2. This indicates that the material continues to be magnetized even
without the magnetizing force. The ability of a material to maintain a magnetized state
14
without the presence of a magnetizing force is called retentivity. The retentivity of a
material is indicated by the ratio of B^ to 5, .
Reversal of the magnetizing force is represented by negative values of H on the
curve and is achieved by reversing the current in the coil of wire. An increase in H in the
negative direction causes saturation to occur at a value - //^^, where the flux density is at
its maximum negative value B3. When H is zero, the flux density goes to its negative
residual value B^. From this value, the flux density follows the curve back to its
maximum positive value 5, where the magnetizing forces equal in the positive direction.
The net energy absorbed by the core due to hysteresis is proportional to the area
enclosed by the hysteresis loop. The energy loss per cycle is almost constant and is equal
to the area of the B-H loop. Figure 2.11 illustrates the hysteresis curve [3].
Figure 2.11 Hysteresis curve
CHAPTER in
PRACTICAL SELECTION OF COMPONENTS
Every component used in a power supply circuit should be chosen carefully. This
chapter describes semiconductors, their properties, and their applications. It also covers
the theory of feedback and circuit computer simulation.
3.1 UC3827N-1 Chip
To get a pulse width modulator (PWM), Unitrode's UC3827N-1 buck voltage fed
push-pull PWM controller IC was used. Its block diagram is shown in Figure 3.1 [4].
BLOCK DIAGRAM
VEA»
VEA-
CtA-
CSAO
CSA-
14
16
0 ^
6 T ;
CSA- I 9
SS
SYNC 19
CT
RT
Hl-h
18
17
15
VCC [?3]-
GM)
VEAO CEAt CEAO RAMP
10
VOLTAGE ERROR AMPLIFIER
>
12 6
CURRENT ERROR AMPLIFIER
•3V o CURRENT SENSE AMPLIFIER
ILIM COMPARATOR
OSC
500kH? MAX
^?-L
RCF &
UVLO UVLO
SS
INHBT
UV
5
0.7V
•^^t>^ PWM COMPARATOR 3>H^
f s o
FLYING DRIVER x>
OSC
> T
DELAY
PUSH PULL DRIVERS
DELAY
?0
DELAY
rv
BUCK
SRC
PGND
I - J
UOG 87172
Figure 3.1 Block diagram of UC3827N-1.
In the diagram, UC3827N-1 chip consists of a precision reference of 5V, one
voltage error amplifier, a current error amplifier, a current sense amplifier, an oscillator.
16
and a PWM comparator with latching logic. It includes an UVLO to insure sufficient
VCC presented and a soft start circuitry to clamp the output of the voltage error amplifier.
When the signal level on CS AO (the output of the current sense amplifier and the
noninverting input of the current limit comparator) exceeds 3 V, threshold of the current
limit comparator, the buck gate drive pulse is terminated. This feature is useful to
implement cycle-by-cycle current limiting for the buck converter.
UC3827N-1 was selected because it is ideally suited for multiple output
applications and it has a high current floating driver for the buck converter stage. It has
push-pull drivers with overlapping conduction periods. The push-pull outputs drive two
switches of the push-pull converter with complementary signals at 50% duty cycle. It has
wide bandwidth, low offset, differential current sense amplifier and precise short circuit
current control. Other valuable features include user programmable overlap time and bi
directional synchronization capability. It also provides complete protection for cascaded
buck and push-pull converters. The connection pins are shown in Figure 3.2 [4].
CONNECTION DIAGRAMS
DIL-24 (Top View) N or J, DW Packages
•••'[I BUCK [ T
si»c [ T
ssH -<'kM(.' [ T
CEAO [ T
CSAO f T
CSA* [ T
CSA- r r
VEAO n ^
GND n r
C£A. [77
W It] PUSH
77] VCC
77] BUU.
77] =GNo
7c] D l - * '
77] SYNC
77] CT
77] ST
77] VEA-
77] «£F
77] vEA-
77] cfA-
Figure 3.2 Connection diagram of UC3827N-1,
17
3.2 Power Semiconductor Devices
3.2.1 Diodes
A typical diode has a forward voltage drop when it is forward biased. Its forward
voltage drop is on the order of IV. When it is reverse biased, only a negligible small
leakage current flows through it until the reverse breakdown voltage is reached. It has
reverse recovery time (after a diode has been conducting current in the forward direction,
it will be able to conduct current in the opposite direction for a short time afterwards).
Figure 3.3 shows the characteristics of diodes [5].
'/)
A o
(at
K -o
'rated
Reverse blocking regkxi
v^a)
(b)
'VD
ȣ>
(c)
-^VD
Figure 3.3 Symbol, actual and idealized I-V characteristic of diode
In high frequency 2.5V supplies, schottky diodes offer lower forward voltage at a
range of 0.3~0.4V and have no reverse recovery time. So schottky diodes can reduce
switching losses and conduction losses. As a practical limit, using schottky diode at more
than three-quarters of its rated reverse voltage will induce problems [1]. International
Recfifier's Schottky Rectifier 50SQ100 was used as the input rectifier. Table 3.1 [6]
shows its characteristics.
Table 3.1 Major rating and characteristics of 50SQ100
Ch«r«ct«r)$lic«
1AV. PWaifflUfer
V f l f * , ™ ^
'FSM • V = 5pSvfth«
Vp «&*(;•(. Tj= 126'C
Tj rango
50SQ,..
5
ao»ioa
1S00
06e
bblDl/S
umts
A
V
,4
V
-c
The secondary side of the transformer was connected to two parallel output
rectifiers. Selecting an ultra low forward voltage drop rectifier is extremely important in
improving circuit efficiency under high output current (lOA). International Rectifier's
Schottky rectifier 47CTQ02S was used as it is optimized for very low voltage output
application. Table 3.2 shows its characteristics [6].
Table 3.2 Major rating and characteristics of 47CTQ020
Characteristics
wavdorm
^flRM
'FSM 0''P-*»«S&««
Vp @20A|*,Tj»125'C
h
Values
40
20
1000
034
5510150
Units
A
V
A
V
c
3.2.2 MOSFET
The fast and efficient rectifying devices are not diodes but active devices such as
MOSFETs. A MOSFET is a majority-carrier device. It has a less forward voltage drop
than a diode. The switching times of a MOSFET are determined essentially by the time
required by the gate driver to charge these capacitances: Cgd, Cgs, and Cds. For a
19
MOSFET, the switching time can be in the range of a few nanoseconds to a few hundred
nanoseconds. In order to keep the MOSFET in the "on" state, a gate source voltage with
an appropriate magnitude shall be applied continuously. No gate current flows except
during the transition from on to off or vice versa when the gate capacitance is being
charged or discharged. Also, due to negligible drive power needed, the MOSFET is easy
to be paralleled.
The MOSFET was not selected on the basis of its rated average current. Rather,
it was selected because of its on-resistance and its influence on condition losses. The on-
resistance of MOSFET is the sum of the resistance of the n-region, channel, source, and
drain contacts. The on-state resistance between the drain and source increases rapidly
with the device blocking rating which is given by [7]
R.. = kBV, DSS • (3.1)
Equation 3.1 shows that only devices with small voltage ratings are available
with low on-state resistance.
International Rectifier's MOSFETs IRF2807S/L was used as the power switch.
It is quickly switched between the saturation and the cut-off states, and its avalanche
breakdown rating is acceptable. Figure 3.4 shows its on-state resistor is quite small,
about 0.013 Ohms [8].
HEXFET^ Power MOSFFT
VDSS = 75V
Rr = ,-.- =0.013^2
lo = a2Ai&
Figure 3.4 Block diagram of MOSFET IRF2807S/L
20
3.3 Transformer Design
In any switch-mode power supply, the high-frequency transformer is a major
contributor for size because it occupies about 25% of the volume and 50% of the overall
weight. The size of transformer decreases with frequency increasing. However,
transformer surface area available to dissipate the power loss decreases, and this
increases the stress on the insulating materials.
3.3.1 Push-Pull Circuit
The push-pull converter included two transistors across a center-tapped
transformer. The transistors are operated 180° out of phase and have the same duty
cycle. In Figure 3.5, if the upper transistor is on, the bottom transistor is off. Equation
3.2 indicates that transistors are alternatively switched on for one time period to
maximize the use of transformer core.
K=2xV,„ (3.2)
Because a center-tap push-pull transformer design allows current to fiow in the
opposite direction in the primary winding of the transformer during each switching
period, current inside the core materials is driven in both positive and negative flux
polarities. The reversing current alternately resets the core. This prevents core saturation
and reduces the transformer core size. Since the two transistors are on for the same
amount of time, if the voltage supply is constant during a switching period, the volt-
seconds across the transformer ideally sum up to zero and the core operates
symmetrically around zero.
21
i
J — w — 1 " d '
Q2N2222 ^ '
Q2N2222 ^ \
'—tfJ d
N1 ) J
+ J J
1 — W - i
' 1 — r ^ d
L
I
Figure 3.5 Normal Push-Pull isolated buck circuit
3.3.2 Determine Core Size
Choosing a core material with lower loss is the first step to optimum design.
Equation 3.3 is used to select core size and is given by
K^.^ pXiilXl"' 4K„P„ ((P+2)/p)
(3.3)
-6 where p is the effective value of the wire resistivity: 1.724x 10 ,
K^ is the winding fill factor.
K f is a constant of proportionality. fe
P is determined from the core manufacturer's published data.
ti
Ai = jv,(0^r (3.4)
X, = DTsV (3.5)
where A, is the voltage seconds applied during the positive portion of the waveform.
A. =27,-^2^^/,, (3.6)
22
I^=l,=^IyfD , (3.7) m
h=L=-N\-^D 4 - 2 - x . ^ . (3.8)
We set n2:nl = 1/5.
A soft ferrite P style core was chosen. The system was tested with both a P30/19
core and a P36/22 core. For the core material, the 3C6A was poorly characterized and
had very high losses; and the 3C80 is used only for the most cost-sensitive applications
[9]. As the converter switching frequency continued to rise, the core losses grew faster.
The recommended material is 3F3 for a frequency of 50kHz.
3.3.3 Optimum Flux Density
Magnetic materials exhibit core loss due to the hysteresis of the B-H loop seen in
the Figure 2.11 and eddy currents flowing in the core materials. The core loss depends
on the peak flux density, the operating frequency, and the volume of the core [101.
P„ = K,, B l 4 / „ (3.9)
where P^^ is the total core loss,
K^^ is a constant of proportionality which depends on the operating frequency,
max is the peak value of the ac component of the flux density,
j3 is determined from the core manufacture's published data, or p =2.6,
A , is the core cross-sectional area, and
/^ is the core mean magnetic path length, hence A^l^ is the volume of the core.
23
From Faraday's Law, peak flux density is given by
2«,A,
When the core window area is allocated to the various winding, the total copper
loss can be expressed in the form [10]
p{MLT)nfl^, Pcu=— -L-i2L (3,11)
where P „ is the total copper loss,
p is the effective value of the wire resistivity,
MLT is the winding mean-length-per-tum,
W^ is the core window area, and
K^ is the winding fill factor.
From
the primary turns can be calculated out.
Substituting equation 3.12 in equation 3.11, the total copper loss is
, PJMmm, '" W K A^B^
**A^^u^c -"max
Total power loss is P,,,: P,,, = P , + P,„. (3.14)
Equation 3.9 indicates that reducing peak flux density B^^ can decrease the core
loss. However, the copper loss varies with the inverse square of B^^ according to
24
equation 3.13. Therefore, the optimum flux density B^ for minimum losses of
transformer can be calculated and is given by [10]
p^ll {MLT) 1 max
2K, W.AXPK m r fe
^ 2 . (3.15)
3.3.4 Evaluation of Wire Size
The number of turns for the primary and secondary sides can be computed using
the desired turns ratios. The fraction of window area allocated to each winding is
""''"' . (3.16) nj^ nJtot
Awi and Aw2 are pure copper cross-sectional areas of the primary and secondary
windings
K^^ ' I - ^ - M " / !
n, (3.17)
, ,MZ^ V2
« 2 (3.18)
In testing, Litz wire 50/40 was used on the primary side, and Litz wire 100/40 was
used on the secondary side. To make the current density in each wire match, two wires
were used to parallel on the primary side and two wires were used in parallel on the
secondary side. The transformer simulations can be seen in Table 3.3 and Table 3.4.
Different core types, P36/22 and P30/1, were used.
25
Table 3.3 P36/22 core transformer
B
Delta B
100
Input Voltage Maximum
50
Vout
2,5
Frequency
500E-HD4
Area of femte
202
Outer Core Diameter 2.96E-02
Inner Core Diameter 1.79E-02
H
Delta t
120EW ^
9
10
Calculated Number of Primary Turns
Input Voltage Minimum
Output Cun-ent
45
Integer Number of Primary Turns Input Current
Core Circumference
Primary Wire Length
Core Height Primary Wire
Resistance per 1000 feet
Secondary Wire Resistance per
1000 feet
1.44E-02 21.58 10.79
Secondary Wire Length
Integer Number of Secondary Turns
Total Power Lost in I Windings
Percent Total Power Lost in
Windings
Primary Winding
Resistance
Output Power
Power Lost in Primary Winding
Secondary Winding
Resistance
0003
Power Lost in Secondary Winding
Core Loss Percent Core
Loss Total Percent
Loss
007 06% 125 aoo4 0066 1.7 13.6%
Power Lost in Switches
Percent Power Lost in
Switches
Switch Resistance
Diode Drop Times 2
Diode Losses Percent Diode Losses
0.013 0.34 138%
27 8%
Table 3.4 P30/19 core transformer
1
2
3
L_ A B Delta B
100
Calculated Number of Primary Tums
n 5
6
7
e
9
10
11
12 13
Integer Number of Primary Turns
M . 5.00
Integer Number of Secondary Turns
yt^Twgys,'-
Total Power Lost in Windings
M 0.03
Power Lost in Switches
0.0
Input Voltage Maximum
50
Input Voltage Minimum
45
Input Current
O i _ ^ M
Percent Total Power Lost in
Windings
0.3%
Percent Power Lost in
Switches
0.0%
C D E F G H
Vout
2.5
Output Current
5
Output Power
12.5
Switch Resistance
0.013
Frequency
5.00E4O4
Core Circumference
0.062
Primary Wire Length
1,019 Primary Winding
Resistance
^^HHw** . Power Lost in
Primary Winding
0.004
Diode Drop Times 2
0.34
Area of ferrite
138
Secondary Wire Length
Outer Core Diameter 2.47E-02
Core Height
1.28E-02
0.204 i Secondary Winding
Resistance
0.001 I Power Lost in
Secondary Winding
0031
Diode Losses
1.7
Core Loss
1.6
Percent Diode Losses
^ . .13-6% 1 „ ,
Inner Core Diameter 1.50E-02
Primary Wire Resistance per
1000 feet
Delta t
1.20E-07 1 Secondary Wire Resistance per
1000 feet
21.58 10.79
Percent Core Loss
12.8%
Total Percent Loss
267% ^
26
3.4 Simulation of Circuit
This section describes how to realize the computer simulation of this power
electronics system using Pspice from MicroSim. The simulation process contains a buck
converter simulation, transformer simulation and feedback simulation.
3.4.1 Simulation of Buck Converter
The UC3827N-1 chip is changed into a sub-circuit that can be used to provide
regular PWM to push-pull power switches. The sub-circuit has two input interface ports
and four output interface ports. D and RAMP are input ports, and PWM-i-, PWM-, PUSH
and PULL are output ports. HS1 is the symbol of UC3827 in the simulation circuit. The
sub-circuit is shown in the Figure 3.6 [11].
<3I> •O
5 1
<pamp>-
l l t El
VI =0 TR=(3!Period J y i V2=1 TF=1n W TD=0 PW=@Blanf ng | PER=@TR-KgBlanking ^
TD=((a)Penod-K5)Blani4naJ
V I = 1 ^ ^ ' ^ TR=2n
V7=n " ^ TF=2n
1 <r
PFR=(7'fr?7)Pprinrt-w?7)FllankinnU
PW=@Period
TD=(5)Period
V9=l
±V3 V 1 = 0 / ^ TR=2n
^
Ik
TF=2n
PER={2*(@Penod-Kgaanking))
PW=@Penod+7@Blankng
(5 EWM EPOLY
5M
EPOL
<PiJsK> A I RdHiy
HS1 MUC3827
E3
^ •<rpnir>
EPOLY
Figure 3.6 Sub-circuit and Symbol of UC3827N-1 chip
27
A subsequent low-pass filter is required to average the dc level and to remove the
frequency and its harmonics. The practical low-pass filter is not perfect and must allow a
small amount of the high frequency harmonics, generated by the switch, to reach the
output. Therefore, the inductor current ripple is created. The peak inductor current is
equal to the sum of dc component and the peak-to-average ripple. The peak current flows
through both the inductor and the semiconductor devices that comprise the switch. The
inductor current waveform is symmetrical about the dc component, and hence the peak-
to-peak ripple is two times that of A/,.
M, zz ^^ ~ 0 DTs (3.19) ' 2L
Typical values of the current ripple are in the range of 10% to 20% of the full-
load value of the dc component current. Too large of a ripple would increase the peak
current ratings of the inductor and that of the semiconductor switching devices, which
would increase their size and cost. Therefore, 20% of the full-load value of dc current
was used as the current ripple.
V -V L= ' » DTs (3.20)
2Ai,
where V, =50V,D = 30%,
yo= 2.5x5 = 12.5 V,
Ts = — = = 20us , and / 50k
A/ = 20%A:10 = 2A, which
leads to L = 56.25x10"^ H.
28
Due to the charging and discharging of the filter capacitor, a ripple voltage is
generated. An output capacitor was used to prevent oscillafion and to provide low
impedance to the high frequencies.
The current is the flow rate of the voltage charge. Therefore, instantaneous
current can be expressed as the instantaneous rate of voltage change with respect to time.
i=C du^
dt (3.21)
AM = li^dt (3.22)
The switching ripple is normally required to be less than 2% of the dc output
component and is calculated to be
AM, < 2%jc2.5 = 0.05 V.
Then, the output capacitor can be calculated by [12]
TsAi C> ^(1-D),
4AM„
(3.23)
or C = 140^:10"'F.
The simulation circuit of the buck converter is shown in Figure 3.7.
Vin, 50V J ^ V 1 ^
3V
x
CI HI-1n
HS2 MUC3827
PARAMETEFK Blar*lng 50r>S Period 10uS
IRF150 M3
R4l 1k5
IRF150
M-l
lOOciF
I O U F T J C3
D2
1 Mesas'^
L1 56LH
C4
rr d3 IRF150
M2
Figure 3.7 Simulation of buck converter
29
3.4.2 Simulation of Transformer
The center-tap transformer was represented to be four inductors. Figure 3.8
shows the basic simulation circuit of the transformer.
E K3 K Unei r
COUPLINGS .99 L1 L2 L3 LA:
Lf. L3
L4
Figure 3.8 Basic transformer simulation circuit
Although a 100% coupling is assumed in ideal transformers, a small amount of
leakage flux exits in actual transformers. It is shown in the failure of inductance devices.
the failure of voltage transformation, and the existence of small inductance delectable in
the primary side when the secondary side is shorted. These factors suggest a leakage
inductance represented by L/y and L/2/n*'.
The effective tums ratio is defined in equation 3.24.
n^ = A-'O'?
11
(3.24)
The coupling coefficient is
k= ^'' V l l 22
(3.25)
The coupling coefficient K lies in the range 0<k< I. and is a measurement of the
degree of magnetic coupling between the primary and secondary windings. In a
transformer with perfect coupling, the leakage inductances Ln and L12 are zero. The
30
coupling coefficient k is then equal to 1. Construcfion of low-voltage transformers with
coupling coefficients of 0.99 is quite feasible. When the coupling coefficient is close to
1, the effective tums ratio ng is approximately equal to the physical tums ratio n2/ni.
The values of inductances Ll, L2, L3, and L4 were calculated using the
relafionship in equation 3.26 and equation 3.27 [13].
L = N-xAi^ (3.26)
A,=M4l^(nH) K/.)
(3.27)
For a P36/22 core, A = 7350 ± 25% (nH),
L, =L2 =5^^:7350 = 183.7M//. and
L3 = L, = 1X7350 = 7.35M// .
For a P30/19 core, A^ = 5750 ± 25% (nH),
L=L,= 5'x5750 = l43.1uH . and
L, =L, =1X5750 = 5.75M//.
The simulation circuits for a transformer using a P36/22 core and a P30/19 core
are shown in the Figure 3.9.
L1 163uH
0 K 3 • • ' : • •
K LIneaf COUPLINO=99
L1 i_2 : ; : : : : L3 L4
. . . . : : 7.35uH
7.36uH C
183uH
12
L4
L1 143uH
O l<4 K Linear
C0'uPLmG=9S Ll L2 L3 L4
5.75 uH ' L3
6.75uH
143uH (' L4
Figure 3.9 Simulation circuit of transformer using core P36/22 and P30/19
31
3.4.3 Simulation of Feedback
It is wrong to simply set the dc-dc converter duty cycle to a single value, and
obtain a given constant output voltage under all conditions. The negative feedback must
be used to build a circuit that automatically adjusts the duty cycle to obtain a desired
output value. This relationship of input and output is in Figure 3.10 [1].
In ^ / ^ In-Out G{s)
+ ^
Out G{s) G{s)
*' His) Oiit^
Figure 3.10 Input and output system with feedback
T{s) = Out H{s)
In \ + H{s)G{s) (3.28)
Equation 3.28 indicates that the transfer function can become infinite if HG = -1.
So the design criterion that HG ^ -1 can be replaced by the criterion that gain = OdB and
phase = 0° can not exist at the same time.
If H(s) is known, G(s) is selected in such a way that IHGI = 1 and the phase ^
180° exist. The amount of phase at OdB gain is called phase margin [7]. The phase
margin serves two separate purposes:
1. It relates to the damping of output transients.
2. It guarantees stability.
A system with a very small phase margin would ring for a very long time after a
transient. To select an adequate phase margin is extremely critical in feedback design.
32
The loop here has a phase margin of 45°at room temperature with nominal values and
nominal load.
Gain margin is approximately the inverse of the phase margin. The gain margin
measures how much gain the system has when the phase reaches 0°. The minimum gain
margin is 12 dB. However the gain margin is not very important in a buck converter
design [7].
One isolated amplifier and one error amplifier are needed for feedback loop and
are shown in Figure 3.11.
Figure 3.11 Feedback loop Amplifier
To design feedback compensation for a voltage control loop, two steps were
discussed:
1. Measuring open-loop response.
Consider a hypothetical increase in the DC control voltage of lOOmV. The
oscillator ramp for the PWM used is 1.6 V^p [4], so the lOOmV causes a change in duty
cycle of 100mV/1.6V = 6.25%. The maximum duty cycle = 50%. The real increasing
duty cycle is only 3.125%. Due to V^^ = 15V, the output voltage increases by
33
15Vx3.125% =470mV.
Since this is caused by a control voltage increase of lOOmV, the gain is
470m y Gain =-^^^^^^ = 4.1 = 13.4dB.
\00mV
As the frequency increases, the gain increases and the phase decreases, which is
caused by the LC tank resonance. The resonant frequency is given by
/ = ]= , (3.29) 2;rVLC
and is calculated to be / = 2538//z.
2. Designing a compensafion that ensures stability.
The requirement for system stability is that there are positive phase when the gain
= 1. A bandwidth of 500Hz was chosen which is well below the resonant frequency.
The open loop gain here is OdB, and the phase is -5°. So the gain necessary for
the error amplifier will reduce the gain by 13dB to get OdB at 500Hz. The error amplifier
gain should be G = -13dB at 500Hz.
To compute how much phase boost is needed from compensation is given by
Boost = M - P - 90
where M = 45° is the desired phase margin, and
P = -5° is measured open loop phase shift.
The result is -40° indicating no phase boost is required. /?,, = 2.2kQ. was chosen.
The capacitor value was computed by
C = —, (3.30) 27rfGR,
34
where / = 500Hz ,G = l3dB, and/?, = 2.2AQ lead to C = 260nF.
The resulting feedback circuit is shown in Figure 3.12.
Figure 3.12 Feedback loop circuit
3.4.4 Simulation Circuit and Results
A block diagram of the electronic power supply system is shown in Figure 3.13
[14].
Power input
I; * I
Power processor
1 Cont sign*
Controller
Power output
— * •
rol lis
< 1 < — Refen
Vo ^
Measure
;nce
Load
Figure 3.13 Electronics power supply system
Using this diagram, a converter circuit was built with a negative voltage feedback loop.
The difference between the output voltage and reference voltage influences the duty cycle
D. When this difference is larger, D is smaller, and the difference between the output and
reference would be smaller. The objective is to make the output voltage following the
35
reference voltage accurately, regardless of disturbances or component variations in the
system.
The circuits with different transformers are shown in Figure 3.14 and Figure
3.16. The results of simulations are shown in Figure 3.15 and Figure 3.17.
:± Vin_ 50V i - V 1 ^
3V
3 K3
COUPLINO'.M L2
C1
Ki'i ra HS2 MUC3827
IRF150 M3
1k> iT
IRF150
' ^
"ric3 1 0 u F | _ ,
D2 CN
1N6392
L1 SauH
Blanking SOnS Period 10uS
CIO H l -26
15V 1'
TL072/30VTI
U8A
8
R12
- W v -
I I Vre(
2 5V
.183.7uH
•4
L3 L4 L5
7.36uH ' .
R7 1 N63a2
-vw-!-W^-f-01 05 j RoutkJ
I C4
I " a Ha""'
^ l83 7uH
•Vv\-10 Re
LS 735uH
Re
.01 - ^ + ^
P« %10
R11 -Vv\-
* T
rL072/301/TI RS
2.2k
R9 - M V -
2.2k 2.2k
RIO
t^
Figure 3.14. Simulation circuit with a P36/22 transformer core
iwmfiffTinH"!'mffffli tflteial I IKI'S^lsalcxIoilfcMBlPKItfMI I i I I I I I I I I I
JUJiJ
glsmij 1 3 0 i J 8 " »v«'»«"'» I CM»i»3a I pD^gut |;gMo.s»s ||aiii-«s»~ B * " * * " ^ <JW4>*U " »»"
Figure 3.15 Simulation result with a P36/22 transformer core
36
3 K3 K_Ljn«jr
C0UPUNO.9S L2
Figure 3.16 Simulation circuit with a P30/19 transformer core
i^l&W 1 1 jQ.ic^lttlQ.lMliTtMBlU'Zl'^l-fl I I I F F H J J
l - l a l x l U£JJ<J
j |s.»| j j s y S " .i-)y*-<M« Ix iowi idJBowt* |H»te.s-s |Bi«a.s.M i gps . - ^ ||aM«~s~.. i34iD»oX"««M
Figure 3.17 Simulation resuU with a P30/19 transformer core
Since the value of V . is exactly 2.5V, the simulation result of the output voltage ref
must be about 2.5V.
37
CHAPTER IV
TEST PLATFORM AND RESULT
Though the simulation circuit shows good result, the PC board must be built for
researching how practical circuit works.
4.1 Buck and Push-Pull Signals Realization
4.1.1 Frequency
In the UC3827 chip, RT programs the charge current of the timing capacitor. The
charge current should be less than 500uA to keep the CT peak discharge current less than
20mA. The peak discharge current is the CT's maximum practical discharge current
value [4]. The charge current influences the charge time, which intemally sets the
maximum duty cycle.
RFP Charge current = < 5x10"" (4.1)
where REF = -i-5V is the on board reference, which
leads to RT > 5kQ.
The oscillator frequency is set by a capacitor, connected between pin CT and
GND, and a resistor, connected between pin RT and GND. The frequency of the
oscillator is given by [4]
0 77 fosc = ' (4-2)
OSC j^j ^ ^j
where the frequency is 50kHz.
38
According equation 4.1, RT = S.lkQ. was set and from
CT = ^J1~. ,4.3) RT*f
CT = 2.7nF was calculated out.
OSC
4.1.2 Overlapping Conduction Period
The UC3827 chip has push-pull drivers with a overlapping conduction period.
The push and pull switches are driven with the guaranteed overlap period to prevent
shorting of the energy storage capacitor in the push-pull transformer and to prohibit
excessive currents flowing through the transformer.
The DELAY pin can be used to program the overlap time of pin PUSH and
PULL outputs with a resistor connected to GND. The overlap time is given by
J = ^DELAY » 1 Q - 9 s e p (A A\ ^o.erlap ^^^^ ^^ SCC , (4.4)
where the minimum value of the resistor is R^ELAY - 18kQ, which leads to
7-.../.,= 0.12x10-^ sec.
4.1.3 RAMP and SYNC
The difference between a desired voltage and the actual voltage creates the control
voltage shown in Figure 4.1 [15]. This control signal is then sent to a comparator, where
it is compared with RAMP, which is a saw-tooth repetitive waveform. If the control
signal amplitude is greater than saw-tooth waveform, the switch control signal becomes
high, causing the switch to turn on. Otherwise the switch is off. So, the RAMP output
39
value can influence the duty cycle when T^ is constant. The control signal was adjusted
by changing the duration of the tum-on time.
Vo(desired)^
Vo(actual)—) >Vconitrol>^
r5l Repetitive Waveform
Comparator Switch Control Signal
Vcontrol (amplified error)
Switch Control Signal
Figure 4.1 Pulsed width modulation
In voltage mode control, RAMP voltage is fed to the noninverting input of the
buck PWM comparator after an intemal level shift. A resistor connected from pin VCC to
RAMP and a capacitor connected from pin RAMP to GND provided an input voltage
feedforward signal for the buck controller by setting [4]
Ri^AMP = 4 7 0 / : Q , C „ . w p =lnF.
SYNC is a bi-directional pin for the oscillator. The voltage is 3.6V when the
oscillator capacitor is discharged. Otherwise, the voltage is zero. Since a synchronization
circuit is not used, a IkQ or lower value resistor connected from SYNC to GND can
increase the fall time of the signal at SYNC. RSYNC ^^^ ^^^ ^°
^SYNC - 1 5 0 ^
40
4.1.4 Circuit and Signal Waveforms
The soft start was realized by attaching C12 from pin REF to CEA-i- in Figure 4.2.
Soft start has a delay period starting when power is applied to the converter. When a
control IC first receives power, the output voltage is zero. This causes the duty cycle to
be the maximum value, and very high current is drawn from the input and the power
devices. After a capacitor is attached, the duty cycle is limited to a maximum value
controlled by the charging of the capacitor. Once the capacitor is fully charged, the duty
cycle will be whatever it needs to be to regulate output voltage.
vfcc i:~v
gnd
O- 4 »
X9 4.74n Ih
Ul UC3827
^BUCK •3.SRC
4SS 5. Rj -IP
2. CSAO ^ C S A f ^ CSA Ui!x/EA.O
J J GND - l^CEAf
l 4.74n ± . i R8 CIO T > 470
1
PULLP^
DELAYKI SYNC T5
CT RT
•vEA REF
VEAf CEA
vr 16
W T7
RQ y . .•• 18k '
^:^:LM ih £LLL. ..sAZk. VvV
C12 ||1u
Figure 4.2 Buck and Push-Pull signal realization
The buck and push-pull signals were measured by Agilent's infiniium
oscilloscope. The waveforms are shown Figure 4.3 and Figure 4.4.
41
Measuiernerils Mdfkeis I Scales
Fr«Quencgll») Dutg c g c l e l l " )
current rosari std csv 33.1931 ii»z •? 53.15612 kHz ? 3.59';83£ kHz ^ . D Z '; iLSi/: ? 2.S9y 5.6787 V 5.522-'l i/ 952.'^CS nV
1 2 . 6 H 8 2 kHz • i 2? .033 kHz 0.0/: V ^2.?Z
Figure 4.3 Buck signal waveform
^ [oplQ|#| E| l i Markers I Scales 1 Measuremen^s |
Frequency(1»J Ffequenci4(2»)
i T i P i e ( l ' l - i i - ) Cutu cucU il'.i
current 26.523115 kHz 26.52622 kHz 161.7 ns SO.AY.
fie an 26.53837 kHz 26.53811 kHz 153.017 ns 50 .A)'.
std dev 11.53731 10.25731 31.587 ns 0.0193;;
min 26.51176 kH: 25.99701 kH2
-2.1039 jis 50 .Ay.
[lax 27.53509 kHz 26.56261 kHz 180.6 ns 50.5]^
Figure 4.4 Push and pull signals
4.2 Push-Pull Isolated Buck Circuit With Feedback
The simulafion circuit can not be copied exactiy to the PC board, so some changes
must be done to make the circuit work on the PC board.
42
4.2.1 Push-Pull Isolated Buck Circuit
The buck, the push, and the pull signals will be sent to three MOSFETs. An
individual gate resistor was needed for each MOSFET, because MOSFETs have both
capacitance and inductance. This potentially forms an underdamped resonant tank. Due
to this, MOSFETs can be observed to oscillate at lOOMHz [7]. The gate resistor damps
the oscillations. At the same time, the resistor can limit the source current.
In output circuit, the parallel diode rectifiers were connected at the secondary
side of the transformer. These diodes work as power switches in Figure 4.5. The
inductor value was 56uH and the output capacitor value was 140uF. This was previously
done in the simulation circuit.
pouierjn
O-
\*c O-
pjgnd
TXI 1 S
R6 470k'
In
DtNSOTJ ?^r] Ul uc
c7/-"^^ l a
f BUCK 5RC SS
i lv Re
•\K-
-ST^&T
T F 1h 474(1
4.74n J_ C10
P U L L » -
HmP OSlAllO R9 y , / . , ^ _aCEAD S'NC
2. CSAO CT 19
CSA* CSA
X J J CN flCEA*
RT \/EA REF
•vEA* CEA
• R8 : 470
R3
2 IRF3710S
'ITP
j:^
iRF3710S
m
_I5 M .
Ml
lOOuT m, " ' r - ^
WE^ -au./J1 .7,9i< ZH C12 ,, lu
buck_sat«
sk34
^5 3^6 '''^''»!^^ )PIO
4- • f ' l i ' T ' "
4=C3 In
1
7DuF Dower out
r ' |u«IRF37IDS ' te | M3
R4 J 1 0
powtr_out_gnd
Figure 4.5 Buck and Push-Pull circuit
4.2.2 Practical Feedback Loop
An isolation operational amplifier shown in Figure 4.6 was used to keep the
negative voltage from being applied directly to the IC pin. Input points 2 and 3 were
43
connected with circuit output points V- and V+. R = lOkH was chosen due to power loss
given by P. = ^ R
'vb
R23
tOk
• , \ * e
LD74/^01/TI I I
T
U3A -i 10k
R22
R20
10k
R21
10k
I Figure 4.6 Isolafion amplifier
lOk
VQ=0.5V^-Ix\0k=V^-V_
From the calculation, the isolation amplifier gain is one.
The UC3827 chip has three error amplifiers, the current error, the current sense
error and the voltage error amplifiers. They are all connected to the PWM comparator.
The current error amplifier (CEA) was used as a compensated error amplifier shown in
Figure 4.7 [2].
Compensated error amplifier
PWM Controller
Va
i Power stage Including the Output Filter
f » t n
Figure 4.7 Basic feedback control loop
44
In circuit shown in Figure 4.8, the output voltage was pushed to CEA- through an
isolation operational amplifier. The feedback reference voltage is at the REF pin of the
IC chip. The reference voltage value is 5V, but the output desired voltage value is 2.5V.
Normally, a resistor was used to divide reference voltage to get the desired output
voltage. So R^ was used to parallel with R^. When R.^ value is equal to R^ value, the
desired output voltage value was half of reference voltage value (2.5V). A RC series
with a parallel capacitor were connected from CEA- to CEAO to increase phase boost.
Positive phase boost made circuit more stable. The RAMP was compared with CEAO to
tum on the switch at a regular interval and terminate the pulse when the RAMP and the
CEAO are equal. So the CEAO can be used to adjust the duty cycle.
power r
"o-
0
o-
TXl 1 5
270k f lu 1
D1N5073
— c t -c-n 82^
"•Jr f
-'•AK—^
R710k }
R8 10k5
'^t' 4UCI SRC '"-'l-Jrr-
OELA' C£AO f^NC CSAO CT CSA» RT CSA VtA ./EAO REf
IJj CjHi) K/£M JlCEA.. CEA
I 4.7u _ 4
Ice TlOOuF R3
-^AVID
IRF3710S M2 1
03
Ul ;IRF37I0S
4 7 " F 1 ^ ! £ S ^
T5 ^ CS , 1 ^
^ 1
R1 10
— \*..—
100 RJ»
U 25.H ! rt S
bii
— • -I r V*-, Ri I 47ctqO20s ^ «-1 ^
fi-|i_IRF3710S
O p j n d
3
R23
10k
' W v - * r R24
10k
T - * R20
- W v -lOk R21
-VA—
a.
LDATRJJ 1 * ^lOk
470u C13
- O p i o poiii«f_oul+
- O P2C po«ef_oul-
Figure 4.8 Circuit design
4.3 Debug and Test
The power supplies, +15V Vec for the UC3827 chip and -15V Vee for the
operational amplifier, were given by TENMA, which is a triple output dc power supply
45
instmment. A XANERTX power supply was used to supply 50V dc. The Chroma's
programmable dc electronic load 6310 was used to add a load and to regulate the current
of approximately 5 A to lOA.
4.3.1 PC Board Layout
A two layered PC board was made consisting of
1. Component layer (red).
2. Solder layer (blue).
Two boards were made with different traces of
175mil traces for 5 A output current.
500mil traces for lOA output current.
ECBMmmmmim B E'" i* C ' ^ ^'°" Qori^Mt lools Uxsy ^ridon Help
3
0150,00, 2900 M
Figure 4.9 Component layer of PCB with 175mil traces
46
aamssMMmam I £ie £01 liHH yiMi Cmhgira look ^toay ^nlow M<t>
DJCg y | a l I I I I I : ^ I ^ | Q > I ^ | Q , | \ h l I 0-1 ° I ISOmil z\ iUHSolde,
• -i*l»l
3 Oitraca_50
5 J|SHrt| ' j i S : i i ^ S 6 BJCHAPTERIV IpPOTOnLabPo j aMicoSniMK | |grMooSn.Sch „ | ^MiooK^I PhoL ||BM«aoSii P „ ?g.^ (g j f i * . 11 25 AM
30oaoo. iiso.n
Figure 4.10 Solder layer of PCB with 175mil traces
M'WH!MilJ.I,MI,fl.llHkl!lBl l - l a i x l • E*! E * Eio" VBW £onl9Je loolj Ubioiv Wr«iow Uolp . | g | x |
D | c g | y | a J I M I I ^ ,K |Q . | g3 |Q , | \ h | I 0-1 o I ISOmii j j J^QC^mponent 3 ^ ( roce_50 3
240OX. 2800,M
J ) SIM I 23 i 6 ^J ® SB fi BJCHAPTERIV I ^De»iirl.abD« | gMpoSniMM | [gfMooSniSch | ^ MicrooB Phol | |^ |MiaoS»P, 13N( 9 j S i - 11 31 AM
Figure 4.11 Component layer of PCB with 500mil traces
47
• Fie im Qim yiew to^igue loob Ubory Itfndwi tJelp
• l a i i l B l a ! M l 1 1 ^ - K I Q - I ^ I Q ^ I \ h l I '>! ° I |50m.l ::J O J ^ S o l l e r
25S0X, 330300 Ready
3 OllTBCe.SO
Diow Tioce
- j g l x l
— 3
J8S>»n| 23 S ^3 S H fi BjCHAPTEBIV I ^DeagiLabDe, I ^MiaoSriMo., | ^MooSmScK „ | ^MKiixoltPhol ||g[M.cioSM P,,. tgxf 9 j f l S i 11 35AM
Figure 4.12 Solder layer of PCB with 500mil traces
4.3.2 Tesfing
Oscillations of signal waveforms indicate that the circuit is not stable. These
oscillations are influenced by the power supply filter capacitor and by the output
capacitor that follows the rectifier. To get a better signal, the value of the capacitor
following the input power supply was increased from 1 lOuF to 940uF. A large
electrolytic capacitor was used following the input power supply because it would
affectively bypass the high-frequency transients and noise spikes [9].
The PC board interface was separated into three parts:
1. Buck and push-pull signals,
2. Input power supply.
48
3. Output power supply.
Each part has its own ground trace. A signal ground is a trace that carries low; a power
ground is a trace that carries high currents. Signal ground and power ground should be
kept separate when PC board was made. However, signal ground and power ground
should be directly connected when the board was tested. Otherwise signals on each part
are either floating or distorting. When some areas like "islands" on the PC board are not
connected with main ground traces, some mistakes would happen.
Though high frequency is good for circuit performance due to the on-off
transition of semiconductor rectifiers contributing high-amplitude spikes, and wider
bandwidth converter keeping converter small, high frequencies like lOOkHz or more are
not practicable because such high frequencies would keep MOSFET on and would not
get desired buck and push-pull signals.
In dc power supply, ripple implied the residue of AC delivered to the load as the
consequence of imperfect rectification and filtering. Ripple exists due to the ESR
(effective series resistance) of the output capacitors and the switching noise, which
occurs during transition time of diodes and MOSFETs. Normally, the inductance should
be small and the capacitance should be large to decrease the converter's output
impedance. But the output voltage can not simply be adjusted by reducing the size of
inductor. A certain minimum inductor value was needed to guarantee a continuous
current. The capacitor following output rectifier was increased from 140uF to 940uF to
reduce ripple.
Aliasing occurs when the oscilloscope neither has enough sampling frequency nor
has enough memory to store the entire waveform occurring in a sweep period. The best
49
practice is to sweep over a very broad fime to catch enough samples. The testing result of
output voltage without load is shown in Figure 4.13. The chroma's programmable dc
electronic load 6310 was used to add a load. Figure 4.14 and Figure 4.15 show the input
and output signals of transformer with adding a load at output.
^ [oO|l3|#| mlMMIlBW ^kl ^ BBMAMMJIi 4l>l>l olB mHij' ISBBHHBBWll Mafkws | Scates |
curvent r-iean std 6iv win '• . jv i j i2 i 2.5b45 V 2.5S02S V 26.1SS nV 2.5111 V 2.6773 V
Figure 4.13 Output voltage without load
[oolcalal fflj Measurements Markets Scales
V avgf l ) Fr«qu«ncull»)
current 16 .1409 V 25.9J5D k-H:
nean 1 6 . 8 0 6 5 V
std dev 575.1'! nV
•? 21.369')1 kHz ? 6 .665697 kHz Duty c«cl«tl») '? 0.90/.
17.6940 V •> C.57Z
16.9400 V ? 2.43):
571.70 MV
nin 15.9999 V e.64853 kHz o.oy; 16.2720 V
Mix 17.5715 V
•? 26.0053 kHj ? 48.7/
17.7722 V
Figure 4.14 Input signals for push-pull transformer
50
fft©|l3|al l l Measuiemenl',
Fi'siquency l l • I riutij c y c l e l l ' l
Markers Scales f i i rront SA.n nV 26.0945 kH; 49.5/:
-115.21 nV
T:;.li.ilJ niV 25.9Rt!57 kH,-50.OZ
-120.375 MV
5.2244 nV 98.S3--;gi H; 0.218/; 5.4354 niV
4«.0« nV 25.7065 kH: 49.3/: -163.61 MV
lO.'.Ec! nV 26.2681 kH: 50.?)-: -100.04 nV
Figure 4.15 Output signals for push-pull transformer
4.3.3 Power Supply Efficiency
Power supply efficiency is the ratio of total output power to total input power or
1 = out (4.5)
Plo.ss=Pin^i^-V) • (4.6)
Each breadboard was tested with a current of 5A and lOA. The P36/22 and
P30/19 transformer cores were tested and a summary of the results are shown in Table
4.1 and Table 4.2.
51
Table 4.1 Power Supply Measurements for the 175mil Trace PCB.
Core Type
P36/22
P30/19
P36/22
P30/19
Input Current
(A) 0.37
0.38
0.76
0.77
Input Voltage
(V) 49.8
50.1
49.8
50.1
Output Current
(A) 5.025
5.05
10.05
9.91
Output Voltage
(V) 2.52
2.53
2.49
2.5
Efficiency (%)
68.7
67.1
65.4
64.2
Table 4.2 Power Supply Measurements for the 500mil Trace PCB.
Core Type
P36/22
P30/19
P36/22
P30/19
Input Current
(A) 0.33
0.38
0.64
0.78
Input Voltage
(V) 49.9
50.1
49.9
50.1
Output Current
(A) 5.08
5.03
10.18
10.07
Output Voltage
(V) 2.26
2.52
2.07
2.5
Efficiency (%)
69.9
66.5
66.34
64.4
From comparing the efficiency results, the highest efficiency for lOA current
output happened with a P36/22 core type transformer and a PC board with 500mil output
traces. The analysis of the power loss would depend on this condition alone.
For lOA current output, the highest efficiency is 66.34%. The power loss is
p = 0.64X49.9JC(1 - 66.34%) = 10.75W .
52
Three power MOSFETs, M1-M3, were used as switches in the circuit. MOSFET
Ml, driven by a buck signal, causes power loss due to its on-resistance value of 0.013Q.
The current waveform is shown in Figure 4.16.
tP-"
^ [©0|S|3| mHIHIIfWiBl <.U ^ IWMIHII^ 4l«Ul D l ^ H m±\^ tSESSIHSB^l Maikets 1 Scales 1
currsrit nean std d«v Mir na Dutij cgc l i l2» i 50.6/ ? ^8.8/ ? 9.52/ ? O.U ? 53 .0/
Figure 4.16 Current waveform of Ml
The average current value can be calculated by
^.v..„.=l •5-^50.6% = 0.759 A
From equation 4.7
P = f R MOSFET average o n _ resis tan ce '
(4.7)
the power loss of the MOSFET was calculated to be
PMOSFET = 0.759 JC0.759X0.013 = 0 .0075W
The value of inductor voltage was 1.62V. The power loss of inductor is given by
P= U l (4.8)
and P = 1.62x0.759 = 1.23W
53
MOSFETs, M2 and M3, are in parallel in each bridge of the push-pull. They have
the same power loss. From the power waveform in Figure 4.17, the power loss of
MOSFET M2 is given by
T = 3Siis,
p=y^\pdt, (4.9)
and P = 1
38x10 -6
,60jclO-^-hlljclO-^-hlOjclO-^) , ,„ , ( = 1. IVv
^ foo|a|#| ffll Markers I Scales Measuiement
f l i l t u C i j c l y
current 19 .Al
;td dev }.(i2Ay.
Figure 4.17 Power waveform of M2
Another major cause of power loss is due to the transformer. The power loss in
transformer was calculated from the equations in 3.3.2 of Chapter III.
1. Core loss is given by equation 3.9.
Pf^ =1.16W
54
2. Copper loss is given by equation 3.13.
P „ = 0.0388W
3. Total power loss P, ^ is given by equation 3.14.
P = 1 8W transformer *••>- '"
The schottky Rectifier, 47CTQ02S, caused a considerable amount power loss in
the output circuit. From V^ = 0.34y and P^^^ = 0.34x10.18 = 3.46W , the total power
loss was calculated to be
P,„, = 1.1x2-H 0.0075-H 1.23-H 3.46-h 1.8 = 8.7\y .
Other factors contribute to the total power loss:
1. Schottky diodes often have a substantial capacitance from the anode to the cathode
that has to be charged and discharged every time the voltage across the schottky
changes.
2. Circulating currents in a conductive magnetic core cause eddy currents, which are
created by voltages induced by changing magnetic flux in the core, and tend to follow
circular paths normal to the direction of the magnetic flux. Eddy currents represent a
power loss and are independent of load current.
4.3.4. Improvements
Minimum power is lost in a magnetic structure when
A. Core Losses = Copper Losses,
B. Primary Copper Losses = Secondary Copper Losses [16].
55
From the calculation result in 4.3.3, the power loss in the core is much greater
than the copper losses. Due to this, the number of tums increased to 8:1.
Maintaining separate signal and power grounds is essential for power supply
design. Due to high frequency, the best way to attach the two grounds together only at
one point is at a bypass capacitor in the power entry point [9].
The push MOSraT M2 switching waveforms are shown in Figure 4.17. The high
voltage and high current simultaneously cause excessive power loss at turn-off. To avoid
this problem at turn-off, MOSFET IRF3710S/L was used to replace IRF2807S/L.
IRF37 lOS/L has longer turn-off delay fime than that of IRF2807S/L [8].
VDSS = 100V
Ros;cr|= 0.025a
\j = 57A
Figure 4.18 Block diagram of MOSFET IRF3710S/L
The power wave shown in Figure 4.19 is using MOSFET IRF3710S/L. The
power peak value of the new MOSraT is smaller than that of the previous MOSFET.
Though Rpsum) of IRF37 lOS/L is larger than that of IRF2807S/L, the power peak values
still became smaller due to a small amount of current flowing through it.
56
a^fPrnoiM Q^f^mam^ tp-" Or / '^v . . vpitdge aa^iise H^-^
':;*'.J'-:f. / : V-.' power losi in M.i
. > . — . . ^ . . — , r -v * -< - - \ ^ . - ^ — - • • •"-^•*^„f,r^—--^ i ,
— " ^ — ™ _ ^ . . — ^ ^ ^ ^ .current flowing M2
v..
'^ [oO|(3|#| mlliMIIW ikl t g g M a w <lflUI QlQ^BH-v^ ^ f
Figure 4.19 Power waveform of M2 with MOSFET IRF37 lOS/L
The power efficiency is given by
Input voltage = 49.8V, Input current = 0.64A,
Output voltage = 2.08V, Output current = 10.33A,
n out out
UJ^ (4.10)
„ 2.08x10.33 ^^ , ^ P = = 67.4%
49.8x0.64
4.4. Physical PC Board
Two physical PC board layouts are shown in Figure 4.20 and Figure 4.21.
57
Figure 4.20 Physical PCB with 175mil trace
Figure 4.21 Physical PCB with 500mil trace
58
CHAPTER V
CONCLUSIONS
Design of a high frequency and high current output switch-mode converter with
highest possible efficiency is the goal of this research. It is a known fact that due to the
very high output current, the power loss in any device would be large. As the operating
frequency increases, the copper losses decrease because of the lower volume of the
windings. These factors give the limit of the frequency and the efficiency in this project.
The experimental power supply setup was 50 V out at a current of lOA. A
compound buck converter topology made of two stages to step down the input voltage
was used. All activities necessary to design a power supply were taken, from architecture
definition, schematic design, simulation, physical board layout, debugging and test issue
resolutions. Additional tests were done in designing high-frequency magnetic
components designing such as transformers. The results obtained from the experiments
showed the effect of optimization on the efficiency.
A snubber circuit may be helpful to be added across the schottky diode. A
snubber network is used to reduce the voltage transient spikes and by reducing the EMI
to improve circuit performance [17]. However, snubber circuits will not improve power
efficiency.
The best way to improve efficiency is to use synchronous rectification, which is
the process of replacing the output recfifier with controlled switches. Since one of the
major causes of power losses is the output rectifier, replacing the rectifiers with
controlled switches would increase system efficiency significantly.
59
For future designs, another high-frequency magnetic component: inductor, which
is the major component in power electronics, should be designed in synchronous
rectification for the power supply.
60
REFERENCES
1. Lenk, Ron, Practical Design Of Power Supplies, Institute of Electrical and Electronics Engineers, Inc., New York, (1998) pp.18-47 pp.143
2. Mohan, Ned, Tore M. Undeland, and William P. Robbins. Power Electronics: Converters, Applications, and Design. John Wiley and Sons, Inc., (1989) pp. 164-172
3. Mohan, Ned, Tore M. Undeland, and William P. Robbins. Power Electronics: Converters, Applications, and Design. John Wiley and Sons, Inc., (1989) pp.55
4. Product data handbook, Unitrode, 7 Confinental Boulevard, Merrinack, NH 03054. 3-247,3-248
5. Mohan, Ned, Tore M. Undeland, and William P. Robbins. Power Electronics: Converters, Applications, and Design. John Wiley and Sons, Inc., (1989) pp.17
6. HEXEFT Power Schottky Rectifier Designer's Manual, publication HDM-3, 2000. International Rectifier, 233 Kansas St., EI Segundo, CA 90245.
7. Lenk, Ron, Practical Design Of Power Supplies, Institute of Electrical and Electronics Engineers, Inc., New York, (1998) pp.121-142
8. HEXEFT Power MOSFET Designer's Manual, publication HDM-3, 2000. International Rectifier, 233 Kansas St., EI Segundo, CA 90245.
9. Lenk, Ron, Practical Design Of Power Supplies, Insfitute of Electrical and Electronics Engineers, Inc., New York, (1998) pp.209-212
10. Erickson, Robert W., Fundamentals of Power Electronics. Chapman-Hall, Inc., New York, (1997) pp. 517-524
11. James C. Dickens., Pulsed Power Laboratory, Texas Tech. University.
12. Krein, Philip T., Elements of Power Electronics. Oxford University Press, Inc., New York,'(1998) pp. 150-153
13. Soft Ferrites, Data Handbook MAOl, (1998) Philips, Woodstock, New York 12498 pp. 467-489
14. Mohan, Ned, Tore M. Undeland, and William P. Robbins. Power Electronics: Converters, Applications, and Design. John Wiley and Sons, Inc., (1989) pp.61
61
15. Heumann, Klemens, Basic principles of Power Electronics. Spring-Verlag Berlin Heidelbeg, New York, (1986)
16. Lenk, Ron, Practical Design Of Power Supplies. Institute of Electrical and Electronics Engineers, Inc., New York, (1998) pp.83
17. Gottiieb, Irving M., Regulated Power Supplies. TAB Books, McGraw-Hill Inc., New York. 4* Edition, (1992)
62
PERMISSION TO COPY
In presenting this thesis in partial fulfillment of the requnements for a master's
degree at Texas Tech University or Texas Tech University Health Sciences Center, I
agree that the Library and my major department shall make it freely available for
research purposes. Permission to copy this thesis for scholarly purposes may be
granted by the Director of the Library or my major professor. It is understood that
any copying or publication of this thesis for financial gain shall not be allowed
without my further written permission and that any user may be liable for copyright
infringement.
Agree (Permission is granted.)
Stiident Signature Date -r
Disagree (Permission is not granted.)
Student Signature Date
