MICROPROCESSOR & CONTROLLER BASIC CONCEPTS AND ... · 1.9 interrupts 18 1.10 sample intriguing questions 20 chapter 2: programming 8085 microprocessor 24 2.1 instruction format 24

MICROPROCESSOR & CONTROLLER BASIC CONCEPTS AND ILLUSTRATIONS Airo Publication | 2019


MICROPROCESSOR & CONTROLLER BASIC CONCEPTS AND ILLUSTRATIONS

Dr. Raghvendra. D. Kulkarni

Dr. S.G. Hiremath

Dr. Ibrahim Patel

Dr. Babu Suryawanshi


airo

© 2019, AIRO PUBLICATIONS

First Edition: 2019

ISBN: 978-93-88136-20-4

Price: 250/-

Published by: Airo Publications, Gwalior. Phone: 0751- 4218441,

e-mail: [email protected] Website www.airopublication.com

This book or part thereof cannot be translated or reproduced in any form without the written permission of the authors and the publisher

mailto:[email protected]

http://www.airopublication.com/


PREFACE & ACKNOWLEDGEMENT

Microprocessor & Controller is beyond the reach of average

or par below average student but fact of the matter is that every

student will enjoy the intelligent device working and application if

concepts are made clear to him.

This book is launched keeping in view the difficulty the student

faces in understanding the concepts and an attempt is made here to

present the concepts in a way the student understands it better.

The language is simple. The illustrations are added to make

the concepts even more clear and literature from Introduction to the

end of the book will be knowledgeable to the students.

Since this is the first edition suggestions for further

improvement in the text would be warmly welcomed.

We as authors acknowledge every work and all concerned in

this field.

Dr. Raghvendra. D. Kulkarni

Dr. S.G. Hiremath

Dr. Ibrahim Patel

Dr. Babu Suryawanshi


CONTENTS

CHAPTER 1: 8085 HARDWARE DESCRIPTION AND CONCEPTS 1

1.1 FEATURES OF 8085 2

1.2 SAMPLE INTRIGUING QUESTIONS 3

1.3 ARCHITECTURE OF 8085 5


1.5 8085 PIN DIAGRAM 9


1.7 MEMORY INTERFACING 15


1.9 INTERRUPTS 18


CHAPTER 2: PROGRAMMING 8085 MICROPROCESSOR 24

2.1 INSTRUCTION FORMAT 24

2.2 8085 ADDRESSING MODES 26

2.3 INSTRUCTION SET OF 8085 28

2.4 SAMPLE INTRIGUING QUESTIONS & PROGRAMS 34

CHAPTER 3: INTERFACING 46

3.1 8255 PPI 46

3.2 PIN DIAGRAM OF 8255 48

3.3 OPERATIONAL MODES OF 8255 50

3.4 CONTROL WORD FORMAT 51

3.5 SAMPLE INTERFACING EXAMPLES 52



4.1 8086 FEATURES 56

4.2 8086 ARCHITECTURE 57

4.3 8086 HARDWARE PIN DIAGRAM 69

CHAPTER 5: 8086 SOFTWARE DESCRIPTION AND CONCEPTS 76

5.1 INSTRUCTION SET 76

5.2 8086 ADDRESSING MODES 94

CHAPTER 6: PROGRAMMING 8086 97

6.1 PROGRAMMING STEPS 97

6.2 ASSEMBLER DIRECTIVES 97

6.3 SUBROUTINES AND MICROS 100

6.4 BIOS AND DOS INTERRUPTS 102

CHAPTER 7: PROGRAMMING WITHIN 8086- EXAMPLES 105

7.1 CONCEPTS 105

7.2 WORKED EXAMPLES ON 8086 109



8.1 8051 FEATURES 177

8.2 8051 ARCHITECTURE 178

8.3 8051 REGISTER ARCHITECTURE 180

8.4 8051 HARDWARE PIN DIAGRAM 185


CHAPTER 9: 8051 SOFTWARE DESCRIPTION AND CONCEPTS 188

9.1 8051 INSTRUCTION SET 188

9.2 ADDRRESSING MODES 194

CHAPTER 10: PROGRAMMING 8051 198

10.1 PROGRAMMING STEPS 198

10.2 ASSEMBLER DIRECTIVES 198

10.3 INTERRUPTS 200

10.4 PROGRAMMING CONCEPTS 201

10.5 PROGRAMMING EXAMPLES 202

10.6 OBJECTIVE WORKED EXAMPLES 215

CHAPTER 11: BASIC SOFTWARES 217

11.1 8086 MASM 217

11.2 EMULATOR 219

11.3 8051-KEIL SOFTWARE 222

INDEX 231

*****


1

CHAPTER 1

8085 HARDWARE DESCRIPTION AND CONCEPTS

Microprocessor is seen as a man made human brain which

intelligently and logically follows human instructions. The decision

making capability of the microprocessor incorporates control unit,

arithmetic logic unit, memory, data storage and its manipulation,

transmission of information, time sharing, multiprocessing and parallel

processing. Microprocessors are designed as per the data sizes and speed

and this aspect is changing day by day with increase in volume of data and

change in processing speed accordingly.

Microprocessor is the central processing unit (CPU) of a micro-

computer, integrated on a very small chip performing arithmetic & logical

operations and interface with external devices. The microprocessors and

microcontrollers are said to be cost effective, of small size, versatile and

reliable.


2

Microprocessor works on the basis of fetch (get the information),

decode and execute. The information can be seen stored either in registers,

memory and input/output devices hence there will read and write

operations pertaining to memory or input/output devices. Once the data is

fetched it will be decoded i.e. it will made in the language the system

understands and the information will be outputted or executed. Following

topic and subtopic covers 8085 microprocessor basics and concepts of

programming.

1.1 FEATURES OF 8085

1 8085 is supplied in a 40-pin DIP NMOS package having

Von Neumann design produced by Intel in 1976.

2. Works on +5V voltage supply at 3.2 MHz clock.

3 The data length is 8-bit and hence all registers are 8-bit wide.

4 The address length is 16-bit and memory addressing capacity is

64K.


3

5 It has 8-bit registers viz. A, B, C, D, E, H & L among them B, C,

D, E, H & L are used as register pairs BC, DE & HL for 16-bit data

operations.

6 It has 16-bit program counter.

7 It has 16-bit stack pointer.

8 The status of the arithmetic, logical and branch instructions are

determined by 8-bit flag registers which are classified into sign,

zero, auxiliary carry, parity and carry.

9 It has 8224 on chip clock and 8228 control signal generators.

10 It supports three maskable vectored interrupts viz. RST 7.5, RST

6.5 and RST 5.5, one non-maskable interrupt (TRAP), and one

external service interrupt (INTR).

11 The programming model includes 74 instructions which can be

used for data transfer, arithmetic, logical and branch operations.

1.2 Sample Intriguing Questions

1) What is memory map and give the memory map of 8085?

Ans: 8085 has 16-bit address line and it can address 2^16= 65,536

memory locations. Each location holds a byte of information. The


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starting address is 0000H and the ending address is FFFFH. The

range of memory address 0000H-FFFFH is referred to as memory

map.

2) Why Program counter is 16-bit?

Ans: The program counter points towards the address of next instruction

in the program and instructions are stored in program memory and

all memory related operations are 16-bit and hence program

counter is 16-bit wide.

3) What is the largest number handled by 8085?

Ans: The data lines are of 8-bit i.e. 2^8=256 (OOH-FFH) and hence the

largest data handled by 8085 is 11111111 (FFH or 255 in decimal).

4) What is significance of Von Neumann architecture?

Ans: The significance is that same memory can be used for both data and

program.


5

5) Microprocessor is meant to carry basic arithmetic and logical

operation but, how come it carries out complex mathematical

operations?

Ans: The microprocessor is having co-processors such as 8087 which is

responsible to carry out complex mathematical operations.

1.3 ARCHITECTURE OF 8085

The architecture and its building blocks viz. Control Unit, Arithmetic and

Logic Unit and Registers are explained in the following paras:

Address/Data Lines:

8085 has 8-bit data line which are bidirectional and data handling capacity

is 2^8=256 (00H-FFH). The address lines are 16-bit and the total number

of address lines are accounted to 2^16=65,536 (64K) that means it has

64K addresses and the map is 0000H-FFFFH.

Control Unit

Produces timing signals for internal and external operations such as

memory input/output read/write.


6

Figure 1.1: 8085 Architecture

Arithmetic and Logical Unit (ALU)

Performs all arithmetic and logical operations within the processor such

as addition, subtraction, multiplication, division, logical AND, OR, etc.

Registers

It has six 8-bit general purpose registers B, C, D, E, H, and L and these

can be paired into BC, DE and HL for 16-bit operations.


7

Accumulator

Accumulator register A can also be considered as a general purpose

register and predominantly finds application in arithmetic, logical and

input/output operations.

Flag Register (Flip- Flops)

Flag register is an 8-bit register incorporated into ALU. Flags are set or

reset after an arithmetic or logical operation. The flags are Zero (Z), Carry

(CY), Sign (S), Parity (P), and Auxiliary Carry (AC). The Zero (Z) and

Carry (CY) flag are found application in normal arithmetic operations

whereas Auxiliary Carry (AC) flag is used with respect to BCD

operations. The Sign (S) and Parity (P) flags can be used for singed

arithmetic and logical operations.

Program Counter (PC)

It is a 16-bit register which always points towards the location of next

instruction. The starting address pointed by it will be 0000H and ending

address pointed by it will be FFFFH. All in all, it points to 2^16= 65,565

locations.


8

Stack Pointer (SP)

Stack is an additional memory used for temporary storage and the pointer

for this memory is a 16-bit register called as stack pointer (SP) and its

principle of operation is last in first out (LIFO).

Instruction Register/Decoder

Stores the fetched instruction from memory and decoder decodes it and

control signals are issued accordingly.

Memory Address Register

Holds address of the next instruction from program counter (PC).


1) Define 1K byte memory?

Ans: 1K =1024. Thus, the 1K memory has 1024 registers with starting

& ending addresses of 0000H-03FFH. Each address or register

holds 8-bit of information.

2) Elaborate on processor and memory interfacing?

Ans: The speed of microprocessor and memory is considered as same

and hence no external devices are required for interfacing whereas

for outside devices an interfacing device such as 8255 is required


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since compatibility and speed differ.

3) Why crystal oscillator is used in 8085 clock generation?

Ans: Crystal is assumed to be generating fixed frequency and it has

high stability.

1.5 8085 PIN DIAGRAM

Figure 1.2: Pin Diagram of 8085


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A8 - A15

High Order Address Bus: These 8 lines are unidirectional high order

address buses.

AD0 - AD7

These are bidirectional multiplexed Address and Data Bus. During T1

memory cycle the lines are used as low-order address bus and then are

used as data lines. They can be separated by using a latch and ALE signal.

ALE

Address Latch Enable: When the signal goes high, low order address bus

is separated from de-multiplexed bus using a latch.

S0 & S1 Status Signals

The following combination of bits gives out appropriate control signals.

S0 S1 OPERATION

0 0 HLT

0 1 WRITE

1 0 READ

1 1 FETCH


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RD

READ: When this signal goes low, the processor either reads from the

memory or input/output device.

WR

WRITE: When this signal goes low, the processor either writes into the

memory or input/output device.

Ready

When this signal goes high the processor assumes that the peripheral

device is ready for communication else the processor goes into the wait

state.

HOLD

HOLD: The high signal indicates that DMA controller is requesting for

the use of address and data buses.

HLDA

HOLD ACKNOWLEDGE: High signal indicates that the processor

accepts the hold signal issued by the peripheral.


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INTR

The high signal indicates that a device is interrupting and asking for a

service, the priority is determined by the processor after acknowledging

the request.

RESTART INTERRUPTS

These three inputs (RST 7.5, RST 6.5 and RST 5.5) have the same timing

as INTR with the exception that they cause an inner RESTART having

RST 7.5 Highest Priority and RST 5.5 Lowest Priority

TRAP

It is a non maskable with highest priority.

RESET IN

When the signal goes low the processor is reset and Program Counter

becomes zero.

RESET OUT

High signal indicates processor being reset and the signal can be used to

reset other connected devices.


13

X1, X2

Crystal Oscillator input pins. To generate a fixed frequency of 3Mhz, the

crystal frequency must be of 6MHz and the internal divide by 2

mechanism makes the operating frequency of 3 MHz

CLK

Serves as system clock for peripherals.

IO/M

When the signal is high it indicates IO operation and when it is low it

indicates memory operation.

SID/SOD

(Serial Input/ Output Data): Pins are used for serial communication.


1) When does HOLD and HLDA signals are used?

Ans: These signals are meant for Direct Memory Access (DMA)

operations.


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2) Which interrupt is having lowest priority and which one is highest?

Ans: INTR is having lowest priority whereas TRAP has highest priority.

3) When does READY pin is used?

Ans: READY pin is used to check external device readiness.

4) What is the low order and high order registers in 8085?

Ans: Flag register is said to of low order whereas Accumulator register

is having high order since operations are carried out first and then status

through flag is checked.

5) What happens when RESET pin is activated?

Ans: It resets the microprocessor to its initial state wherein the program

counter (PC) is set at 0000H and instruction register (IR) is cleared.

6) Which pin is responsible for microprocessor wait state?

Ans: It is READY pin and if this pin goes low then microprocessor goes

into wait state till READY pin goes high indicating that external device is

ready.


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1.7 MEMORY INTERFACING

The memory is comprised of semiconductor material used to store the

information. The nature of memory is Processor memory, Primary

memory and Secondary memory. The memory will be having input,

output, address and enable pins. The control signals required for static

RAM are chip select, read and write control signals. The memory size is

always given in m x n where, m denotes number of address lines which

are in terms of 2^x (x is capacity of memory storing in bits) and n denotes

number of data lines. The data lines are fixed as per the data handling

capacity of the microprocessor under question. Decoders are used for chip

select logic. Predominant decoder which is used is 74LSI138. The read

write and read only memory (EPROM) is schematically shown below. As

can be seen the read/write memory is having both read (RD) pin and write

(WR) pin whereas EPROM has only read (rd) pin. Both the memory chips

are having chip select pin for their selection.


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Figure 1.3: Memory chip representation


1) What is refreshing indicates?

Ans: Refreshing indicate that the memory segment has DRAM which is

required to be refreshed periodically for loss of information.

2) Where does passwords are generally stored?

Ans: Passwords are generally stored in EEPROM memory.

3) Which memory is generally known as cache memory?

Ans: SRAM memory is generally known as cache memory.

4) What 1K X 8 indicates with respect to memory interfacing?

Ans: 1K X 8 = 1024 X 8 =2^10 X 8 which indicates that the memory chip has

10 address lines and 8 data lines and 1024 registers as locations and each

location or register stores 8 bit of data.


17

5) Give out memory address range for 1K memory?

Ans: 1K = 2^10, which indicates that it is having 10 address lines A0-A9

and rest A0-A15 are used for chip select logic. The address range

can be mapped as:

A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 --0000H

0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 --03FFH

The memory address ranges from 0000H to 03FFH. The lines A0 - A9 are

given to address lines whereas A10 - A15 are given to chip select pin and

they never change i.e. if level is 0 the said pins will be maintained at 0 and

if they are at 1, they are maintained at 1.

6) What are the fields indicate in 74LSI38 decoder?

Ans: In 74LSI38, 74 is the IC series, LSI is large scale integration and

38 indicates 3 input lines and 8 output lines.


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1.9 INTERRUPTS

Interrupt is an event asking the processor to perform a specific operation

and utilized for processor and peripheral information exchange. Once the

interrupt signal is activated the processor executes interrupt service routine

(ISR) program and after that returns to main program. The interrupt can

be of hardware and software. 8085 has eight software interrupts; RST 0 to

RST 7, the address space for each interrupt is 8 spaces as shown:

Interrupt Vector Address

RST 0 0000H

RST 1 0008H

RST 2 0010H

RST 3 0018H

RST 4 0020H

RST 5 0028H

RST 6 0030H

RST 7 0038H

Hardware interrupts

The 8085 has five hardware interrupts viz.

(1) TRAP (2) RST 7.5 (3) RST 6.5 (4) RST 5.5 (5) INTR


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(1) TRAP:

It is a non-maskable interrupt with highest priority. When it is by enabled

by getting acknowledged, it executes as ISR and sends the data to backup

memory. Its address is 0024H.

(2) RST 7.5:

It is maskable having location 003CH. It is having the second highest

priority among all interrupts. When this interrupt is executed, the

processor saves the content of the PC register on to the stack.

(3) RST 6.5

It is a maskable interrupt, having the third highest priority with address

0034H. When it is executed, the processor saves the content of the PC

register on to the stack.

(4) RST 5.5

It is a maskable interrupt with address 002CH When this interrupt is

executed, the processor saves the content of the PC register on to the stack.

(5) INTR:

INTR is a maskable interrupt with lowest priority. When it is enabled and

acknowledged, the microprocessor executes the instruction under process

and stores the address of next instruction on to the stack and serves the


20

interrupt service routine (ISR) and then returns to main program by

retrieving the address of stored instruction from stack.


1) Explain the sequence of events when main program is interrupted.

Ans: When microprocessor receives any interrupt signal from

peripheral(s) which are requesting its services, it stops its current

execution by executing the instruction under process and stores the

address of next instruction on the stack then sends an

acknowledgement (INTA) to the peripheral which is requesting for

its service.

The processor serves the interrupt service routine by transferring

the program control by generating CALL signal and after

executing sub-routine by generating RET signal again program

control is transferred to main program from where it had stopped.


21

2) How are interrupts are enabled and disabled in 8085.

Ans: There are instructions in 8085 which are used to set and reset the

interrupts of 8085 and the instructions are:

Enable Interrupt (EI): - The interrupt enable flip-flop is set and

all interrupts are enabled following the execution of next

instruction followed by EI. No flags are affected. After a system

reset, the interrupt enable flip-flop is reset, thus disabling the

interrupts. This instruction is necessary to enable the interrupts

again (except TRAP).

Disable Interrupt (DI): - This instruction is used to reset the value

of enable flip-flop hence disabling all the interrupts. No flags are

affected by this instruction.

Set Interrupt Mask (SIM): - It is used to implement the hardware

interrupts (RST 7.5, RST 6.5, RST 5.5) by setting various bits to

form masks or generate output data via the Serial Output Data

(SOD) line. First the required value is loaded in accumulator then

SIM will take the bit pattern from it.


22

Read Interrupt Mask (RIM): - This instruction is used to read the

status of the hardware interrupts (RST 7.5, RST 6.5, RST 5.5) by

loading into the A register a byte which defines the condition of the

mask bits for the interrupts. It also reads the condition of SID

(Serial Input Data) bit on the microprocessor.

3) What are SOD and SID lines do in 8085.

Ans: These pins or signals are used for serial communication.

SID (Serial input data line): It is an input line through which the

microprocessor accepts serial data.

SOD (Serial output data line): It is an output line through which

the microprocessor sends output serial data.

4) What is the significance of MSE bit in 8085 SIM format.

Ans: Mask Set Enable (MSE): - Accumulator is loaded with required

data which decides the action to be taken before SIM instruction is

executed.


23

X is a don't care bit, the other bits of the accumulator decide the effect of

executing masking or unmasking of interrupts.

5) Show interrupt event by flow chart?

Ans: The flow chart is shown below and is self understandable.

Figure 1.4: Flow Diagram for Interrupt Event


24

CHAPTER 2

PROGRAMMING 8085 MICROPROCESSOR

2.1 INSTRUCTION FORMAT

Instruction is an assignment to the machine on a predetermined

information. Every Instruction has opcode (operational code) and operand

(data to be operated upon). The operand (data or information) may be

within the instruction, given directly in the instruction, may be in the

memory or in a register. The data can be of 8-bit or 16-bit.

8085 Instruction word size

The 8085 word sizes are:

1. One-word or 1-byte

2. Two-word or 2-byte

3. Three-word or 3-byte

The data sizes with respect to 8085 are, 4- bit “nibble”, 8- bit “byte” and

16- bit "word"


25

One-Byte Instructions

In 1-byte opcode and operand are incorporated into the same byte.

Ex: ADD A 87H Opcode is ADD & Operand is A

DAA 27H Opcode is DAA & Operand is A

Two-Byte Instructions

In a two-byte, the first byte is opcode and the second byte is an 8- bit data.

Ex: MVI A, 44H 3EH Opcode 3E & Operand is 8-bit data

ANI 44H E6H Opcode E6H & Operand is 8-bit data

Three-Byte Instructions

In a three-byte the first byte is the opcode, and the accompanying two

bytes indicate the 16-bit data/ address.

Ex: LXI H, 16-BIT 21H Opcode is 21 & Operand is 16-bit data

LXI B, 16-BIT 01H Opcode is 01 & Operand is16-bit data

JNC 16-BIT D2H Opcode is D2 & Operand is 16-bit data


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2.2 8085 ADDRESSING MODES

Methods of accessing the data are the addressing modes and for 8085, the

modes are:

1 Implicit

2 Immediate

3 Register

4 Direct

5 Indirect.

Implicit Addressing mode

In this mode the data is within the instruction itself.

Ex: AAA

DAA

CMC

Immediate Addressing mode

In this mode the data is given directly in the instruction itself.

Ex: MVI A, 44H

IN 44H

XRI 00H

ORI 00H

ANI FFH


27

Register Addressing mode

In this mode the information is given through the registers.

Ex: MOV Rd, Rs

The data may be in the memory which can be accessed directly or

indirectly.

Direct Addressing mode

Memory address is given directly in the instruction where the data is stored

or can be sent.

Ex: IN 00H

OUT 01H

LXI H, 4500H

LDA 4500H

Indirect Addressing mode

The information is indirectly specified in the instruction by the register pair.

Ex: MOV R, M

The location of data is specified by the HL register pair.

LDAX D

The contents of the memory location are specified by DE register pair.


28

2.3 INSTRUCTION SET OF 8085

An instruction is a parallel function planned inside a microchip to perform

a particular function. The whole group of guidelines, called as the

instruction set, figures out what works the microchip can perform. These

instructions can be characterized into the accompanying five processing

classes: information exchange (data transfer) operations, mathematical

operations, logical operations, program branching operations, and

machine-control operations.

Data Transfer Group

Transfer of data between register to memory, memory to register, register

to memory. No memory to memory data transfer. For transfer data sizes

must be same.

MOV Move

MVI Move Immediate

LDA Load Accumulator Directly from Memory

STA Store Accumulator Directly in Memory


29

LHLD Load H and L Registers Directly from Memory

SHLD Store H and L Registers Directly in Memory

LXI Load Register Pair with Immediate information

LDAX Load Accumulator from Address in Register Pair

STAX Store Accumulator in Address in Register Pair

XCHG Exchange H and L with D and E

XTHL Exchange Top of Stack with H and L

Here "X" 16-bits.

Arithmetic Group

The number of operations include, addition, subtraction, multiplication,

division, increment or decrement. Information assumed to be either in

registers or memory. In arithmetic operation result always stored in

accumulator.

ADD Add to Accumulator

ADI Add Immediate Data to Accumulator


30

ADC Add to Accumulator Using Carry Flag

ACI Add Immediate information to Accumulator Using carry

SUB Subtract from Accumulator

SUI Subtract Immediate Data from Accumulator

SBB Subtract from Accumulator Using Borrow (C) Flag

SBI Subtract Immediate from Accumulator Using Barrow(C) Flag

INR Increment Specified Byte by One

DCR Decrement Specified Byte by One

INX Increment Register Pair by One

DCX Decrement Register Pair by One

DAD Double Register Add; Add Content of Register

Logical Group

These instructions are with respect to accumulator only.

ANA Logical AND with Accumulator

ANI Logical AND with Accumulator Using Immediate Data


31

ORA Logical OR with Accumulator

OR Logical OR with Accumulator Using Immediate data

XRA Exclusive Logical OR with Accumulator

XRI Exclusive OR Using Immediate Data

CMP Compare

CPI Compare Using Immediate Data

RLC Rotate Accumulator Left

RRC Rotate Accumulator Right

RAL Rotate Left Through Carry

RAR Rotate Right Through Carry

CMA Complement Accumulator

CMC Complement Carry Flag

STC Set Carry Flag


32

Branch Group

Unconditional Jump

JMP Jump

Conditional Jump

JNZ Not Zero (Z =0)

JZ Zero (Z = 1)

JNC No Carry (C =0)

JC Carry (C = 1)

JPO Parity Odd (P = 0)

JPE Parity Even (P = 1)

JP Plus (S = 0)

JM Minus (S = 1)

JC JCC JRC (Carry)

INC CNC RNC (No Carry)

JZ CZ RZ (Zero)

JNZ CNZ RNZ (Not Zero)

JP CP RP (Plus)


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JM CM RM (Minus)

JPE CPE RPE (Parity Even)

JP0 CPO RPO (Parity Odd)

Call & Return Instructions

CALL Call

RET Return

Stack Instructions

PUSH Push Two bytes of Data onto the Stack

POP Pop Two Bytes of Data off the Stack

XTHL Exchange Top of Stack with H and L

SPHL Move substance of H and L to Stack Pointer

PCHL Move H and L to Program Counter

RST Special Restart Instruction Used with Interrupts

Input/ Output

IN Initiate Input Operation

OUT Initiate Output Operation


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Machine Control Instructions

EI Enable Interrupt System

DI Disable Interrupt System

HLT Halt

NOP No Operation

2.4 Sample Intriguing Questions and Programs

1) Explain the classification of 8085 instruction based on word size

Give examples.

Ans: 8085 instructions are classified with respect to word size into

1-byte, 2-byte and 3-byte instructions. In 1-byte opcode and

operand are incorporated into the same byte. In a two-byte, the first

byte is opcode and the second byte is an 8-bit data/address and in a

three-byte the first byte is the opcode, and the accompanying two

bytes indicate the 16-bit data/ address.

The examples are:

1-byte: AAA, DAA, CMC

2-byte: MVI A, 22H, MOV D, 12H, ANI A, 00H

3-byte: LXI H, 2222H, LHLD 2222H


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2) Elaborate the difference between XCHG and XTHL.

Ans: XCHG instruction exchanges data between HL and DE pair, data

in H is exchanged with D and data in L is exchanged with E register

respectively.

XTHL exchanges HL register contents with top of the stack.

Contents of L register are exchanged with stack content pointed by

stack pointer register (SP) and contents of H register are exchanged

with next stack location (SP+1).

3) What are the two instructions used for setting and resetting data

bits.

Ans: OR logic is used to set the bits whereas AND logic is used for

resetting the bits, these operations are strictly with respect to

accumulator A only.

4) Which instruction finds application in forming 2’complement.

Ans: NEG instruction is used to get 2’complement of a number and it is

with respect to accumulator A register only.


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5) Write a program to add two 8-bit data by using registers and then

memory.

Ans: By using registers

MVI A, 8-Bit

MVI B, 8-Bit

ADD A, B

HLT

By using Memory

LXI H, 8500H first data in memory 8500

MOV A, M move first data into A

INX H next 8-bit data in 8501

ADD M Add the two datas

INX H

MOV M, A store the result in 8502


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6) Write a program to exchange content of two memory locations.

Ans: LXI H, XXXXH

LXI D, YYYYH

MOV B, M

LDAX D

MOV M, A

XCHG

MOV M, B

HLT

7) Write a program to find 2’ complement of a number.

Ans: LDA XXXXH

CMA

INR A

HLT


38

8) Write a program to count number of 1’s.

Ans: LDA XXXXH

MVI C, 0

MVI B, 8

L1: RLC

JNC L2

INC C

L2: DCR B

JNZ L1

HLT

9) Write a program to check whether a number is even or odd.

Ans: LDA XXXXH

RRC


39

JC ODD

EVEN: MVI A, 0

JMP STORE

ODD: MVI A, FFH

STORE: STA YYYYH

HLT

10) Write a program to find whether a number is positive or negative.

Ans: LDA XXXXH

RLC

JC -VE

+VE: MVI A, 0

JMP STORE

-VE: MVI A, FFH

STORE: STA YYYYH

HLT


40

11) Write a program to add 2 BCD numbers.

Ans: LXI H, XXXXH

MOV A, M

INX H

ADD M

DAA

HLT

12) Modify the above program for 10 decimal numbers ignoring

overflow.

Ans: LXI H, XXXXH /numbers in location

MOV A, M

MOV C, 10 /count for 10 numbers.

ADD: INX H

ADD M

DAA

DCR C

JNZ ADD

HLT


41

13) Write a program to convert BCD number to binary.

Ans: LDA XXXXH

MOV B, A

ANI OFH

MOV C, A

MOV A, B

ANI 0F0H

RRC

RRC

RRC

RRC

MOV B, A

CALL BCD TO BIN

ADD C

HLT


42

BCD TO BIN: XRA A

ADD: ADI 0AH

DCR B

JNZ ADD

RET

14) Write a program to convert Hexadecimal to ASCII.

Ans: LDA XX00H

MOV B, A

ANI 0FH

CALL HEX TO ASCII

STA XX01H

MOV A, B

ANI 0F0H

RLC

RLC


43

RLC

RLC

CALL HEX TO ASCII

STA XX02H

HLT

HEX TO ASCII: CPI 0AH

JC L1

ADI 07

L1: ADI 30

RET

15) Write a program to arrange the numbers in ascending order.

Ans: LXI H, XXXXH

MOV C, M

DCR C

START: MOV D, C

LXI H, YYYYH

UP: MOV A, M


44

INX H

CMP M

JC DOWN

NOV B, M

MOV M, A

DCR H

MOV M, B

INX H

DOWN: DCR D

JNZ UP

DCR C

JNZ START

HLT

16) Write a program to find smallest from an array.

Ans: LXI H, XXXXH

MOV B, M /count in B

INX H /first array element


45

MOV A, M

DCR B

LI: INX H /next element

CMP M

JC L2

MOV A, M

L2: DCR B

JNZ L1

STA YYYYH

HLT


46

CHAPTER 3

INTERFACING

The devices are used for data sharing and in real world the

compatibility and speed problem exists between devices. To overcome

these real world problems intermediate interfacing devices such as 8255

are necessary for data sharing without loss.

3.1 8255 Programmable Peripheral Interface (PPI)

The parallel input-output port chip 8255 is also called as programmable

peripheral interface device. The Intel’s 8255 is designed for use with

Intel’s 8-bit, 16-bit and higher capability microprocessors. It has 24

input/output lines which may be individually programmed in two groups

of twelve lines each, or three groups of eight lines. The two groups of I/O

pins are named as Group A and Group B. Each of these two groups

contains a subgroup of eight I/O lines called as 8-bit port and another

subgroup of four lines or a 4-bit port. Thus, Group A contains an 8-bit port

A along with a 4-bit port. C upper. The port A lines are identified by


47

symbols PA0-PA7 while the port C lines are identified as PC4-PC7.

Similarly, Group B contains an 8-bit port B, containing lines PB0-PB7 and

a 4-bit port C with lower bits PC0- PC3. Port C lower can be used in

combination as an 8-bit port C. Both the port C are assigned the same

address. Thus, one may have either three 8-bit I/O ports or two 8-bit and

two 4-bit ports from 8255. All of these ports can function independently

either as input or as output ports.

Figure 3.1: 8255 Architecture


48

Operation of 8255 is by programming the bits of an internal register of

8255 called as control word register (CWR). This buffer receives or

transmits data upon the execution of input or output instructions by the

microprocessor. The control words or status information is also transferred

through the buffer.

3.2 PIN DIAGRAM OF 8255

Figure 3.2: Pin diagram 8255


49

The pin descriptors are:

• PA7-PA0: Port A 8-bit pins. The functions of this port are defined

by writing control word in control word register.

• PC0-PC7: Serve as 8-bit Control pins and as handshake lines in

mode 1 or mode 2. The functions of this port are defined by writing

control word in control word register.

• PB0-PB7: Port B 8-bit pins. The functions of this port are defined

by writing control word in control word register

• RD: low to show read operation.

• WR: low on this line shows write operation.

• CS: This is a chip select line and connected to decoded address lines

in order to select the appropriate chip.

• A1-A0: These lines along with CS line selects IO ports or control

word register.

• D0-D7: 8-bit data lines.

• RESET: A high line control word register and all ports are set as

input ports.


50

3.3 OPERATIONAL MODES OF 8255

There are two fundamental operational modes of 8255:

1. Input/output mode

2. Bit set/reset mode (BSR)

Input/ Output Mode

There are three IO modes.

Mode 0

In this mode, the ports can be programmed either as Input or as Output

without handshaking (simple mode) defined by control word register.

Mode 1

Port A and Port B functions as either Input or Output port with handshake

signals from Port C. the functions are defined by control word.

Mode 2

Used for bidirectional data flow. Port A is programmed as bidirectional

port and Port B either in mode 0 or mode 1 with port C pins simple I/O

pins or handshake for port B.


51

Bit Set/Reset (BSR) mode

BSR mode is applicable only for Port C, wherein Port C bits can be set or

reset as per control word. D7 bit is always set to 1 and bit D0 is either set

or reset.

3.4 CONTROL WORD FORMAT

Input/output mode format

The mode is selected by making bit D7 as 1. The format is shown below:

Figure 3.3: Control Word format for Input / Output Mode


52

Bit Set Reset Mode Format

The figure below is the control word format for BSR mode in which bit

D7 is set to 0 laways:

Figure 3.4: Control Word format in BSR mode

3.5 Sample Interfacing Examples

Example 1) Write an ALP for 8-bit Digital to Analog Converter.

Here a processor with appropriate port and control word register

addresses is assumed. An FRC connector is appropriately interfaced with

available D/A converter (DAC 0808) and processor.


53

assume cs: code

code segment

mov al, control word

out control word register, al

loop1: mov al, 00h

out port c, al

loop2: out port a, al

inr al

nop

nop

nop

nop

nop

nop

nop

nop

cmp al, 0eeh

jz loop1

jmp loop2

hlt

code ends

end


54

Output: A ramp waveform can be observed on the CRO and the analog

value can be calculated by using the formula:

V0= Rf/R [D7/2 + D6/4 + D5/8 + D4/16 + D3/32 + D2/64 + D1/128 +

D0/256] Vref.

Rf, R and Vref are appropriately assumed.

Example 2) Write an ALP for stepper motor interface.

assume cs: code

code segment

mov al, control word

out control word register, al

mov al, 0ffh

out port a, al

start: mov al, 05h

out port a, al

call delay

mov al. 06h

out port a, al


55

call delay

mov al, 0ah

out port a, al

call delay

mov al, 09h

out port a, al

call delay

jmp start

delay: mov cl, delay count

again: dcr cl

jz exit

jmp again

exit: ret

code ends

end start


56

CHAPTER 4


4.1 8086 FEATURES

1. Evolution year 1978.

2. It was the first 16-out bit microprocessor.

3. It is accessible as 40-pin Dual-Inline-Package (DIP).

4. It is accessible in three variants

a. 8086 (5 MHz)

b. 8086-2 (8 MHz)

c. 8086-1 (10 MHz)

5. It has 16 bit data and 20 bit address lines.

6. Total 1 Mb of Memory.

7. Four segments each of 64 K.

8. Pipelined architecture with fetch and execution operations.

9. Instruction queue with 6 instruction bytes storing at any given time

10. 16-bit ALU with 8-bit manipulation possibility.

11. Has 256 vectored interrupts.


57

4.2 8086 ARCHITECTURE

Figure 4.1: Architecture of 8086

8086 has a register architecture and is divided into two parts viz., Bus

Interface Unit (BIU) and Execution Unit (EU). The BIU fetches the

direction or information from memory and write the information to

memory or input/ output port. It has General Purpose Registers, Pointer

and Index Registers, Flag Registers and Arithmetic and Logic Unit (ALU).


58

ALU is of 16-bit hence the size of the microprocessor is 16 bit but, it can

perform 8 bit operations as well. ALU performs arithmetic and logical

operations, like +, −, ×, /, OR, AND, NOT operations. BIU unit calculates

the 20-bit address required for data manipulations. The execution unit

interfaces outside world to the microprocessor and helps to increase

performance by having instruction queue which stores 6 instruction bytes

at a time. The unit holds segment registers along with instruction pointer

which points to the location of the next executable instruction.

The architectural flow can be drawn as follows:


59

DATA AND ADDRESS LINES

8086 is a communicative device and used for sharing of information or

data. For sharing of data within or outside the microprocessor it is required

that it should have address and data lines. 8086 has 16-bit data and 20-bit

address lines. 8086 can also be used for 8-bit data operations.

REGISTER ARCHITECTURE

The register architecture of 8086 contains General purpose registers,

Pointer registers, Index registers, Segment registers and Flag register. All

the registers of 8086 are 16-bit registers.

General purpose registers or data registers: AX, BX, CX, and DX can

be utilized for 8-bit or as 16-bit data manipulations. A, B, C, & D

represents accumulator, base, counter and data whereas X represents

16-bit.

AX Register: (A: Accumulator; X: 16 bit): Called as accumulator register

which stores operation result. Can be used as two 8-bit registers AL (Low)

& AH (High) each of 8-bit. Apart from this general purpose operations,

AX is used in multiplication and division operations for word size data.AL


60

is used in multiplication and division operations for byte size data whereas

AH is used in multiplication operation for byte size data.

BX Register: (B: Base; X- 16 bit): Used mostly as a base register and it

holds the starting address of the memory base location e.g. accessing of

Look up tables and used with data translate operations. Can be used as two

8-bit registers BL (Low) & BH (High) each of 8-bit.

CX Register: (C: Counter; X- 16 bit): Mostly used as a counter in loop and

counting operations. Can be used as two 8-bit registers CL (Low) & CH

(High) each of 8-bit. CX for string and loop operations whereas CL in shift

and rotate operations.

DX Register: (D: Data; X: 16- bit): Used as a data register for I/O

operations and holds I/O port address location. Used in Multiplication and

Division Operations for word size data and for indirect I/O operations. Can

be used as two 8-bit registers DL (Low) & DH (High) each of 8-bit.

Segment Registers: 8086 Memory is of 1Mb but, a programmer is

accessible to only four (CS, DS, ES & SS) 64-bit segments totaling to


61

256 Kb and other memory space is used for storing look tables, micros and

subroutines etc.

1. Code Segment (CS): This segment of 64K holds the code of the

program.

2. Data Segment (DS): This segment of 64K holds the data of the program.

3. Stack Segment (SS): This segment of 64K comes into picture when all

the programmer’s resources are exhausted and it hold data and address

information.

4. Extra Segment (ES): This segment of 64 K acts as another data segment

and used mostly in string manipulation instructions.

Figure 4.2: Memory Segments of 8086


62

Segment registers: Each memory segment is associated with 16 bit

register namely CS Register, DS Register, SS Register and ES Register.

All these registers hold the addresses of instructions and data in memory,

which are used by the processor to access memory locations.

Instruction queue: BIU gets up to 6 bytes of next instructions and stores

them in the instruction queue. When EU executes instructions and is ready

for its next instruction, then it simply reads the instruction from this

instruction queue resulting in increased execution speed.

Instruction Pointer register (IP): It holds the offset address within the

code segment of the next instruction to be executed.

Base (BP & SP) and Index (SI & DI) Registers: The pointers (BP & SP)

contain offset within the particular segments. The pointers BP and SP

usually contain offsets within the data and stack segments respectively. SP

always points towards the top of the stack and it is assumed that stack top

is always occupied by previous data. The index registers (SI & DI) are

used as general purpose registers as well as for offset storage in case of


63

indexed, based indexed and relative based indexed addressing modes. The

register SI is generally used to store the offset of source data in data

segment while the register DI is used to store the offset of destination in

data or extra segment. The index registers are particularly useful for string

manipulations

Flag Registers It is a 16-bit register and operates as a flip-flop, i.e. it

changes its status according to the result stored in the accumulator. It has

9 flags divided into 2 groups viz. 6 Conditional Flags and 3 Control Flags

• Conditional Flags: (CF, PF, AF, ZF, SF, OF):

• Control Flags: (TP, IF & DF)

Figure 4.3: Flag Register of 8086

Conditional Flags: They represent the result of the last arithmetic or

logical instruction executed.


64

Carry Flag (CF): Points to whether carry is generated or not. This indicator

shows a mathematical condition for unsigned whole number. It is

additionally utilized as a part of different accuracy number decision

system.

Auxiliary Carry Flag (AF): Used in BCD arithmetic or number

conversions. This flag is set whenever a carry or borrow is generated from

lower to upper nibble.

Parity Flag (PF): This flag is used to indicate the parity of the result, i.e.

when the lower order 8-bits of the result contains even number of 1’s, then

the Parity Flag is set. For odd number of 1’s, the Parity Flag is reset.

Zero Flag (ZF): This flag is set to 1 when the result of arithmetic or logical

operation is zero else it is set to 0.

Sign Flag (SF): This flag holds the sign of the result, i.e. when the result

of the operation is negative, and then the sign flag is set to 1 else set to 0.

Overflow Flag (OF): It indicates the result has exceeded the system limit.


65

Control Flags: Control flags controls the operations of the execution

unit.

Trap Flag (TP): Utilized for program debugging. If it sets it allows single

step debugging of the program.

Interrupt Flag (IF): It is an interrupt enable/disable flag. If it is set program

is interrupted and if it is disabled program is not interrupted.

Directional Flag (IF): It is used in string operation. When it is set then

string bytes are accessed from the higher memory to lower memory

address and vice-a-versa.

MEMORY ORGANIZATION

8086 is 16-bit processor which supports 1Mbyte (i.e. 20-bit address bus)

of external memory over the address range 000000 to FFFFFF. The 8086

organizes memory as individual bytes of data i.e. each memory location

stores a byte of data. The 8086 can access any two consecutive bytes as a

word of data. The lower-addressed byte is the least significant byte of the

word, and the higher- addressed byte is its most significant byte.


66

1Mbytes of memory are partitioned into four parts named as segments i.e.

CS (code segment) which holds the program instruction codes;

SS (Stack segment) is used to store interrupt and subroutine return

addresses, DS (Data segment) stores data for the program and ES (Extra

segment) is an extra data segment. Size of each segment is 64Kbytes

(65,536) and these segments are active at a time.

Each of these segments are addressed by an address stored in

corresponding segment (CS, SS, DS, ES) registers. These registers contain

a 16-bit base address that points to the lowest addressed byte of the

segment. Because the segment registers cannot store 20 bits, they only

store the upper 16 bits. But, to fetch a data 20 bit memory address is

required and these calculations are done in hardware within the

microprocessor and BIU is the unit which takes care of this problem by

appending four 0's to the low-order bits of the segment register. In effect,

this multiplies the segment register contents by 16. The segment registers

are user accessible, which means that the programmer can change the

content of segment registers through software.


67

Actual physical alignment of the 8086’s 1Mbyte memory address space is

divided in to two independent 512Kbyte banks: the low (even) bank and

the high (odd) bank. Data bytes associated with an even address reside in

the low bank, and those with odd addresses reside in the high bank.

Hardware pin A0 and BHE is used to Enable/disable the even/odd banks.

Logical and physical address calculation

Addresses within a segment can range from address 00000h to address

0FFFFh. This corresponds to the 64K-byte length of the segment. An

address within a segment is called an offset or logical address. A logical

address gives the displacement from the base address of the segment to

the desired location within the segment. Physical address is the direct

mapping into the 1M byte memory space. Logical address is in the form

of Base Address: Offset. To specify the logical address in the stack

segment SS: XXXX notation is used which is equal to [SS] * 16 + XXXX.

To calculate the physical address of the memory, BIU uses the following

formula.


68

Physical Address = Base Address of Segment * 16 + Offset

Example:

The value of Data Segment Register (DS) is 2222H.

To convert this 16-bit address into 20-bit, the BIU appends 0H to the LSB

(by multiplying with 16) of the address. After appending, the starting

address of the Data Segment becomes 22220H.

Data at any location has a logical address specified as: 2222H: 0016H

Where 0016H is the offset, 2222 H is the value of DS

Therefore, the physical address: 22220H + 0016H = 22236 H

The segments and its offset are given in below table:

Segment Offset Registers Function

CS IP Address of the next instruction

DS BX, SI, DI Address of data

SS SP, BP Address in the stack

ES BX, SI, DI Address of destination data (string operations)


69

4.3 8086 HARDWARE PIN DIAGRAM

8086 was the first 16-bit microprocessor available in 40-pin DIP (Dual

Inline Package) chip. The detailed pin configuration of an 8086

Microprocessor is depicted below.

Power supply and frequency signals (VCC & GND). It uses 5V DC

supply at VCC pin 40, and uses ground at GND pin 1 and 20 for its

operation

Clock signal (CLK)

Pin19. It provides timing to the processor for operations. Its frequency is

different for different versions, i.e. 5MHz, 8MHz and 10MHz.

Address/data bus (AD0-AD15)

Pin 2-16 & 39. These are multiplexed 16 address/data lines. AD0-AD7

carries low order byte data and AD8-AD15 carries higher order byte data.

During the first clock cycle, it carries 16-bit address and after that it carries

16-bit data.


70

Address/status bus (A16-A19/S3-S6)

Pin 35-38. These are the 4 address/status buses. During the first clock

cycle, it carries 4-bit address and later it carries status signals.

𝐁𝐇𝐄/𝐒7

Pin 34. BHE stands for Bus High Enable and used to indicate the transfer

of data using data bus D8-D15. This signal is low during the first clock

cycle, thereafter it is active.

Figure 4.4: 8086 Pin Diagram


71

𝐑𝐃

Pin 32 active low signal and is used to read signal for Read operation.

READY

Pin 32. It is an acknowledgement signal from I/O devices indicating data

is transferred. It is an active high signal. When it is high, it indicates that

the device is ready to transfer data. When it is low, it indicates wait state.

RESET

Pin 21 and is used to restart the execution. It causes the processor to

immediately terminate its present activity. This signal is active high for

the first 4 clock cycles and microprocessor goes into initial state and in

initial state:CS = FFFF; IP = 0000 and the first instruction will be at

FFFF0. Segments DS, ES, SS = 0000; and flag = 0000

INTR

Pin 18. It is an interrupt request signal, which is sampled during the last

clock cycle of each instruction to determine if the processor considered

this as an interrupt or not.


72

NMI

Pin 17 and stands for non-maskable interrupt. It is an edge triggered input,

which causes an interrupt request to the microprocessor.

𝐓𝐄𝐒𝐓

Pin 23. When this signal is high, then the processor goes into a wait state

(co-processor), else the execution continues.

𝐈𝐍𝐓𝐀

Pin 24 and it is an interrupt acknowledgement signal. When the

microprocessor receives this signal, it acknowledges the interrupt.

𝐌𝐍/𝐌𝐗

Pin 33 and stands for Minimum/Maximum mode. It indicates mode of

operation of the processor. When it is high, it works in the minimum mode

and if it is low the processor works in maximum mode.

ALE

Pin 25 and it is address enable latch pin. This signal indicates the

availability of a valid address on the address/data lines and finds use in

multiplexing of address and data lines with the help of 74LS373 latch.


73

𝐃𝐄𝐍

Pin 26 and it is Data Enable pin. It is used to enable Transreceiver 8286.

The transreceiver is a device used to separate data from the address/data

bus.

𝐃𝐓/𝐑

Pin 27 and it is a Data Transmit/Receive signal. It represents direction of

data flow through the trans receiver. When it is high, data is transmitted

out and if its low data is received in.

𝐌/𝐈𝐎

Pin 28 and it is used to distinguish between memory and I/O operations.

When it is high, it indicates I/O operation and when it is low indicates the

memory operation.

𝐖𝐑

Pin 29 and it is a write signal. It is used to write the data into the memory

or the output device depending on the status of M/IO signal.


74

HLDA

Pin 30 and it is Hold Acknowledgement signal. This signal acknowledges

the HOLD signal.

HOLD

Pin 31 and it indicates to the processor that external devices are requesting

to access the address/data buses.

QS1 and QS0

Pin 24 and 25 and are the queue status signals. These signals provide the

status of instruction queue. As per the table below

QS0 QS1 Status

0 0 No operation

0 1 First byte of opcode from the queue

1 0 Empty the queue

1 1 Subsequent byte from the queue

LOCK

Pin 29 which is an active high signal and it locks the processor such that

other processors cannot be able to use the buses.


75

S0, S1, S2

Pin 2-28. They provide the status of operation and used by the Bus

Controller 8288 to generate memory & I/O control signals. Operation is

described as per the table:

S2 S1 S0 Status

0 0 0 Interrupt Acknowledge

0 0 1 I/O Read

0 1 0 I/O Write

0 1 1 HLT

1 0 0 Opcode Fetch

1 0 1 Memory Read

1 1 0 Memory Write

1 1 1 Passive

RQ/GT1 and RQ/GT0

Pin 29-30 and are the Request/Grant signals used by the other processors

requesting the CPU to release the system bus. When the signal is received

by CPU, then it sends acknowledgment. RQ/GT0 has a higher priority than

RQ/GT.


76

CHAPTER- 5

8086 SOFTWARE DESCRIPTION AND CONCEPTS

Programmer must be aware of the language of the machine in which it

communicates with outside world and that language is machines

instruction set. Instructions are the commands passed on to the machine to

perform certain function or functions.

5.1 INSTRUCTION SET

The 8086 microprocessor supports eight types of instructions are those

are:

• Data Transfer Instructions

• Arithmetic Instructions

• Logical Instructions

• String Instructions

• Program Execution Transfer Instructions (Branch & Loop

Instructions)

• Processor Control Instructions

• Bit Manipulation Instructions


77

DATA TRASFER INSTRUCTIONS & CONCEPTS

MOV, LEA, LDA, LES, XCHG, XLAT, LAHF, SAHF, PUSH, POP,

IN AND OUT are the instructions under this group which covers

register transfer, segment transfer, stack transfer, flag transfer, data

exchanges, data conversions, and peripheral data transfer modes.

The following concepts should be known before applying the

instructions.

➢ Transfer of data between processor or I/O devices or within

the processor.

➢ Data sizes must be same

➢ No memory to memory data transfer is possible.

➢ No immediate data can be loaded into the segment directly.

The immediate data is loaded first into the GPR (general

purpose register) and then transferred to the segment.

The following pair of instructions forms the first initialization instructions

in any a program

MOV AX, DATA

MOV DS, AX


78

Word Transfer Instructions

MOV − Used to copy the byte or word from source to destination. Source

contents are not destroyed whereas destination contents are destroyed.

Variants are:

MOV Reg/Reg

MOV Reg/Mem

MOV Mem/Reg

Examples: MOV AX, BX

MOV AX, [SI]

MOV [DI], AX

The instruction MOV [SI], [DI] is invalid since no memory to memory

data transfer is possible. The data from the memory is brought into the

GPR first and then to memory

The instruction MOV AL, BX is invalid since data sizes are different (AL-

8 BIT; BX is 16 bit). The rule for data transfer is that data sizes must be

same. At the same time MOV BX, AL is true but it points to wastage of

resources as BX is 16 bit whereas AL is of 8 bit so instead of BX, BL or

BH can be used (both are of 8 bit)


79

PUSH – Stores 16 bit value on the stack. SP decrements by 2.

POP − Gets 16 bit value from stack and SP increments by 2

Stack pointer register (SP) always points towards the top of the stack and

is assumed to be occupied by previous data.

PUSH instruction always puts word data (two bytes) onto the stack.

Whenever data are pushed on to the stack the first (MSB) moves into

location addressed by SP-1 and second (LSB) to SP-2 and SP decrements

by 2. POP instruction retrieves 16 bit data (two bytes) from stack and SP

increments by 2.

XCHG − Used to exchange the data from two locations (Data sizes must

be same). The variants are

➢ XCHG Reg, Reg

➢ XCHG Reg, Mem

➢ XCHG Mem, Reg


80

XLAT − Used to translate a byte in AL using a look up table in the

memory.

Look up table is assumed to be stored in data segment. BX register

contains the offset address of the table in the data segment. Data for which

code is required is stored in AL register only and then XLAT is applied.

MOV AX, DATA

MOV DS, AX

MOV BX, OFFSET ADDRESS

MOV AL, DATA

XLAT

INT 3

Input and Output Manipulations Instructions

• IN −reads a byte or word from the given port to the accumulator

(AL OR AX)

• OUT −sends out a byte or word from the accumulator to the given

port.


81

Address Transfer Instructions

• LEA − loads the effective address of operand into the given processor

registers.

• LDS − loads DS register and other given register from the memory

• LES − loads ES register and other given register from the memory.

Both LDS and LES are effectively used for string data.

Flag Register Transfer Instructions

• LAHF − loads AH with the low byte of the flag register.

• SAHF − stores AH register to low byte of the flag register.

• PUSHF − copes the flag register at the top of the stack.

• POPF − copies a word at the top of the stack to the flag register

ARITHMATIC INSTRUCTIONS

• ADD – adds byte to byte/word to word i.e. OPR1 + OPR2.

• ADC − adds with carry i.e. OPR1 +OPR2 +CF.

• SUB − subtracts byte from byte/word from word i.e. OPR 1-OPR2.

• SBB − subtraction with borrow i.e. OPR1 –OPR2 –CF.


82

• MUL − multiply unsigned byte by byte/word by word i.e.

Byte MUL AX= AL * OPR

Word MUL [DX AX] = AX * OPR

• IMUL − multiply signed byte by byte/word by word i.e.

Byte IMUL AX= AL* OPR

Word IMUL [DX AX] = AX * OPR

8 bit result is in AL & AH whereas 16 bit result is in AX & DX

• DIV – divides unsigned word by byte or unsigned double word by

word.

Byte AL = AX/OPR

AH = REM

Word AX = [DX AX] / OPR

DX = REM

• IDIV – divides signed word by byte or signed double word by word.

Byte AL = AX/OPR

AH = REM

Word AX = [DX AX] / OPR

DX = REM

8 bit result is in AL & AH whereas 16 bit result is in AX & DX.


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NUMBER CONVERSION INSTRUCTIONS.

• DAA − Used to adjust the decimal after the addition/subtraction

operation.

• DAS − Used to adjust decimal after subtraction.

• DAM -Decimal adjustment after multiplication.

• DAD - Decimal adjustment after division.

These instructions are applied for Decimal Numbers.

If AL > 9 OR AF=1 If AL > 9F

Then

AL = AL+ 6 AL = AL+60

AF= 1 CF = 1

Example: 59 + 29 =88 but in binary

59 = 01011001

29 = 00101001

_____________________

(AF =1) 10000010

6 added 0110

_____________________

88 10001000


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• AAA − ASCII adjust after addition.

• AAS − ASCII adjust after subtraction.

• AAM − ASCII after multiplication

• AAD − ASCII adjust after division

Used for ASCII Number system. From 0-9, 30 are added and from

A-F, 37 are added to get ASCII codes.

Example: A – 10 – 1010 (greater than 9; 6 is added)

0110

__________ 11000 = 10 (decimal) F – 15 – 1111 (greater than 9; 6 is added)

0110 __________ 10101 = 15 (decimal)


85

LOGICAL INSTRUCTIONS

CONCEPTS

➢ No memory to memory and immediate data is allowed in shift and

rotate instructions.

➢ For shift and rotate operations counter is to be established if

operations are more than one.

➢ Negative numbers are represented in 2’s complement form.

➢ Compare instruction is always followed by conditional jump

instruction.

Performs operation on data bits such as logical and shift, etc.

• NOT − inverts each bit of a byte or word. Gives 1’s complement.

• NEG − Gives 2’s complement

• AND − adds each bit in a byte/word with the corresponding bit in

another byte/word.


86

• OR − multiplies each bit in a byte/word with the corresponding bit

in another byte/word.

• XOR − performs Exclusive-OR operation over each bit in a

byte/word with the corresponding bit in another byte/word.

• TEST − updates flags. Bit must be one. Bit by bit logical AND

operation.

• SHL – It is logical left shift operation and it shifts bits of a

byte/word towards left and put zero(S) in LSBs.

• SAL – It is arithmetic left shift operation and it shifts bits of a

byte/word towards left and put zero(S) in LSBs.

• SHR – It is a logical right shift operation and shifts bits of a

byte/word towards the right and put zero(S) in MSBs.

• SAR – It is an arithmetic right shift operation and shifts bits of a

byte/word towards the right and copy the old MSB into the new

MSB.

SHL/ SAL are equal to multiplication by 2 AND

SHR/SAR are equal to division by 2.


87

• ROL − rotate bits of byte/word towards the left, i.e. MSB to LSB

and to Carry Flag [CF].

• ROR − rotate bits of byte/word towards the right, i.e. LSB to MSB

and to Carry Flag [CF].

• RCR − rotate bits of byte/word towards the right, i.e. LSB to CF

and CF to MSB.

• RCL − rotate bits of byte/word towards the left, i.e. MSB to CF

and CF to LSB.

ROL/ ROR rotate bits without carry and are used to check positive /

negative numbers.

RCR/RCL rotates bits with carry and are used to find smaller or

greater numbers.

• CMP – Compares source with destination. It is a subtraction

operation.

If ZF=1, source and destination are equal.

If CF=1, source > destination

If CF=0, source < destination.


88

• INR – Increments Register / Memory by one i.e. OPR = OPR +1

• DCR – Decrements Register / Memory by one i.e. OPR = OPR -1

DATA SIZE CONVERSION INSTRUCTIONS.

(Useful in division operations)

• CBW – Converts byte data to word and fills the upper byte of the

word with the copies of sign bit of the lower byte.

• CWD – Converts word data into double word and fills the upper

word of the double word with the sign bit of the lower word.

• CDQ – Converts double word data into quad word and fills the

upper word of the quad word with the sign bit of the lower word

• CQT – Converts quad word data into ten word and fills the upper

word of the ten word with the sign bit of the lower word


89

STRING INSTRUCTIONS

CONCEPTS

➢ String is a group of bytes/words

➢ Allocation of memory for string is in sequential order

➢ Default segments used are DS and ES with SI and DI punters.

INSTRUCTION

• MOVSB/MOVSW − Moves byte/word from one string to another.

• LODSB/LODSW − Loads string byte into AL or string word into AX.

• STOSB/STOSW − Stores string byte into AL or string word into AX

• SCASB/SCASW −Scans a string and compare its byte with a byte in

AL or string word with a word in AX.

• COMPSB/COMPSW − Compares two string bytes/words.

• REP − Repeats the given instruction till CX = 0.

• REPE − Repeats the given instruction until CX = 0

• REPNE −Repeats the given instruction until CX = 0


90

PROGRAM EXECUTION TRANSFER INSTRUCTIONS

These instructions are used to transfer/branch the instructions during an

execution.

CONCEPTS

➢ There are two types of jumps i.e. unconditional and conditional.

➢ There are two types of jumps i.e. Intrasegment (within 64k) and

Intersegment (within 1MB)

➢ Intrasegemnt jump requires change only in IP whereas intersegment

requires change in CS and IP.

INSTRUCTIONS

JUMP INSTRUCTIONS

UNCONDITIONAL JUMP

• JMP –Jumps to the mentioned address to proceed to the next

instruction

CONDITIONAL JUMP (Mostly used)

• JC – Program Jumps to the location given in the program if carry

flag CF = 1


91

• JNC − Program Jumps to the location given in the program if carry

flag CF = 0

• JE/JZ − Program jumps if equal/zero flag ZF = 1

• JNE/JNZ – Program jumps if not equal/zero flag ZF = 0

• JP/JPE – Program jumps if parity/parity even PF = 1

• JNP/JPO – Program jumps if not parity/parity odd PF = 0

• JNO − Used to jump if no overflow flag OF = 0

• JO − Used to jump if overflow flag OF = 1

LOOP INSTRUCTIONS

UNCONDITIONAL LOOP

• LOOP − Loops a group of instructions till it satisfies CX = 0.

CONDITIONAL LOOP

• LOOPE/LOOPZ − Loops a group of instructions till it satisfies

ZF = 1 & CX = 0

• LOOPNE/LOOPNZ − Loops a group of instructions till it

satisfies ZF = 0 & CX = 0

LOOP instruction is used in structures programming.


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PROCESS CONTROL INSTRUCTIONS

CONCEPTS

➢ Procedures is a small group of instructions which repeats itself in

the main program)

➢ Procedures are called in the main program by using CALL and

returned by using RET instructions

➢ Procedure may be NEAR (within segment i.e. 64k) or FAR (outside

segment i.e. outside 64k)

➢ Procedures requires memory

➢ Procedures are called after code of the program.

INSTRUCTIONS

• CALL − Calls a procedure and saves the return address on to the

stack.

• RET − Returns from the procedure to the main program.


93

BIT MANIPULATION INSTRUCTIONS

CONCEPTS

➢ Operates on bits of flags

➢ Controls the processor action by setting / resetting of flag bits

INSTRUCTIONS

• STC − Sets carry flag CF to 1

• CLC − Clears/resets a carry flag CF to 0

• CMC − Complements the carry flag CF.

• STD − Sets the direction flag DF to 1

• CLD − Clears/resets the direction flag DF to 0

• STI − Sets the interrupt enable flag to 1, i.e., enables INTR input.

• CLI − Clears the interrupt enable flag to 0, i.e., disables INTR input.


94


CONCEPTS

➢ Data or information may be implicit, may be stored in registers,

may be stored in memory and accordingly data or information is

addressed in the programming. The method of accessing the data

is termed as addressing mode.

➢ For accessing the data or information 20 bit address is a must for

its location. The hardware does it internally.

➢ Segments always start at a memory location with 0H as the least

significant digit e.g. FFFF0H but not FFFF6H.

➢ Data’s can be accessed as either byte or word and can be stored at

an even or add address. Each location of memory stores one byte

of data.

IMPLICIT, DATA & REGISTER MODES

1) Implicit/ Inherent/ Zero operand Mode: - Data is within the instruction

itself

e.g. DAA, AAA, STC


95

2) Immediate Mode: - Data is given in the instruction itself.

e.g. MOV AX, 1234H

MOV CX, 0004H

3) Register Mode: - Data are transferred using GPR’S.

e.g. MOV AX, BX

MOV CS, DX

MEMORY MODES: DIRECT MODE

1) Direct Mode: - Memory location is given in instruction itself.

e.g. MOV AX, [7000H]

MOV [8000H], BX

MEMORY MODES: INDIRECT MODE

1) Indexed Mode: SI & DI points to the location indirectly.

e.g. MOV [SI], 0006H

MOV [BX], 0006H

2) Based Mode: Base registers are used to point memory address

e.g. MOV [BP], 0006H

MOV AX, [SP]


96

3) Based indexed Mode: Memory location is pointed by base and

indexed registers.

e.g. MOV [BP] [DI], 0006H

4) Based with displacement mode: Memory location is pointed by

combination of base registers and 8 or 16 bit displacement:

e.g. MOV 43H [BP], 0006H

5) Indexed with displacement mode: Memory location is pointed by

combination of indexed registers and 8 or 16 bit displacement:

e.g. MOV 43H [DI], 0006H

6) Based Indexed with displacement mode: Memory location is pointed

by base, indexed registers along with 8 bit or 16 bit displacements

e.g. MOV [DI+BP+65], 0006H


97

CHAPTER- 6

PROGRAMMING 8086

6.1 PROGRAMMNG STEPS

➢ Initialize segment/ segments

➢ Write down the initialization instructions

➢ Write down the operational instructions

➢ Write down the conditional instructions

➢ Write down the result display instructions

➢ Write instruction to stop the process

6.2 ASSEMBLER DIRECTIVES

A programmer writes program (which is a group of instructions) in a high

level language. The assembler converts this high level language into

machine language and hence certain pseudo instruction are required to be

furnished by the programmer to the assembler such that the assembler

understands what is what in a program. These pseudo instructions are for

the data sizes, constants, segments, labels, macros, subroutines and

memories.


98

CONCEPTS

➢ Data size directives: data Sizes Directive

Byte DB

Word DW

Double Word DD

Ten Bytes DQ

➢ A zero must be placed before a hex number that starts with a letter

(A-F) otherwise the assembler treats it as a label but not as a

numeric number.

➢ A constant in a program like counter is to be declared by using EQU

(equals) directive with label for the directive, e.g. count EQU 08h

➢ A programmer must declare what segment he is using in a program

by using a directive ASSUME, e.g. ASSUME cs: code, ds: data, es:

extra, ss: stack

➢ A programmer must declare the segment in use followed by filling

up of code/ data and then close the segment by using END

directive, e.g.


99

DATA SEGEMNT

LABEL 1 DB DATA1, DATA2

COUNT EQU 2DB

DATA ENDS

➢ A programmer must begin the program by writing instructions in

the code segment by using START directive and after instruction

writing he must end the program by writing ENDS directive, e.g.

➢ CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

--

CODE ENDS

END START

➢ The procedures are called by the directives LABEL PROC NEAR

or LABEL PROC FAR followed by LABEL ENDP NEAR or

LABEL ENDP FAR.

➢ Procedures are called after end of the code.


100

➢ The Micros are called in the program by using LABEL MACRO

followed by LABEL ENDM directives.

➢ Macros are called before code starts.

6.3 SUBROUTINES AND MICROS

➢ Subroutines or procedures are the group of instructions which

perform specific operations. They are called at the end of the

program.

➢ Procedures are called in the main program by using CALL

instructions and returned by using RET instructions and uses

directives LABEL PROC and LABEL ENDP.

➢ Procedures require memory.

➢ MICROS are set of instructions to carry out specific task. They are

called at the beginning of the program.

➢ Macros do not separate instructions but, they do require directives

such as LABLE MACRO & LABEL ENDM.

➢ Macros do not require separate memory as they are defined in the

main program itself.


101


102

6.4 BIOS AND DOS INTERRUPTS

Interrupts are the software or hardware events which halts the processor

till interruption is resolved. The 8086 has two hardware interrupts NMI

(non maskable) and INTR (interrupt request) NMI is a non-maskable

interrupt and INTR is a maskable interrupt having lower priority. There

are 256 Interrupts of which:

• TYPE 0 divides by zero interrupt.

• TYPE 1 single step debugging interrupt.

• TYPE 2 non-maskable NMI interrupt.

• TYPE 3 break-points interrupt.

• TYPE 4 overflows interrupt.

Type 5 to Type 31 interrupts are reserved for other advanced

microprocessors, and interrupts from 32 to Type 255 are available for

hardware and software interrupts. Apart from these there are certain Basic

I/O system (BIOS) interrupts and Disk Operating System (DOS) Interrupts

are used for specific applications among them are:


103

DOS INTERRUPTS

➢ INT 21H (DOS) Interrupt used to display the character

USE 1: - Inputs a single character from keyboard and echoes it to

the monitor.

Registers used: AH = 1, AL = the character inputted from

keyboard.

Ex: MOV AH, 1

INT 21H

USE 2: - Outputs a single character to the monitor.

Registers used: AH = 2, DL = the character to be displayed.

Ex: MOV AH, 2

MOV DL, ‘M’

INT 21H

USE 3: - Outputs a string of data terminated by ‘$’ sign to the

monitor.

Registers used: AH =9, DX = the offset address of the data.

Ex: MOV AH, 9

MOV DX, offset msg1

INT 21H


104

USE 4: - Termination of a process

Registers used: AH =4CH, AL = binary returned code.

Ex: MOV AH, 4CH

INT 21H

BIOS INTERRUPTS

➢ INT 14H Interrupt is used for serial communication. AH should

contain the function call

Function call 00: Initialize the comm. port

Function call 01: Send a character

Function call 02: Receive a character.


105

CHAPTER-7

PROGRAMMING WITHIN 8086: EXAMPLES

Programming examples which are considered here are of within the

processor. The programmer must have thorough knowledge about the

hardware and the software i.e. resources and instruction set of 8086. The

programmer must be intelligent enough to handle the resources and

instructions effectively such that the length of the program can be reduces

and there by execution time can be saved.

7.1 CONCEPTS

Some important concepts are reproduced for the benefit of the

beginners.

➢ The programmer must have thorough knowledge about the

resources and instruction set of 8086.

➢ Architecturally 8086 have four GPR’s namely AX, BX, CX & DX.

AX is used as a GPR and in multiplication and division operations.

BX is used as a GPR & base pointer for code conversion operations.


106

CX is a default counter as well as a GPR. DX is used as a GPR,

multiplication, division operation and I/O operations.

➢ The programmer can use same segment for data and code i.e. as

code segment and data segment for small programs but, he must

have knowledge about four segments viz. CS, DS, ES & SS. DS &

ES are the default segments for string manipulations whereas SS is

used in stack operations. The stack pointer always points towards

the top of the stack and builds towards 0H.

➢ In data transfer operations data sizes must be same and destination

information is destroyed whereas source data is not destroyed.

➢ Each location stores one byte of data.

➢ No memory to memory data transfer is possible.

➢ No immediate data can be loaded into the segment directly. The

immediate data is loaded first into the GPR (general purpose

register) and then transferred to the segment.


107

The pair of instruction for this forms the first initialization

instruction in any a program

MOV AX, DATA

MOV DS, AX

➢ In decimal adjust operation 6 is added whenever the result is greater

than 9.

➢ In ASCII number system from 0-9, 30 is added and from A-F 37 is

added.

➢ In arithmetic operation the result is stored in accumulator.

➢ In 8 bit multiplication the sum is in AL with carry in AH whereas

in 16 bit multiplication AX contains the sum and DX contains the

carry.

➢ Negative numbers are represented in 2’s complement form.

➢ No memory to memory and immediate data is allowed in shift and

rotate instructions.

➢ For shift and rotate operations counter is to be established if

operations are more than one.


108

➢ Compare instruction is always followed by conditional jump

instruction.

➢ Decrement instruction is always followed by a jump instruction.

➢ SHL/ SAL are equal to multiplication by 2

➢ SHR/SAR are equal to division by 2.

➢ ROL/ ROR rotate bits without carry and are used to check

positive / negative numbers.

➢ RCR/RCL rotates bits with carry and are used to find smaller or

greater numbers.

➢ Data size conversion instructions are useful in division operations.



numeric number.


109

7.2 WORKED EXAMPLES ON 8086

Example 1) Write a program to transfer 10 bytes of data from one location

to another within one segment.

Assume cs: code, ds: data

Data segment / note that D is upper case

Array1 db 00h, 01h, 02h, 03h, 04h, 05h, 06h, 07h, 08h, 09h

Count equ 0ah / C is uppercase

Array2 db? / A is upper case

Data ends / note that D is maintained as upper case

Code segment / C is upper case

start: mov ax, data

mov ds, ax

mov es, ax

mov cl, Count / C maintained as upper case

mov si, offset Array1 / A is maintained as upper case

mov di, offset Array2 / A is maintained as upper case


110

back: mov al, [si]

mov [di], al

inc si

inc di

dec cl

jnz back

int 3

Code ends / C maintained as upper case

end start

** Assembly programming is case sensitive hence care should be taken

else syntax errors will occur.

** If syntax error occurs, one has to revisit the program, correct the

error in the shown line number.

**After corrections, one has to save the program and then execute.


111

Example 2) Write a program to transfer 10 bytes of data from one location

to another taking two segments.

Assume cs: code, ds: data, es: extra

data segment / d lower case

array1 db 00h, 01h, 02h, 03h, 04h, 05h, 06h, 07h, 08h, 09h

count equ 0ah / c lower case

data ends / d maintained as lower case

extra segment / e lower case

array2 db oah dup (0) / a lower case

extra ends / e maintained as lower case

code segment / c maintained as lower case

start: mov ax, data

mov ds, ax

mov ax, data

mov es, ax

mov cl, count / c (in count) maintained as lower case

mov si, offset array1 / a (array1) maintained as lower case


112

mov di, offset array2 / a (array2) maintained as lower case

back: mov al, [si]

mov [di], al

inc si

inc di

dec cl

jnz back

int 3

code ends / c (code) maintained as lower case

end start / label (start) maintained as lower case

*** If one types CS:CODE in the first line and types code ends in the 24th

line (highlighted), it shows syntax error, since one is having upper case

letters and the other has small letters.

***one has to change the first line or the 24th line so that both looks the

same (upper case or lower case)


113

Example 3) Write a program to transfer 5 words of data from one segment

to another without string instructions.

ASSUME CS: CODE, DS: DATA, ES: EXTRA

DATA SEGMENT

ARRAY1 DW 1111H, 2222H, 3333H, 4444H, 5555H

COUNT EQU 05H

DATA ENDS

EXTRA SEGMENT

ARRAY2 DW? / can be put as ARRAY2 DW 05H

DUP(?) or (0)

EXTRA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV AX, EXTRA

MOV ES, AX

MOV SI, OFFSET ARRAY1


114

MOV DI, OFFSET ARRAY2

MOV CL, COUNT

BACK:MOV AX, [SI]

MOV [DI], AX

INC SI

INC SI / two time increment for word; it can be SI+2

INC DI

INC DI

DEC CL

JNZ BACK

INT 3

CODE ENDS

END START


115

Example 4) Write a program to transfer 5 words of data from one segment

to another with string instructions.


DATA SEGMENT

ARRAY1 DW 1111H, 2222H, 3333H, 4444H, 5555H

COUNT EQU 05H

DATA ENDS

EXTRA SEGMENT

ARRAY2 DW?

EXTRA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV AX, EXTRA

MOV ES, AX




116

MOV CL, COUNT

CLD /directional flag must be cleared before string operation

REP MOVSW

INT 3

CODE ENDS

END START

Example 5) Write an Assembly Language Program (ALP) for exchange of

10 bytes of data.

ASSUME CS: CODE, DS: DATA

DATA SEGMENT

ARRAY1 DB 11H, 22H, 33H, 44H, 55H

ARRAY2 DB 66H, 77H, 88H, 99H, 0AH

COUNT EQU 0AH

DATA ENDS

CODE SEGMENT

START:MOV AX, DATA

MOV DS, AX




117

MOV CL, COUNT

AGAIN:MOV AL, [SI]

MOV BL, [DI]

XCHG AL, BL

INC SI

INC DI

DEC CL

JNZ AGAIN

INT 3

CODE ENDS

END START

Example 6) Write an Assembly Language Program (ALP) to arrange 100

bytes in reverse order. The source is present from 2000:1000h and

destination start from 3000:0000h.


DATA SEGMENT

ORG 1000H


118

DB 100 DUP (0) / 100 is in decimal and its hexadecimal is

/64H, without H, it is considered as a

/decimal no

DATA ENDS

EXTRA SEGMENT

ORG 0000H

DB 100 DUP (0)

EXTRA ENDS

CODE SEGMENT

START: MOV AX, 2000H

MOV DS, AX

MOV AX, 3000H

MOV ES, AX

MOV SI, 1000H

MOV DI, 0000H

MOV CX, 100 / Can be written as MOV CX, 64H

BACK: MOV AL, [SI]

MOV [DI], AL


119

INC SI

DEC DI / DEC for reverse order

DEC CX

JNZ BACK

INT 3

CODE ENDS

END START

Example 7) Write an Assembly Language Program (ALP) to exchange 100

words each in two blocks. Use same base address for all memory segments

7000H: 1000H: 0000H.

ASSUME CS: CODE, DS:DATA, ES: EXTRA

DATA SEGMENT

ORG 1000H

DUP 64H DUP (0) / decimal 100 is 64H

DATA END


120

EXTRA SEGMENT

ORG 0000H

DB 64H DUP (0)

EXTRA ENDS

CODE SEGMENT

START:MOV AX, 7000H

MOV DS, AX

MOV ES, AX

MOV SI, 1000H

MOV DI, 0000H

MOV CX, 64H

BACK:MOV AX, [SI]

XCHG AX, [DI]

MOV [SI], AX

INC SI+2 / Two times INC for word or ADD SI, 2

INC DI+2

DEC CX


121

JNZ BACK

CODE ENDS

END START

Example 8) Write an Assembly Language Program (ALP) for multibyte

addition without carry and with carry.

Addition without carry


DATA SEGMENT

NUM1 DW 1234H /two byte number

NUM2 DW 1234H /Two byte number

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV SI, OFFSET NUM1

MOV DI, OFFSET NUM2

MOV CL, 02H


122

BACK: MOV AL, [SI] /one byte at a time

MOV BL, [DI] / one byte at a time

ADD AL, BL /one byte addition

MOV DL, AL

INC SI

INC DI

DEC CL

JNZ BACK

INT 3

CODE ENDS

END START

Addition with Carry


DATA SEGMENT



DATA ENDS


123

CODE SEGMENT

START:MOV AX, DATA

MOV DS, AX

MOV SI, OFFSET NUM1

MOV DI, OFFSET NUM2

MOV CL, 02H


MOV BL, [DI] /one byte at a time

ADC AL, BL /one byte addition with carry

MOV DL, AL

INC SI

INC DI

DEC CL

JNZ BACK

INT 3

CODE ENDS

END START


124

Example 9) Write an Assembly Language Program (ALP) for multibyte

subtraction without barrow and with borrow.

Subtraction without borrow


DATA SEGMENT


NUM2 DW 1234H / two byte number

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV SI, OFFSET NUM1

MOV DI, OFFSET NUM2

MOV CL, 02H



SUB AL, BL / sub without barrow


125

MOV DL, AL

INC SI

INC DI

DEC CL

JNZ BACK

INT 3

CODE ENDS

END START

Subtraction with borrow


DATA SEGMENT



DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX


126

MOV SI, OFFSET NUM1

MOV DI, OFFSET NUM2

MOV CL, 02H



SBB AL, BL /one byte sub with borrow

MOV DL, AL

INC SI

INC DI

DEC CL

JNZ BACK

INT 3

CODE ENDS

END START


127

Example 10) Write an Assembly Language Program (ALP) for 8 bit

multiplication.


DATA SEGMENT

NUM1 DW 8H /one byte number

NUM2 DW 4H /one byte number

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV AL, NUM1 /first number in AL (8 BIT)

MOV BL, NUM2 /second number in BL

MUL BL / AL X BL: hidden operand is AL

/ AL=SUM, AH=CARRY

INT 3

CODE ENDS

END START


128


division.


DATA SEGMENT

NUM1 DB 8H /one byte number

NUM2 DB 4H /one byte number

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV AL, NUM1 /first number in AL (8 BIT)

MOV BL, NUM2 /second number in BL

DIV BL / AL / BL: hidden operand is AL

/ AL=Quotient, AH=Reminder

INT 3

CODE ENDS

END START


129


multiplication.


DATA SEGMENT

NUM1 DW 2222H /first word

NUM2 DW 1111H /second word

SUM DW?

CARRY DW?

DATA ENDS

CODE SEGMENT

START:MOV AX, DATA

MOV DS, AX

MOV AX, NUM1 /first number in AX (16-bit)

MOV BX, NUM2 /seconnd number in BX

MUL BX / AX X BX: AX is hidden operand

/AX=SUM, DX=CARRY

MOV SUM, AX

MOV CARRY, DX


130

INT 3 / can be replaced by

/ MOV AH,4CH

/ INT 21H

CODE ENDS

END START


Division.


DATA SEGMENT

NUM1 DW 2222H /first word

NUM2 DW 1111H /second word

QUO DW?

REM DW?

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV AX, NUM1 /first number in AX (16-bit)

MOV BX, NUM2 / second number in BX


131

DIV BX / AX / BX: AX is hidden operand

/ AX=quotient, DX=remainder

MOV QUO, AX

MOV REM, DX

INT 3

MOVAH,4CH / can be replaced by INT 21H

CODE ENDS

END START

Example 14) Write an Assembly Language Program (ALP) to add two

decimal numbers.


DATA SEGMENT

NUM1 DB 39H

NUM2 DB 27H

SUM DB 01H DUP(?)

DATA ENDS

CODE SEGMENT


132

START: MOV AX, DATA

MOV DS, AX

MOV AL, NUM1

MOV BL, NUM2

MOV DI, OFFSET SUM

ADD AL, BL

DAA

MOV [DI], AX

INT 3

CODE ENDS

END START

***DAA & DAS works with respect to Accumulator.

How DAA works:

39H→ 0011 1001

+27H →+0010 0111

----------------------------

66H 0110 0000 →60H

+ 0000 0110 →66H /Add 6 to adjust to decimal as carry is

/generated while adding LSB


133


decimal numbers by using ASCII codes.

Single digit addition

ASSUME CS: CODE

CODE SEGMENT

MOV AL, 2

MOV BL, 3

AAA

ADD AL, 30H

INT 3

CODE ENDS

END

HOW AAA WORKS:

2 →00000010

+ 3→ 00000011

--------------

05→ 00000101

+30→ 00110000

----------------------

35→00110101 / ASCII OF 5 IS 35


134

Two-digit addition

ASSUME CS: CODE

CODE SEGMENT

MOV AL, 7

MOV BL, 5

AAA

ADD AL, 3030H /ASCII OF 12 IS 3132

INT 3

CODE ENDS

END

Example 16) Write an Assembly Language Program (ALP) to convert

packed BCD to unpacked BCD.

**4 bits per digit is packed BCD & 8 bits per digit is unpacked BCD

ASSUME CS: CODE, DS:DATA

DATA SEGMENT

NUM1 DB 57H

DATA ENDS

CODE SEGMENT


135

START: MOV AX, DATA

MOV DS, AX

MOV AL, NUM1 /AL=57

AND AL,0F0H /AL=50

MOV CL,04H

ROR AL, CL /AL=05

ADD AH,00H

MOV BL, AL / BL=05H

MOV AL, NUM1 /AL=57

AND AL,0FH /AL=07

ADD AH,00H

MOV BH, CL /BH=07

INT 3

CODE ENDS

END START

RESULT: BX=0507


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Example 17) Write an Assembly Language Program (ALP) to convert

packed BCD to ASCII.


DATA SEGMENT

NUM1 DB 24H

RESULT DB?

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV AL, NUM1 /AL=24

AND AL, 0F0H /AL=20

MOV CL, 04H

ROR AL, CL /AL=02

ADD AL, 30H /AL=32

MOV RESULT, AL / RESULT=32H

MOV AL, NUM1 /AL=24


137

AND AL, 0FH /AL=04

ADD AL, 30H

MOV RESULT+1, AL /RESULT+1=34

INT 3

CODE ENDS

END START

RESULT: BX=0507


numbers and display the result on console.

ASSUME CS:CODE, DS:DATA

DATA SEGMENT

NUM1 DW 2345H

NUM2 DW 2345H

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX


138

MOV AX, NUM1

MOV BX, NUM2

ADD AX, BX

MOV CH,04H

MOV CL,04H

MOV BX, AX

BACK1:ROL BX, CL

MOV DL, BL

AND DL,0FH

CMP DL,09H

JBE BACK2

ADD DL,07H

BACK2:ADD DL,30H

MOV AH,2

INT 21H

DEC CH

JNZ BACK1


139

MOV AH,4CH

INT 21H

CODE ENDS

END START

** 468Ais displayed on the console.

Example 19) Write an Assembly Language Program (ALP) to find average

of numbers and display the result on console.


DATA SEGMENT

ARRAY DB 09H,06H,05H,05H,05H,06H

AVG DB?

MSG DB “AVG=$”

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

LEA SI, ARRAY / can be written as

/ MOV SI, OFFSET ARRAY


140

LEA DI, MSG / can be written as MOV DI,

/ OFFSET MSG

MOV AH,9 / For display string

INT 21H / DOS INT for display

MOV AX,0

MOV BL,06 /For division

MOV CL,06H /For count

BACK: ADD AL, ARRAY [SI] /Total SUM in AL

INC SI

DEC CL

JNZ BACK

DIV BL / For Average→AL/BL

MOV DL, AL /To display AL is in DL

CMP DL,09H

JBE NEXT

ADD DL,07H

NEXT: ADD DL,30H

MOV AH,2H /For display Digit


141

INT 21H /DOS INT for display

MOV AH,4CH /terminate the program

INT 21H

CODE ENDS

END START

*** AVG=6 displayed on console

Example 20) Write an Assembly Language Program (ALP) to find larger

number and display the result on console.


DATA SEGMENT

ARRAY DB 8H,4H,5H,0FH,9H

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV CL,05H

MOV BL,0H


142

LEA SI, ARRAY

UP: MOV AL, [SI]

CMP AL, BL

JC NEXT

MOV BL, AL

NEXT: INC SI

DEC CL

JNZ UP

MOV DL, BL

CMP DL,09H

JBE DOWN

ADD DL,07H

DOWN: ADD DL,30H

MOV AH,2

INT 21H

INT 3

CODE ENDS

END START

** F is displayed on the console after execution of the program


143

Example 21) Write an Assembly Language Program (ALP) to sort the

numbers in ascending and descending order.


DATA SEGMENT

ARRAY DB 08H,02H,06H,01H

COUNT EQU 04H

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV CH, COUNT

AGAIN: MOV SI, OFFSET ARRAY

MOV CL, COUNT

BACK: MOV AL, [SI]

CMP AL, [SI+1]

JC LARGER

XCHG AL, [S+1]

MOV [SI], AL


144

LARGER: INC SI

DEC CL

JNZ BACK

DEC CH

JNZ AGAIN

INT 3

CODE ENDS

END START

OUTPUT: DESCENDING ORDER ASCENDING ORDER

08H 01H

06H 02H

02H 06H

01H 08H

Example 22) Write an Assembly Language Program (ALP) to sort the

numbers in ascending and descending order. Consider word data.


DATA SEGMENT

ARRAY DB 8888H,2222H,6666H,1111H


145

COUNT EQU 04H

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV CH, COUNT

AGAIN: MOV SI, OFFSET ARRAY

MOV CL, COUNT

BACK: MOV AX, [SI]

CMP AX, [SI+2]

JC LARGER / JNC FOR ASCEND

XCHG AX, [S+2]

MOV [SI], AX

LARGER: INC SI

INC SI

DEC CL

JNZ BACK


146

DEC CH

JNZ AGAIN

INT 3

CODE ENDS

END START

OUTPUT: DESCENDING ORDER ASCENDING ORDER

DS: 0000 8888 1111

0002 6666 2222

0004 2222 6666

0006 1111 8888

Example 23) Write an Assembly Language Program (ALP) to find factorial

of a number.


DATA SEGMENT

NUM DB 04H

RESULT DW 01H DUP (0)

DATA ENDS

CODE SEGMENT


147

START: MOV AX, DATA

MOV DS, AX

MOV AX, IH

MOV DI, OFFSET RESULT

MOV CX, NUM

BACK: MUL CX

DEC CX

JNZ BACK

MOV [DI], AX

MOV [DI+2], DX

INT 3

CODE ENDS

END START

OUTPUT: DS: 0000 0418 (4H= 4x3x2x1= 18H in Hex

DS: 0000 0424 (4=4x3x2x1=24 in decimal.


148

Example 24) Write an Assembly Language Program (ALP) to find factorial

of a number by Procedure.


DATA SEGMENT

NUM DB 04H

RESULT DW 01H DUP (0)

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV AX, 1H


MOV CX, NUM

CALL FACT

INT 3

FACT PROC

BACK: MUL CX


149

DEC CX

JNZ BACK

MOV [DI], AX

MOV [DI+2], DX

RET

FACT ENDP

CODE ENDS

END START

OUTPUT: DS: 0000 0418 (4H= 4x3x2x1= 18H in

DS: 0000 0424 (4=4x3x2x1=24 in decimal.

Example 25) Write an Assembly Language Program (ALP) to find LCM.


DATA SEGMENT

NUMR DW 8H,2H

LCM DW 02H DUP (0)

DATA ENDS

CODE SEGMENT


150

START: MOV AX, DATA

MOV DS, AX

MOV SI, OFFSET NUMR

MOV DI, OFFSET LCM

MOV AX, [SI]

MOV BX, [SI+2]

MOV DX,0H

DIVIDE: PUSH AX

PUSH DX

DIV BX /Follow division rule

CMP DX,0 /Check remainder for 0

JE RESULT

POP DX

POP AX

ADD AX, [SI]

JNC NEXT

INC DX


151

NEXT: JMP DIVIDE

RESULT: POP [DI+2]

POP [DI]

INT 3

CODE ENDS

END START

** OUTPUT IN SEGMENT DS: 0000 0800

0002 0400

0004 0800

Example 26) Write an Assembly Language Program (ALP) to find LCM

by Factorial.


DATA SEGMENT

NUMR DW 8H,2H

LCM DW 02H DUP (0)

DATA ENDS

CODE SEGMENT


152

START: MOV AX, DATA

MOV DS, AX

MOV SI, OFFSET NUMR

MOV DI, OFFSET LCM

MOV AX, [SI]

MOV BX, [SI+2]

MOV DX,0H

CALL FACT

INT 3

DIVIDE: PUSH AX

PUSH DX

DIV BX

CMP DX,0

JE RESULT

POP DX

POP AX

ADD AX, [SI]


153

JNC NEXT

INC DX

NEXT: JMP DIVIDE

RESULT: POP [DI+2]

POP [DI]

RET

LCM ENDP

CODE ENDS

END START

** OUTPUT IN SEGMENT DS: 0000 0800 /Input No

0002 0400 /Input No

0004 0800 /LCM

Example 27) Assembly Language Program (ALP) to find GCD.


DATA SEGMENT

NUM1 DW 38H

NUM2 DW 06H


154

RESULT DW 01 DUP (0)

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV AX, NUM1

MOV BX, NUM2


CMP AX, BX

JE GCD

JC EXCHANGE

DIVIDE:MOV DX,0 / for ramainder

DIV BX

CMP DX,0 /Check remainder for 0

JE GCD /If 0, GCD

MOV AX, DX /Else Exchange for next division

EXCHANGE: XCHG AX, BX


155

JMP DIVIDE

GCD: MOV [DI], BX /Result in BX, brought to DI

INT 3

CODE ENDS

END START

*** Result

1) 6)38(6 DS: 0000 3800

36 0002 06

----- 0003 0002

2)6(3

6

------

0 [2 is the GCD]

Result in Registers:

AX=38 and BX=6

For the First division:

AX/BX= 38/6 = 2 as remainder.

This division gives: AX= 6, BX= 6 And DX= 2.

For the second division:

AX becomes 6 and BX has 2, then

AX/BX = 6/2 = 0, remainder is 0. Hence GCD is 2.


156

Example 28) Assembly Language Program (ALP) for positive and negative

numbers.


DATA SEGMENT

LIST 0049H, 0032H, 0012H, 1234H

COUNT EQU 4H

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV SI, OFFSET LIST

MOV CX, COUNT

MOV BX,0 / For positive numbers

MOV DX,0 / For negative numbers

AGAIN: MOV AX, [SI]

SHL AX,01H / Rotate & Shift with

/ respect to accumulator

JC NEGATIVE


157

INX BX / Get positive number

JMP NEXT

NEGATIVE: INC DX / Get negative number

INC SI

INC SI

DEC CX

JNZ AGAIN

INT 3

CODE ENDS

END START

*** After rotate & shift if, the last bit (cy flag) of the number shows 1,

then result is negative number else it is positive number.

Example 29) Write an Assembly Language Program (ALP) to find square

of a number using Macro.


DATA SEGMENT

NUM DB 05H

RESULT DB?


158

DATA ENDS

CODE SEGEMNT

SQUARE MACRO

MUL BL

MUL BL

MOV [DI], AL

ENDM

START: MOV AX, DATA

MOV DS, AX


MOV AL,01

MOV BL, NUM

SQUARE

INT 3

CODE ENDS

END START

*** Result is in segment DS: 0000 0519 / 25=19 IN HEX


159

Example 30) Write an Assembly Language Program (ALP) to display a

string.

** String always of byte size as are all in ASCII charecters.

DATA SEGEMNT


TEXT DB ‘MICROPROCESSOR BOOK FOR BEGINERS$’

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV DX, OFFSET TEXT /String must be loaded into DX

MOV AH,9H

INT 21H

INT 3

CODE ENDS

END START


160

*** The text ‘MICROPROCESSOR BOOK FOR BEGINERS$ is displayed

on the console after program execution. The dollar sign ‘$’ indicates end of the

string. The following pair of Instruction are used to display the string.

MOV AH,9H

INT 21H

One can change the string like one’s name or for that matter any name

which can then be seen displayed on the console.

Example 31) Write an Assembly Language Program (ALP) to display a

string using MACRO.


DATA SEGEMNT

MSG DB ‘SUGGESSTIONS ARE WELCOME$’

DATA ENDS

CODE SEGMENT

DISP MACRO

MOV AH,9H

INT 21H

ENDM


161

START: MOV AX, DATA

MOV DS, AX

MOV DX, OFFSET MSG

DISP

MOV AH,4CH

INT 21H

CODE ENDS

END START

*** The text is displayed on the console after program execution.

*** The text ‘SUGGESSTIONS ARE WELCOME ’is displayed on the

console after program execution. The dollar sign ‘$’ indicates end of the

string.

The following pair of Instruction are used to display the string and can be

incorporated as Macro.

MOV AH,9H

INT 21H

One can display any on the console.


162

Example 32) Write an Assembly Language Program (ALP) to get Fibonacci

series.


DATA SEGEMNT

NUM DB 0AH

RESULT DW?

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV SI, OFFSET RESULT

MOV AX,0

MOV BX,1

MOV CX, NUM

BACK; ADD AX, BX

DAA

MOV [SI], AX

MOV AX, BX


163

MOV BX, [SI]

INC SI

DEC CX

JNZ BACK

MOV AH,4CH

INT 21H

CODE ENDS

END START

***result in segment DS: 0000 0102

0002 0305

0004 0813

0006 2134

0008 55

0009 89

**ANOTHER WAY OF WRITING THE PROGRAM

. MODEL SMALL

.DATA

RESULT DB?


164

NUM DB OAH

. CODE

START: MOV AX, @DATA

MOV DS, AX

LEA SI, RESULT

MOV CL, NUM

MOV AX,0

MOV BX,1

BACK: ADD AX, BX

DAA

MOV [SI], AX

MOV AX, BX

MOV BX, [SI]

INC SI

DEC CL

JNZ BACK

INT 3


165

CODE ENDS

END START

Example 33) Write an Assembly Language Program (ALP) to get Fibonacci

series with procedure.


DATA SEGEMNT

NUM DB 0AH

RESULT DW?

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV SI, OFFSET RESULT

MOV AX,0

MOV BX,1

MOV CL, NUM

CALL FIBO

INT 3


166

FIBO PROC NEAR

BACK: ADD AX, BX

DAA

MOV [SI], AX

MOV AX, BX

MOV BX, [SI]

INC SI

DEC CL

JNZ BACK

RET

FIBO ENDP

CODE ENDS

END START

***result in segment DS: 0000 0102

0002 0305

0004 0813

0006 2134

0008 55

0009 89


167

Example 34) Write an Assembly Language Program (ALP) to add two 4-

digit BCD numbers.


DATA SEGMENT

NUMLIST DW XXXXH, YYYYH

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV SI, OFFSET NUMLIST

MOV CL,00H /For carry

MOV AX, [SI] /First BCD no in AX

MOV BX, [SI+2] /Second BCD no in BX

ADD AL, BL /First LSB then MSB

DAA /Decimal Adjust

MOV DL, AL /LSB result in DL

MOV AL, AH /MSB in AL

ADD AL, BH


168

DAA

MOV DH, AL /MSB result in DH

JNC DOWN

INC CL

DOWN: MOV [SI+4], DX

MOV [SI+6], CL

INT 3

CODE ENDS

END START

***RESULT IN DX REGISTER WHICH CAN BE SEEN REFLECTED

IN MEMORY.


matrices.


DATA SEGMENT

MAT1 DB XXH, XXH, XXH, XXH….. /elements

MAT2 DB YYH, YYH, YYH, YYH…./ elements


169

SMAT DB ZZH /element count

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV SI, MAT1

MOV DI, MAT1

LEA BP, SMAT

MOV CX, COUNT

LOOP1: XOR AX, AX

XOR BX, BX

MOV AL, [SI]

MOV BL, [DI]

ADD AL, BL

MOV [BP], AX

ADD BP, 02H

INC SI


170

INC DI

DEC CX

JNZ LOOP1

INT 3

CODE ENDS

END START


1) What is the result of

NOT AX

ADD AX,1

ANS: - Result is 2’complwement of number in AX.

2) What is wrong with a) MOV BL, CX b) MOV DS, SS

ANS: -a) SYNTAX ERROR as for transfer of DATA, DATA SIZES must

be same.

b) SYNTAX ERROR as no memory to memory data transfer is possible

directly.

3) What is the result of CX, 7H

ANS: - CX=0007→CL=07 & CH=00


171

4) What is the result of XRA BX, BX

ANS: - REGISTER BX IS CLEARED. BX=0000

5) What is the required to mask LSB of AL=04H

ANS: - To mask AND LOGIC is used with required data. Here data

required is 00.

6) What happens when MUL BX is executed

ANS: - When this instruction is executed AX contains the SUM & DX

contains the carry.

7) What is the result of

ADD AL, BL

DAA

If AL=63, BL=19

ANS: - The result will be adjusted for decimal as:

63→ 0110 0011

+19→+0001 1001

------------------------------------

82→ 0111 1100→7C /Hence 6 is ADDED by DAA

+0000 0110→82

8) Negative numbers are represented by 2’cpmplement (T/F)

ANS: - True.


172

9) Explain pipelining in 8086

ANS: - Pipelining is a technique which executes instruction fetch and

execution mechanism in parallel. To speed up program execution, the BIU

fetches as many as six instruction bytes (size of instruction queue is 6) ahead

of time from memory. While executing one instruction other instruction can

be fetched avoiding waiting time for execution unit to receive other

instruction. BIU stores the fetched instructions in a six level deep FIFO.

The BIU fetches the instructions bytes while the EU decodes and executes

the instructions. This improves overall speed of the processor.

10) What is the difference between the physical and the logical

address?

ANS: -The physical address is 20 bits long and corresponds to the actual

binary code output by the BIU on the address bus lines. The logical address

is an offset from location 0 of a given segment.

11) List the Advantages of memory segmentation in 8086

ANS: -

• Instruction and data are not overlapped.


173

• Dynamic relocatability of program

• Time sharing is possible.

• Sharing of data between processors.

• Extension of addressability of processor

• Programs and data are stored separately

12) Write flow for Creating Macro Procedures

ANS: -Macro procedure is created by using the MACRO name, ENDM

directives and the instruction in between the two:

Name of MACRO

Instructions

ENDM

Once a macro is defined it can be anywhere in the program by using its

name.

13) Logic calculations are done in which type of registers?

ANS: -Accumulator is the register in which Arithmetic and Logic

calculations are done.

14) What does microprocessor speed depend on?

ANS: -The processing speed depends on DATA BUS WIDTH.


174

15) List the segments, Registers and their offsets

ANS: -

Segment Offset Registers Operation

CS IP Points towards Address of next instruction

DS BX, SI and DI Points towards address of data

SS SP, BP Points towards address on stack

ES BX, SI and DI Points towards address of data (used for string

operations)

16) List out MASM reserved words.

ANS: - The reserved words are:

ASSUME declare segments used in program

SEGMENT declare the segment

CODE begin code segment

DATA begin data segment

ENDS end of segment

END program end

SEG locate segment


175

DS define storage

DB define byte

DW define word

DD define double word

DQ define quad word

DUP duplicate

ELSE loop statement

PROC define procedure

ENDP end procedure

MACRO define macro

ENDM end macro

EQU equate (for constants)

IF loop statement

ENDIF end if statement

FAR reference for far address

MODEL type of program


176

NEAR reference for near address

OFFSET offset value

ORQ origin address for program

PARA paragraph

EXIT exit from the code

PUBLIC reference for public data

PTR pointer


177

CHAPTER-8


8.1 8051 FEATURES

1. Evolution year 1970-71 by Texas Instruments but, 8051. microcontrollers

brought in by Intel in the year 1980.

2. It was the first 8-bit microcontroller.

3. It is accessible as 40-pin Dual-Inline-Package (DIP).

4. It is accessible in three variants depending on ROM

a. 8031 (No ROM)

b. 8051 (4K ROM)

c. 8052 (8K ROM)

5. It has 8 bit data and 16 bit address lines.

6. 4K bytes of internal ROM as Program Memory and 128 bytes of RAM

as Data Memory with 64K external Code and Data Memory Space.

7. Four Memory banks each of 8 bits (00-1F) 32 bytes as working

registers. Bank 1 works as stack.

8. Pipelined architecture.

9. One serial Interface.


178

10. 8-bit ALU and 32 General Purpose Registers.

11. Has 6 interrupts, 3 Internal and 2 External along with one reset.

12. Two 16 bit Timer Interrupt and four 8 bit ports.

8.2 8051 ARCHITECTURE

Figure 8.1: 8051 architecture

• ALU 8 BITS

REGISTERS

• A 8 BIT


179

• B 8 BT

• R0-R7 8 BIT (4 BANKS: 4X8=32)

• SP 8 BITS. On reset it shows 07H (Bank 2) and loads from

08H. Builds from 00H-FFH. SP always shows BANK 2.

• PC 16 BIT (0000H-FFFFH) but, ROM is 4K (0000H-0FFFH)

rest is external.

• SFRS 8 BIT/16 BIT (Timer/ Counter, Interrupt, Port &

Communication Registers)

• PSW 8 BIT

• DPTR 16 BITS. It is used to access external ROM/RAM along

with MOVC/ MOVX instructions. Can be of 8 BIT (DPH & DPL).

• PROGRAM AND DATA MEMORY.

8051 is an 8-bit microcontroller and is built with 40 pins DIP (dual inline

package), 4kb of ROM and 128 bytes of RAM, 2 16-bit timers, four

parallel 8-bit programmable and addressable ports. It has an on-chip

crystal oscillator which gives operating crystal frequency of 12 MHz

Architecturally the system bus connects on chip devices to the CPU. The


180

system bus consists of an 8-bit data bus, 16-bit address bus and bus

control signals. The system bus interfaces all the on chip devices like

program memory, ports, data memory, serial interface, interrupt control,

timers, and the CPU.

8.3 8051 REGISTER ARCHITECTURE

It consists of 256 bytes of RAM memory, which is divided into two ways,

such as 128 bytes for general purpose and 128 bytes for special function

registers (SFR) memory. The memory which is used for general purpose

is called as RAM memory, and the memory used for SFR contains all the

peripheral related registers like Accumulator, ‘B’ register, Timers or

Counters, and interrupt related registers.

The general purpose memory is called as the RAM memory of the 8051

microcontroller, which is divided into 3 areas such as banks, bit-

addressable area, and scratch-pad area. The banks contain different

general purpose registers such as R0-R7, and all such registers are byte-

addressable registers.


181

Banks and Registers

Figure 8.2: 8051 Register architecture

The B0, B1, B2, and B3 are register memory banks and each bank contains

eight general purpose registers from ‘R0’ to ‘R7’. All these registers are

byte-addressable registers. These banks are selected by the Program Status

Word (PSW) register.

PSW (Program Status Word) Register

The PSW register is a bit and byte-addressable register. This register

reflects the status of the operation that is carried out in the controller.


182

Register memory banks are selected by the PSW register bits RS1 and

RS0.

C ----- AC RS1 RS0 OV ----- P

D7 D6 D5 D4 D3 D2 D1 D0

Figure 8.3: PSW format of 8051

Carry Flag (C): This carry flag is affected when the bit is generated from

the 7th position.

Auxiliary Flag (AC): This auxiliary carry is affected when a bit is

generated from the 3rd position to the 4th position.

Overflow Flag (OV): Overflow flag is set when a bit is generated from

the 6th position to the 7th position.

Parity Flag (P): This flag is set when parity while adding is 1

else reset.

RS1 and RS0

The RS1 and RS0, the bits in PSW register, are used to select different

memory location from Bank0 to Bank4 in the RAM memory.


183

Special Function Registers (SFR)

Special function registers are from the upper RAM. The registers include all

peripheral related registers like P0, P1, P2, P3, timers or counters, serial port and

interrupts-related registers. The SFR memory address starts from 80h to FFh.

The SFR register is implemented by bit-address registers and byte-address

registers.

SFRs and addresses

Register Address Register Address

P0 80 P2 A0

SP 81 E1 A8

DPL 82 P3 B0

DPH 83 IP B8

PCON 87 TCON2 C8

TCON 88 TMOD2 C9

TMOD 89 RCAP2L CA

TL0 8A RCAP2H CB

TL1 8B TL2 CC

TH0 8C TH2 CD

TH1 8D PSW D0

P1 90 A E0

SCON 98 B F0

SBUF 99


184

Accumulator

The accumulator which is also known as ACC or A is a bit as well as a

byte-addressable register. The accumulator holds the results of most

Arithmetic and logical operations.

B-Register

The B-register is a bit and byte-addressable register. The B register is only

used for multiplication and division operations.

Port Registers

The 8051 microcontroller consists of 4-input and output ports (P0, P1, P2,

and P3) or 32-I/O pins.

Counters and registers

The timers are used to generate precious time delay and the source for the

timers is crystal oscillator. The counters are used to count the number of

external events. The 8051 microcontroller consists of two 16-bit timers

and counters such as timer 0 and timer 1. Both the timers consist of a 16-

bit register in which the lower byte is stored in the TL and the higher byte

is stored in the TH. The Timer can be used as a counter as well as for


185

timing operation that depends on the source of the clock pulses to the

counters. The Counters and Timers in 8051 microcontrollers contain two

special function registers TMOD and TCON which are used for activating

and configuring timers and counters.

8.4 8051 HARDWARE PIN DIAGRAM

Figure 8.4: 8051 PIN diagram


186

PORT1 (PIN 1- 8) Can be used either as Input or Output Port. Logic 1

makes it input port and logic 0 makes it output port.

RESET (PIN 9) Reset is treated as an Interrupt. On reset all ports are

programmed as input ports.

PORT3 (PIN 10-17) These pins dual-function Pins and are used in serial

communication, interrupts and read and write operations.

XTAL1, 2 (PIN 18-19) Oscillator pins connected to external oscillator to

generate required clock pulse of operation.

VSS (PIN 20) Power supply. As ground and supply.

PORT2 (PIN 21-28) Can be configured as Input Output Pins multiplexed with

high order address bus (A8 to A15).

PSEN (PIN 29) Program Store Enable Low, used to enable external ROM

ALE (PIN 30) Address Latch Enable, used to distinguish between

multiple memory chips.


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EA (PIN 31) External Access low), If high Internal (4K) ROM is selected

and if low external ROM (64K) is selected.

PORT0 (PIN 32-39) It is bidirectional port and used for multiplexing low order

address and data bus with the help of ALE signal. When ALE is 1 this port is

used as data bus and when the ALE pin is at 0 the port is used as a lower order

address bus (A0 to A7).

VCC (PIN 40) Power supply


188

CHAPTER-9

8051 SOFTWARE DESCRIPTION AND CONCEPTS

The programmer in order to communicate with the intelligent device must

first learn its language. The language so built has instructions of different

types which defines functions to be carried out by the device.

9.1 8051 NSTRUCTION SET

8051 supports the following types of instruction set:

• Data Transfer Instructions

• Arithmetic Instructions

• Logical Instructions

• Bit Manipulation Instructions

• Program Branching Instructions


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DATA TRANSFER NSTRUCTIONS

MOV, PUSH, POP, XCH, XCHD, MOVC, MOVX are the

instructions under this category and can be remembered easily with

respect to data accessing:

• MOV DPTR, #DATA 16 BIT

** # for immediate data

• MOV A, Rn/ or #DATA/ or @Ri/ or DIRECT

** @ for indirect & Ri for internal RAM locations (0-255) pointed by R0

& R1.

• MOV Rn, A/ or #DATA/ or DIRECT

** / Rn for register banks where n =0-7

• MOV DIRECT, A/ or Rn/ or @Ri/ or DATA/ or

DIRECT

• MOV @Ri, A/ or DIRECT/ or #DATA

• MOVC A, @A+DPTR

• MOVC A, @A+PC / C stands for code.


190

• MOVX A, @Ri /X stands for data (16 bit)

• MOVX A, @DPTR / DPTR for accessing external RAM

or ROM Memory.

• MOVX @Ri, A

• MOVX @ DPTR, A

• PUSH DIRECT

• POP DIRECT

• XCH A, Rn/ or DIRECT/ or Ri

** PUSH & POP are used only by direct addressing.

** Register sizes must be same.

** Rn to Rn (memory to memory data transfer not possible)

ARITHMATIC INSTRUCTIONS

ADD, ADDC, SUBB, INC, DEC, MUL, DIV, DA A are the

instructions which can be remembered easily with respect to data

accessing:


191

• ADD A, Rn/ or DIRECT/ or #DATA/ or @Ri

• ADDC A, Rn/ or DIRECT/ or #DATA/ or @Ri

• SUBB A, Rn/ or DIRECT/ or #DATA/ or @Ri

• INC A / or Rn/ or DIRECT/ or @Ri/ or DPTR

• DEC A / or Rn/ or DIRECT/ or @Ri/ or DPTR

• MUL AB

• DIV AB

• DA A

** Multiplication & Division with respect to A & B registers only.

** Arithmetic and Logical Manipulations are only with Accumulator A.

LOGICAL INSTRUCTIONS

ANL, ORL, XRL, CLR, CPL, RL, RLC, RR, RRC, SWAP are the

instructions which can be remembered easily with respect to data

accessing:

• ANL A, Rn/ or #DATA/ or DIRECT/ or @Ri

• ANL DIRECT, A/ or #DATA


192

• ORL A, Rn/ or #DATA/ or DIRECT/ or @Ri

• ORL DIRECT, A/ or #DATA

• XRL A, Rn/ or #DATA/ or DIRECT/ or @Ri

• XRL DIRECT, A/ or #DATA\

• CLR A

• CPL A

• RL A

• RLC A

• RR A

• RRC A

• ANL C BIT

• ANL C, BIT

• ORL C, BIT

• ORL C, BIT

• MOV C, BIT

• MOV BIT, C

• SWAP A


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BIT MANIPULATION INSTRUCTIONS

CLRC, SETB, CPL, ANL, ORL are the instructions which are carried

out with respect to carry or with bit.

• CLR C

• CLR BIT

• SETB C

• SETB BIT

• CPL C

• CPL BIT

PROGRAM BRANCHING INSTRUCTIONS

JUMP INSTRUCTIONS

• SJMP (WITHIN 256 BYTES)

• AJMP (WTHIN 2K)

• LJMP (WITHIN 64K)

• JZ/ JNZ


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• JC/JNC

• JB/JNB

• DJNZ/DJNE/CJNE/CJNZ/NOP

** All conditional JUMPS are SHORT Jumps.

CALL & RETURN INSTRUCTIONS

• ACALL (WITHIN 2K)

• LCALL (WITHIN 64K)

• RET

• RETI


Methods of accessing operands are addressing modes. The various

modes are:

• Register addressing

• Immediate addressing

• Direct addressing

• Indirect addressing

• Indexed addressing


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Register Addressing Mode

The various registers used are R0- R7 from selected banks (B0-B3),

A, B, PC, and DPTR.

It is accessing of operands for register to register.

** Sizes of registers must match

** A to Rn and Rn to A accessing is possible

** Rn to Rn accessing is not possible.

1) MOV A, R0

2) ADD A, R7

3) MOV DPL, R7

Immediate Addressing Mode

The sign # is used for the addressing. Source is the immediate data

used to load any register.

1) MOV DPTR, #2550H

2) ADD A, #50H

3) MOV R1, #22H


196

Direct Addressing Mode (Memory Addressing)

Address of operand is provided in the instruction. Direct addressing

is for 128 bytes of RAM (00-7FH) and SFR (80-FFH).

1) MOV A, 4 Which is equivalent to MOV A, R4

2) ADD A, 0 Which is equivalent to MOV A, R0

** Stack instructions use direct addressing mode.

3) PUSH 0E0H / Address of A is 0E0H

4) POP 0F0H / Address of B is 0F0H

Indirect Addressing Mode (Memory Addressing)

** R0 and R1 are used as memory pointers.

** @ sign is used for addressing.

1) MOV A, @R0

2) MOV @R0, A

** Addressing with respect to accumulator (A) only.


197

Indexned Addressing Mode (Memory Addressing)

** DPTR instruction along with MOCX and MOVC instructions is used.

** Addressing with respect to A only.

** Code space can be shared between code and data but, data space cannot

be shared.

** MOVX is for data segment

** MOVC for code segment.

1) MOVC A, @A+DPTR

2) MOVX A, @A+DPTR

3) MOVX @Ri, A


198

CHAPTER- 10

PROGRAMMING 8051

10.1 PROGRAMMNG STEPS

➢ Write down initialization instructions.

➢ Write down the initialization instructions

➢ Write down the operational instructions

➢ Write down the conditional instructions

➢ Write down the result display instructions

➢ Write instruction to stop the process

10.2 ASSEMBLER DIRECTIVES

Certain pseudo instruction are required to be furnished by the programmer

to the assembler and these pseudo instructions are for the data sizes,

constants, labels, macros, subroutines etc. The directives which are used

extensively are: ORG, DB, EQU, END and START.


199

CONCEPTS

➢ The only directive which is used for data size is DB, since it handles

only 8 bits.



numeric number.

➢ A constant in a program like counter is to be declared by using EQU

(equals) directive with label for the directive.

➢ A programmer must begin the program by writing instructions in

the code segment by using START directive and after instruction

writing he must end the program by writing ENDS directive, e.g.

➢ The procedures are called by the directives LABEL PROC NEAR

or LABEL PROC FAR followed by LABEL ENDP NEAR or

LABEL ENDP FAR.

➢ Procedures are called after end of the code.

➢ The Micros are called in the program by using LABEL MACRO

followed by LABEL ENDM directives.


200

➢ Macros are called before code starts.

10.3 INTERRUPTS

8051 supports 5 vectored interrupts; vectored means having addresses and

those are:

• External Interrupt 0

• External Interrupt 1

• Timer/Counter Interrupt 0

• Timer/Counter Interrupt 1

• Serial Port Interrupt

** RESET is also considered as an interrupt; when executed 8051 resets to all

0000H.

** The addresses and priorities are as follows:

External Interrupt 0 IE0 0003H

Timer/Counter 0 TF0 000BH

External Interrupt 1 IE1 0013H

Timer/ Counter 1 TF1 001BH

Serial Port RI & TI 0023H

** Each Interrupt requires 8 bytes of locations.


201

10.4 PROGRAMMING CONCEPTS

• In all arithmetic and logical operations destination is A.

• Multiplication and division operations are with respect to

registers AB only.

• Rn to Rn operations are not possible.

• Register sizes must be same

• # sign is used for immediate data

• @ sign is used for indirect access of data.

• R2 register is always used as a counter.

• R0 & R1 registers are always used as pointers.

• On reset SP always points towards bank2.

• DPTR is used to access external ROM/RAM

• External memory accessing is through A only.

• Direct addressing is used for PUSH & POP instructions

• Swap, rotate, clear, complement and decimal adjustment

operations are with respect to register A only.


202

10.5 PROGRAMMING EXAMPLES

Example 1) Write an 8051 program to move 5 data bytes from RAM

location starting at 40H to RAM location starting at 55H.

ORG 0H

MOV R0, # 40H / SOURCE

MOV R3, # 55H /DESTINATION

MOV R2, #05H / COUNT FOR 10 DATA

BACK: MOV A, @R0

MOV @R3, A

INC R0

INC R3

DJNZ R2, BACK

END

RESULT

INPUT OUTPUT

40H 00H 55H 00H

41H 01H 56H 01H

42H 02H 57H 02H

43H 03H 58H 03H

44H 04H 59H 04H


203

Example 2) Ten data bytes are stored from RAM locations 45H to 54H.

Add 02H to each of them and place result in RAM locations 79H to 70H.

ORG 0H

MOV R0, # 45H

MOV R1, #79H

MOV R2, #0AH

MOV A, @R0

ADD A, #02H

BACK: MOV @R1, A

INC R0

DEC R1

DJNZ R2, BACK

END

RESULT: INPUT OUTPUT

45H 01H 79H 03H

46H 02H 78H 04H

47H 03H 77H 05H

48H 04H 76H 06H

49H 05H 75H 07H

50H 06H 74H 08H


204

51H 07H 73H 09H

52H 08H 72H 0AH

53H 09H 71H 0BH

54H 0AH 70H 0CH

Example 3) Write 8051 program to place a number 55H in internal RAM

30H to 33H Use a register to hold the number.

ORG 0H

MOV A, #55H

MOV R0, #30H

MOV R2, #04H

BACK: MOV @R0, A

INC R0

DJNZ R2, BACK

END

RESULT: INPUT 55H

OUPUT

30H 55H

31H 55H

32H 55H

33H 55H


205

Example 4) Write 8051 program to push R5, R6 and A onto the stack and

then pop them into R2, R3 and B.

PUSH 05

PUSH 06

PUSH 0E0

POP 0F0

POP 02

POP 03

Example 5) Write 8051 program to find sum of first 10 natural numbers.

MOV A, #00H

MOV R2, #0AH

MOV R0, #0H

BACK: ADD A, R0

INC R0

DJNZ R2, BACK

END


206

Example 6) Write 8051 program for basic arithmetic operations.

ORG 0H

MOV DPTR, #8000H

MOV A, #02H

MOV B, #02H

ADD A, B

MOV @DPTR, A

MOV A, #02H

MOV B, #02H

SUBB A, B

INC DPTR

MOV @DPTR, A

MOV A, #02H

MOV B, #02H

MUL AB

INC DPTR

MOV @DPTR, A

MOV A, #02H


207

MOV B, #02H

DIV AB

INC DPTR

MOV @DPTR, A

END

RESULT:

INPUT 02H, 02H

OUTPUT

8000H 04H

8001H 00H

8002H 04H

80003H 01H

Example 7) Write 8051 program to check whether RAM location 37H

contains an even number. If so, send it to port 2 else make it even and then

send it to port 2.

ORG 0H

MOV A, #37H

JNB ACC.0, yes


208

CPL A

Yes: MOV P2, A

END

Example 8) Write 8051 program to convert packed BCD number to two

ASCII numbers and place them in R2 and R6. Register A has the BCD

number.

ORG 0H

MOV A, #BCD NO / No 29

MOV R7, A

ANL A, #0FH / 09

ADD A, #30H / 39

MOV R6, A / R6=39

MOV A, R7 / 29

ANL A, 0F0H / 20

RR A

RRA

RR A


209

RR A / 02

ADD A, #30H / 32

MOV R2, A / R2=30

END

Example 9) Write 8051 program to OR the contents of P1 & P2 put the

result in external RAM locations 0102H.

ORG 0H

MOV A, P1

MOV R1, A

MOV A, P2

ORL A, R1

MOV DPTR, #0102H

MOVX @A+DPTR, A

END

RESULT INPUT

P1 = 02H

P2 = 02H

OUTPUT

0102H = 04H


210

Example 10) Write 8051 program to mask all the bits of a data FFH and

mask only lower nibble of data 0FFH.

ORG 0H

MOV A, #0FFH / A= FFH

ANL A, #00H / A= 00H

MOV B, A / B= 00H

MOV A, #FFH / A = FFH

ANL A, #0FH /A =0FH

END

Example 11) Write 8051 program to find smaller/ larger number from an

array.

Org 0h

mov r3, #06h / array of 6

mov dptr, #8000h

movx a, @dptr

mov r1, a

next: inc dptr

movx a, @dptr

clr c

mov r2, a


211

subb a, r1

jc skip / jnc for smaller

mov a, r2

mov r1, a

skip: djnz r3, next

mov dptr, #8062h

mov a, r1

movx @dptr, a

end

RESULT:

SMALLER 00H

LARGER 06H

Example 12) Write 8051 program to sort the numbers.

Org 0h

mov r0, #04h / array of 4

loop1: mov dptr, #8000h

mov r1, 04h

loop 2: movx a, @dptr

mov b, a


212

inc dptr

movx a, @dptr

clr c

mov r2, a

subb a, b

jc no exchange

mov a, b

movx @dptr, a

dec dpl

mov a, r2

movx @dptr, a

inc dptr

no exchange: djnz r1, loop2

djnz r0, loop1

end

RESULT: INPUT OUTPUT

8000H 03H 8000H 01H 8000H 0FH

8001H 08H 8001H 03H 8001H 08H

8002H 01H 8002H 08H 8002H 03H

8003H 0FH 8003H 0FH 8003H 01H


213

Example 13) Write 8051 program for BCD addition.

ORG 0H

MOV DPTR, #8000H

MOV R0, #37H

MOV R1, #34H

MOV R2, #38H

MOV R3, #43H

CLR C

MOV A, R0

ADD A, R2

DA A

MOVX @DPTR, A

MOV A, R1

ADDC A, R3

DA A

INC DPTR

MOVX @DPTR, A

END


214

Example 14) Write 8051 program to find number of 1s in a given number

FFH

ORG 0H

MOV R1, #00H / COUNT FOR 1

MOV R2,08H / COUNTER FOR ROTATE

MOV A, #FFH / NUMBER IN A

LOOP: RLC A

JNC NEXT

INC R1

NEXT: DJNZ R2, LOOP

END

RESULT

INPUT FFH OUTPUT 08H

Example 15) Register A contains data 54H. Write 8051 program swap the

number by using SWAP instructions and rotate instruction.

WITH SWAP INSTRUCTION

ORG 0H

MOV A, #54H

SWAP A


215

WITHOUT SWAP BUT WITH ROTATE INSTRUCTION

ORG 0H

MOV A, #54H

RL A

RL A

RL A

RL A

RESULT: A CONTAINS SWAPPED DATA 45H.

10.6 OBJECTIVE WORKED EXAMPLES

1) The instruction MOV A, #554H is valid or invalid.

Ans: Invalid since register A size is of 8 bits and data is above 8 bits.

2) No value can be moved directly into registers R0-R7 in banks. (True/ False)

Ans: True since no direct memory to memory transfer is possible.

3) The instruction ADD R, R2 is valid or invalid. If so, correct it.

Ans: Invalid since in all arithmetic and logical instructions A must be a

destination. The correct set of instructions are:

MOV A, R1

ADD A, R2

4) The result of ADD A, SOURCE is in A (True/ False)

Ans: True since in all arithmetic and logical operations register A is the

destination.


216

5) What is wrong in the instructions MUL A, R1 & DIV A, R1.

Ans: The instructions are invalid since all multiplication and division

operations are only with registers A & B.

6) What is the difference between MOV A, #5 H & MOV A, 5 instructions.

Ans: The instructions MOV A, #5H load immediate data 5 in A whereas the

instruction MOV A, 5 loads the data present in register R5 in A. One is immediate

addressing mode and the other is memory indirect mode.

7) RLC R1 instruction is valid or invalid.

Ans: The instruction is invalid since all rotate instruction must be with respect

to accumulator A.


217

CHAPTER-11

BASIC SOFTWARES

11.1 8086-MASM (MICROSOFTS MICRO

ASSEMBLER)

ASSEMBLER

A program written by using high level language (by Humans) in

editor is converted into machine language (for Human-Machine

Interaction) known as binary language thereby giving an object code by

an assembler.

The assembler performs the functions such as:

Reads the source program

Creates a symbol table

Replaces Mnemonics by their binary codes

Gives out syntax errors

By assembling, correcting syntax errors, Linking and Debugging the program

can be executed by using MASM software.

The steps to execute the program by using MASM software are:

Write the program in high level language using editor


218

Save it by using .ASM extension (filename.asm)

Create a library file by using ML filename.asm

Link the object file by using link filename.obj

Debug the program by using filename.exe

DEBUG is step by step execution of a program. For single step debugging

T command is used till the end of the program and for at a time execution

INT 3 instruction is used. DEBUG displays the contents of all processor

registers after each instruction is executed. DEBUG utility contains

commands to display and modify memory, assembling and disassembling

of code, single step debugging by trace command for single and command

to execute multiple instructions, load registers with data etc.

To run the program, the following steps have to be followed:

C:/masm filename.asm

C:/ml filename.asm

C:/link filename.obj (enter 4 times)

C:/debug filename.exe (after this – appears)

__ g complete execution of program in single step.


219

__ t Stepwise execution.

__ u un assemble (total code display)

__d starting address or ending address; To see data in memory

locations

__ q quit the execution.

11.2 EMULATOR

An emulator is hardware or software that enables host computer to behave

like another computer system referred to as guest system. An emulator runs

software or use peripheral devices meant for the guest system. Emulation is

the ability of a computer program in an electronic device to emulate another

program or device.

The various steps to execute a program by using Emulator are:

1 Click on the emu8086 Icon on Desktop. Click on new and select

the appropriate template. Here select .COM template.


220

2 After that a window appears and one has to type the new program

from the line; add your code here

3 A sample program is typed as shown in the screen below:


221

4 Save the program, a window appears. The saved program must be

of .asm file.

5 Click on emulate, a screen appears. Go for a single step debugging

and one can see step by step execution along with changes in registers.


222

6 For the typed sample program, the result 0AH can be seen in X

register.

11.3 8051-KEIL SOFTWARE STEPS

1. Click on the Keil uVision Icon on Desktop and one can see

the following screen.


223

2. Click on the Project menu from the title bar and then click

on New Project.

3. Save the Project by giving a project name with no extension

4. Then Click on save button.


224

5. Select the component for project. (Atmel or.)

6. Click on the + Symbol beside of Atmel

7. Select AT89C52 (or the one used) as shown below

8. Then Click on “OK”


225

9. The Following screen will appear

10. Then say “NO”

11. Now the project is ready for use

12. Double click on the Target1, one would get another option

“Source group 1” as shown in next page.


226

13. Click on the file option from menu bar and select “new”

14. The next screen will be as shown in next page, and just

maximize it by double clicking on its blue boarder.

15. Write the program in either in “C” or “ASM”

16. For a program written in Assembly, save it with extension.

asm and for “C”, .C


227

17. Click on Source group 1 and click on “Add files to Group

Source”

18. A window appears with default “C” files.


228

19. Select file extension given while saving the file

20. Click only one time on option “ADD”

21. Press function key F7 to compile. Correction must be done

for errors, if they appear and again F7 must be pressed.

22. If the file contains no error, then press Control+F5

simultaneously.


229

23. The new window will appear as follows

24. Then Click “OK”

25. Click on the Peripherals from menu bar, and check required

port

26. Drag the port aside and click in the program file.


230

27. Keep Pressing function key “F11” and observe the results.


231

INDEX

A

Accumulator 7, 59, 184

Address Lines 5, 59,177

Addressing Modes 26, 94, 194

ALE 10, 72, 186

Architecture 5, 57, 178

Arithmetic Instructions 29, 81, 190

Assembler 217

Assembler Directives 97, 198

B

Branch Instructions 32, 90, 193

B register 184

Bit Manipulation 93, 193

BSR Mode 51

C

Call Instructions 33,92,194


232

Counters 184

D

Data Transfer Instructions 28, 77, 189

Debugging 65, 217

Direct Addressing 27, 96, 199

Directives 97, 196

E

EA Pins 185

Execution Unit 57

Emulator 217

F

Features 2, 56, 175

Flag Register 7, 63

I

Instruction Pointer 62

Instruction Queue 62

Instruction Set 29, 76, 186


233

Interrupts 18, 103, 198

Indirect Addressing 27, 95, 196

Immediate Addressing 26, 95, 195

Interfacing 46

J

Jump Instructions 32, 90, 193

K

Keil software 222

L

Lock 74

Logical Instructions 30, 85, 191

M

Memory Organization 65

Memory Map 4

Macro 100


234

N

Number Conversion 83

P

Pin diagram 9, 48, 69, 185

Physical Address 68

Port Registers 184

PSW 181

Push & Pop 33, 79, 190

R

Register Architecture 59, 180

Register Addressing 27, 95,195

Reset 12, 71, 186

S

Segment Registers 60

SFR 183

String Instructions 89

Subroutine 100


235

T

Trap 18, 65

X

XLAT 80

XTAL 186


Documents

MICROPROCESSOR & CONTROLLER BASIC CONCEPTS AND ... · 1.9 interrupts 18 1.10 sample intriguing questions 20 chapter 2: programming 8085 microprocessor 24 2.1 instruction format 24