Laser Spike Annealing for FinFETs...FinFETs Jeff Hebb, Ph.D. Julyy, 11, 2013 1 NVVAVS West Coast JunctionTechnology Group Meeting July 11, 2013 Outline •LSA Overview and Key Features

Laser Spike Annealing for FinFETs

Jeff Hebb, Ph.D.July 11, 2013y ,

1 NVVAVS West Coast JunctionTechnology Group Meeting July 11, 20131

Outline

• LSA Overview and Key Featuresy• FinFET Process Flow• LSA Applications for FinFETLSA Applications for FinFET• Summary


LSA Overviewvs

CO2 Laser Temperature Power Control 2

(10.6μm) ConversionControl Algorithm

Hot Chuck

p-polarizedReflective

OpticsEmission Detector

Laser Beam

Vs

Dwell ti =

wHot Chuck

Scanning Stage

Silicon

time vx

Key Attributes• CO2 Laser: λ ~ 10umWithin die

Within-wafer • Temperature feedback


CO2 Laser: λ 10um• P-polarized, brewster angle

Within-dieUniformity

&Wafer-to-wafer

• Temperature feedback control

Pattern Effects: Thin Film Interference

• Short λ • Long λLSAFLA & DL

Short λ• Normalincidence

• Long λ• Brewster angle• p-polarization

Diode Laser(λ=0.8um)

FLA/RTP

Diode Laser(λ=0.8um)

FLA/RTP

60

80

100

y(%

)

Bare Si wafer340 nm oxide on Si+10% oxide thickness-10% oxide thickness120 nm poly on oxide+10% poly thickness-10% poly thickness

LSA

θCO2

60

80

100

y(%

)

Bare Si wafer340 nm oxid

60

80

100

y(%

)

Bare Si wafer340 nm oxide on Si+10% oxide thickness

e on Si+10% oxide thickness-10% oxide thickness120 nm poly on oxide+10% poly thickness

-10% oxide thickness120 nm poly on oxide+10% poly thickness-10% poly thickness

LSA

θCO2

θCO2

20

40

Ref

lect

ivity

LSACO2 (λ =10.6um)P-polarizedBrewsters Angle

20

40

Ref

lect

ivity

20

40

Ref

lect

ivity

LSACO2 (λ =10.6um)P-polarizedBrewsters Angle

9.0 9.5 10.0 10.5 11.0 11.5 12.0Wavelength (μm)

09.0 9.5 10.0 10.5 11.0 11.5 12.0

Wavelength (μm)

09.0 9.5 10.0 10.5 11.0 11.5 12.0

Wavelength (μm)

0


• Pattern effects caused by thin film interference variations severe at short λ• Long λ insensitive to device film variations

Pattern Effects: Scattering and Light Trapping

High aspect ratio fins Laser 0.2

0.25

s 10.6um Diode

0.1

0.15

0.2

mal

ized

Cou

nts

0.8um

>100X

DiodeLaser

LSA

Total Integrated Scattering: 0

0.05

0.01 0.1 1 10 100

Nor

m• Height is still << 10.6um, so:

• Scattering/light trapping is

24⎟⎠⎞

⎜⎝⎛≈=

λπσ

i

s

RPPTIS

Scattering (%)

g g pp gminimal for LSA

• No shadowing effectsσ is rms surface roughness


LSA pattern effect advantage extends to FinFETs

LSA with Full Wafer Ambient Control

Process gasPre-heat Laser

Dual-beam LSA201

CO2Micro-chamber

Water-cooled plate

Process gas

Non-contact gasbearing

O2 sampling port

Hot chuck

• Patented microchamber approach allows ambient control in a scanning system

• Enables applications which involve interface control and film • Enables applications which involve interface control and film modification, which will become more critical with smaller devices and new materials


Hypothetical FinFET Process Flow

Fin/STI formation

Implant N-ext

Fin formation*

Implant N-extImplant P-extSpike RTP (low temp)LSA

Extension

SpacerNMOS epi (in-situ doped Si:C)PMOS epi (in situ doped SiGe)LSA

Source/Drain

LSA

Interfacial layerHigh KPost dep anneal (LSA)

GateStackPost dep anneal (LSA)

Metal gate

Silicide metal depLSA

Stack

Silicide


LSA

Backend

Silicide

* FinFET Renditions from Threshold Sytems (2103)

LSA Applications for FinFETSilicide contact

Hi k

pp

Extensionanneal

Hi-kanneal LSA Applications

1. Extension annealanneal 2. S/D activation anneal

3. HK anneal

4 R ti ti4. Re-activation

5. Silicide formation

S/D activation

• There are multiple LSA applications for FinFET

8 NVVAVS West Coast JunctionTechnology Group Meeting July 11, 20138* FinFET rendition from V. Moroz (2013)

• There are multiple LSA applications for FinFET

LSA for Extension Anneal

as implanted 600C/60s 1050C RTA Twin

R. Duffy, APL (2007)

Twindefects

A 5k V 1 15 d i l t @ 45dAs 5keV 1e15 quad implant @ 45deg

• LSA offers higher activation and a different time regime for SPE


LSA offers higher activation and a different time regime for SPE to potentially improve defectivity

LSA for S/D AnnealImproved process results:(ext doping + epi + LSA)

NFET

LSA PFET


T. Yamashita et al (IBM), VLSI 2011)

LSA for NMOS Epitaxial eSiCpXRD of epi film Total series resistance of NMOS

Spike RTA: Csub CintActivation increases with LSA

sub intLSA: Cint Csub !!

• For epitaxial eSiC, LSA increases the concentration of substitutional C, enhancing NMOS mobility while simulataneously increasing Phosphorous

11 NVVAVS West Coast JunctionTechnology Group Meeting July 11, 2013P. Grudowski et al. (Freescale), IEEE SOI (2007)

enhancing NMOS mobility, while simulataneously increasing Phosphorous activation

LSA For High-k Post-Depostion Anneal

Advantages of LSA for HK Anneal

g

RTP

HfO2 Hf0.5Zr0.5O2

Advantages of LSA for HK Anneal

• Lower gate leakage• Smoother film

RTP

Ig = 2.1e-2

• Higher k value due to higher concentration of tetragonal phase

LSA

• Lower thermal budget can give thinner interfacial layer

• Fast ramp-down avoids dopant de-

Ig = 7.2e-8

• Fast ramp-down avoids dopant de-activation


*Sources: Triyoso et al., Appl. Phys. Letters (2008)Gilmer et al., ESSDERC (2006)

High k Anneal: LSA vs. FLA Cooling Comparison

Flash LampLaser Simulated Temperature Profiles

1200

1400

o C)

FLA

LSATdwell=10ms

Backside floatBackside chucked

800

1000

Tem

pera

ture

(o

FLA cool-down limited by radiation loss

• LSA ramps down quickly by cooling by 3D conduction

• FLA cools slowly by radiativecooling to the

400

600

0 1 2 3 4 5 6 7 8 9 10

3D conduction to the bulk Si

cooling to the ambient (1D)

• Device performance is improved with LSA compared to Flash Anneal because fast

Time (s)


ramp-down avoids dopant de-activation• RTP will also have slow ramp-down and possible de-activation

Intel Study on Dopant De-activation during Flash Annealy g

Intelslide


Advantages of LSA for Advanced Silicidesg

• Within-die uniformityDiode Laser (0.8um)

ΔT > 100oCLSA (10.6um)ΔT ~ 10oC

• Pattern effects much higher on diode laser system due to interference effects and higher silicideeffects and higher silicidereflectivity

• TemperatureClosed loop control:

Advanced Silicide Device WaferTemperature measurement and control

f

+/- 10C

• Real time measurement of temperature of wafer surface and closed loop feedback


feedback

Laser Annealing for Advanced Silicidesg

Advantages of LSA for Ti silicide⎟⎟⎠

⎞⎜⎜⎝

⎛∝

D

Bc N

φρ exp

Gate Contact Source/Drain Contact• Higher temperature than RTA

lower contact resistance• Minimal interdiffusion of gate stack • Minimal interdiffusion of gate stack

layers• Process control

• Minimal pattern effects• Closed loop temperature controlTi

Chipworks Xray of I t l 22 Fi FET

• Becomes critical for Ti silicidewhere process window is smaller than Ni silicide


Source: V. Moroz (Synopsys), 2013

Intel 22nm FinFET

Process Window: Ni vs. Ti SilicideProcess Window: Ni vs. Ti Silicide

Ni silicide transition Ti silicide transition (Ti on SiGe)

20

25

30

Ni silicide transition

80

100

Ti silicide transition (Ti on SiGe)

10

15

20

Rs

(ohm

/sq)

40

60

Rs

1000-1100C850-950C700-850C

0

5

0

20

Temperature Temperature


• For Ti silicide, process window becomes narrower benefits of tighter temperature distribution from LSA becomes more critical.

Summaryy• Long-wavelength LSA retains fundamental advantages

(minimal pattern effects and closed loop control) for ( p p )FinFETs

• LSA applications summary:• Extension anneal: Higher activation, potential for reduced

defects• S/D anneal: Higher activation, improved NMOS strain• High k anneal: Lower leakage, no de-activation• Ti Silicide: Low thermal budget, tight process control

• Expect millisecond annealing to play an increasing role• Expect millisecond annealing to play an increasing role in IC manufacturing as devices are scaled to 10nm and below


Documents

Laser Spike Annealing for FinFETs...FinFETs Jeff Hebb, Ph.D. Julyy, 11, 2013 1 NVVAVS West Coast JunctionTechnology Group Meeting July 11, 2013 Outline •LSA Overview and Key Features