Introduction to Computer Engineering by Richard E. Haskell

Xilinx CPLDsLab 2b

Module M2.4

Introduction to Computer Engineering by Richard E. Haskell

PLDT-1 Trainer

XilinxXC95108CPLD

Introduction to Computer Engineering by Richard E. Haskell

XC9500 CPLDs

• 5 volt in-system programmable (ISP) CPLDs

• 5 ns pin-to-pin• 36 to 288

macrocells (6400 gates)

• Industry’s best pin-locking architecture

• 10,000 program/erase cycles

• Complete IEEE 1149.1 JTAG capability

FunctionBlock 1

JTAGController

FunctionBlock 2

I/O

FunctionBlock 4

3

Global Tri-

States 2 or 4

FunctionBlock 3

I/O

In-SystemProgramming Controller

FastCONNECTSwitch Matrix

JTAG Port

3

I/O

I/O

Global Set/Reset

Global Clocks

I/OBlocks

1

Introduction to Computer Engineering by Richard E. Haskell

XC9500 Function Block

ToFastCONNECT

FromFastCONNECT

2 or 43 GlobalTri-State

GlobalClocks

I/O

I/O

36

Product-Term

Allocator

Macrocell 1

ANDArray

Macrocell 18

Each function block is like a 36V18 !

Introduction to Computer Engineering by Richard E. Haskell

XC9500 Product Family

9536

Macrocells

Usable Gates

tPD (ns)

Registers

Max I/O

36 72 108 144 216

800 1600 2400 3200 4800

5 7.5 7.5 7.5 10

36 72 108 144 216

34 72 108 133 166

Packages VQ44PC44 PC44

PC84TQ100PQ100

PC84TQ100PQ100PQ160

PQ100PQ160

288

6400

10

288

192

HQ208BG352

PQ160HQ208BG352

9572 95108 95144 95216 95288

Introduction to Computer Engineering by Richard E. Haskell

Xilinx Project Navigator

Introduction to Computer Engineering by Richard E. Haskell

Introduction to Computer Engineering by Richard E. Haskell

Introduction to Computer Engineering by Richard E. Haskell

Introduction to Computer Engineering by Richard E. Haskell