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10.3: Nanodiamond Vacuum Field Emission Transistor Arrays Shao-Hua Hsu, Weng Poo Kang, and Jimmy L. Davidson Department of Electrical Engineering and Computer Science, Vanderbilt University Nashville, TN 37235, USA E-mail: [email protected] Abstract: A vertically configured nanodiamond vacuum field emission transistor (VFET) is developed. The device is fabricated on a silicon-on-insulator (SOI) substrate, using the active silicon layer patterned with inverted pyramidal mold for nanodiamond deposition and as the self-aligned gate of the final VFET construct. Gate modulation of the emission current is observed with a relatively low gate turn-on voltage. The I a -V g -V a characteristics of the device show distinct linear, saturation and cutoff regions, demonstrating the transistor behaviors. The VFET shows a high dc voltage gain of ~ 1000, an ac voltage gain of ~ 44 and a phase shift of 180° when operated as a voltage amplifier. This nanodiamond VFET promises potential applications in vacuum microelectronics, including integrated circuits. Keywords: Nanodiamond; Vertically configured emitter; Vacuum field emission devices; Transistor characteristics. Introduction It is well known that vacuum microelectronic devices provide several advantages over solid-state microelectronics, such as high speed and low energy dissipation, by means of the ballistic electron transport in vacuum. In addition, vacuum devices possess the property of insensitivity to both high temperature and radiation, with unaffected performance in harsh environments. These unique features of vacuum microelectronic devices promise their potential applications in high-power high-frequency space-based electronics. We have reported transistor characteristics of vacuum devices with emitters fabricated by different carbon-based materials and device configurations [1-3]. Nitrogen- incorporated nanodiamond has been demonstrated to be a promising material for vacuum microelectronics. Nitrogen- incorporated nanodiamond, with low smooth surface and small grain size, possesses unique properties including deliberate amounts of sp 2 -carbon content in sp 3 diamond matrix and high n-type electrical conductivity making it an efficient electron emitter. Laterally configured vacuum field emission (VFE) devices with nitrogen-incorporated nanodiamond emitters have been reported and exhibited good diode, triode and transistor characteristics [2]. Furthermore, these devices can withstand high temperature and radiation hardness to perform electronically in extremely harsh environments [3]. In this work, we developed a novel vertically configured vacuum field emission transistor (VFET) with nitrogen- incorporated nanodiamond emitters by means of mold transfer self-aligned gate technique. The fabricated device shows a low gate turn-on voltage, high emission current and distinct transistor characteristics with high dc voltage gain. In addition, ac performance of the device was evaluated. This device exhibits potential application in vacuum micro- and nano-electronics. Device Fabrication The nanodiamond VFET was fabricated on a silicon-on- insulator (SOI) wafer with a 2 um thick of n ++ Si active layer. A mold transfer technique was performed to construct inverted pyramidal cavities on the Si active layer by optical lithography and KOH anisotropic etching of Si. Then, 1 um thick of thermal SiO 2 , which would be used as the dielectric isolation layer between gate electrode and emitters and simultaneously sharpened the apex of the inverted pyramidal tip, was grown throughout the patterned Si active layer. Next, nitrogen-incorporated nanodiamond was deposited into the inverted pyramidal cavities by plasma enhanced chemical vapor deposition (PECVD) with CH 4 /H 2 /N 2 gas mixture. The silicon substrate and the BOX layer were completely etched away using wet chemical etching after brazing of the nanodiamond film on a molybdenum plate. Subsequently, the Si active layer which would be used as the self-aligned gate structure was thinned down ~ 0.6 um to achieve an optimized proximity of gate to emitters. The dielectric isolation layer was then partially etched and the sharpened nanodiamond pyramidal tips were exposed. Finally, partitioning of gate electrodes for individual arrays was realized by optical lithography and reactive ion-etch. The SEM picture of the fabricated device is shown in Figure 1. Figure 1. The SEM images of the fabricated nanodiamond VFET: (right) high magnification of the VFET; (left) low magnification of the array. Device Characterization The nanodiamond VFET with 0.9-um gate-cathode spacing was tested for dc characteristics in vacuum of 10 -7 Torr. The anode emission current (I a ) was measured as a function 978-1-4244-7887-3/10/$26.00 © 2010 IEEE 201

[IEEE 2010 23rd International Vacuum Nanoelectronics Conference (IVNC) - Palo Alto, CA, USA (2010.07.26-2010.07.30)] International Vacuum Nanoelectronics Conference - 10.3: Nanodiamond

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10.3: Nanodiamond Vacuum Field Emission Transistor Arrays Shao-Hua Hsu, Weng Poo Kang, and Jimmy L. Davidson

Department of Electrical Engineering and Computer Science, Vanderbilt University Nashville, TN 37235, USA

E-mail: [email protected]

Abstract: A vertically configured nanodiamond vacuum field emission transistor (VFET) is developed. The device is fabricated on a silicon-on-insulator (SOI) substrate, using the active silicon layer patterned with inverted pyramidal mold for nanodiamond deposition and as the self-aligned gate of the final VFET construct. Gate modulation of the emission current is observed with a relatively low gate turn-on voltage. The Ia-Vg-Va characteristics of the device show distinct linear, saturation and cutoff regions, demonstrating the transistor behaviors. The VFET shows a high dc voltage gain of ~ 1000, an ac voltage gain of ~ 44 and a phase shift of 180° when operated as a voltage amplifier. This nanodiamond VFET promises potential applications in vacuum microelectronics, including integrated circuits.

Keywords: Nanodiamond; Vertically configured emitter; Vacuum field emission devices; Transistor characteristics.

Introduction It is well known that vacuum microelectronic devices provide several advantages over solid-state microelectronics, such as high speed and low energy dissipation, by means of the ballistic electron transport in vacuum. In addition, vacuum devices possess the property of insensitivity to both high temperature and radiation, with unaffected performance in harsh environments. These unique features of vacuum microelectronic devices promise their potential applications in high-power high-frequency space-based electronics.

We have reported transistor characteristics of vacuum devices with emitters fabricated by different carbon-based materials and device configurations [1-3]. Nitrogen-incorporated nanodiamond has been demonstrated to be a promising material for vacuum microelectronics. Nitrogen-incorporated nanodiamond, with low smooth surface and small grain size, possesses unique properties including deliberate amounts of sp2-carbon content in sp3 diamond matrix and high n-type electrical conductivity making it an efficient electron emitter. Laterally configured vacuum field emission (VFE) devices with nitrogen-incorporated nanodiamond emitters have been reported and exhibited good diode, triode and transistor characteristics [2]. Furthermore, these devices can withstand high temperature and radiation hardness to perform electronically in extremely harsh environments [3].

In this work, we developed a novel vertically configured vacuum field emission transistor (VFET) with nitrogen-

incorporated nanodiamond emitters by means of mold transfer self-aligned gate technique. The fabricated device shows a low gate turn-on voltage, high emission current and distinct transistor characteristics with high dc voltage gain. In addition, ac performance of the device was evaluated. This device exhibits potential application in vacuum micro- and nano-electronics.

Device Fabrication The nanodiamond VFET was fabricated on a silicon-on-insulator (SOI) wafer with a 2 um thick of n++ Si active layer. A mold transfer technique was performed to construct inverted pyramidal cavities on the Si active layer by optical lithography and KOH anisotropic etching of Si. Then, 1 um thick of thermal SiO2, which would be used as the dielectric isolation layer between gate electrode and emitters and simultaneously sharpened the apex of the inverted pyramidal tip, was grown throughout the patterned Si active layer. Next, nitrogen-incorporated nanodiamond was deposited into the inverted pyramidal cavities by plasma enhanced chemical vapor deposition (PECVD) with CH4/H2/N2 gas mixture. The silicon substrate and the BOX layer were completely etched away using wet chemical etching after brazing of the nanodiamond film on a molybdenum plate. Subsequently, the Si active layer which would be used as the self-aligned gate structure was thinned down ~ 0.6 um to achieve an optimized proximity of gate to emitters. The dielectric isolation layer was then partially etched and the sharpened nanodiamond pyramidal tips were exposed. Finally, partitioning of gate electrodes for individual arrays was realized by optical lithography and reactive ion-etch. The SEM picture of the fabricated device is shown in Figure 1.

Figure 1. The SEM images of the fabricated

nanodiamond VFET: (right) high magnification of the VFET; (left) low magnification of the array.

Device Characterization The nanodiamond VFET with 0.9-um gate-cathode spacing was tested for dc characteristics in vacuum of 10-7 Torr. The anode emission current (Ia) was measured as a function

978-1-4244-7887-3/10/$26.00 © 2010 IEEE 201

Figure 2. (a) Plots of Ia-Vg and Ig-Vg of the device show negligible gate intercepted current, (b) Plots of Ia-Va at

various Vg bias show transistor characteristic of the device.

Figure 3. AC input and output signals with a voltage gain of ~ 44.3 and a phase shift of ~ 180°.

of the gate voltages (Vg) and the anode voltages (Va) in the transistor configuration, where gate performed as an extractor of electrons from the emitters while anode collected the emitted electrons. Figure 2 (a) shows the plot of anode current and gate current versus gate voltage at various anode bias conditions. A low gate turn-on voltage of 25 V was observed, and the anode emission current increased exponentially with gate voltage and kept almost invariant with anode voltage, which indicates that the electron emission is induced by gate electrode and anode performed as a collector. A high emission current of ~ 160 uA is achieved with negligible gate intercepted current and small Ig/Ia ratio of ~ 2 % at high gate voltages. The linear Fowler-Nordheim (F-N) plot confirms the observed anode current is due to the field emission, as shown in the inset. The plots of anode current versus anode voltage at different gate bias clearly demonstrate the transistor characteristics of the fabricated device, as shown in Figure 2 (b). Distinct linear, saturation where anode current remains constant with the increase of anode voltage above ~ 100V, and cutoff regions were observed. The device performed a high dc voltage gain of ~ 1000 at a constant current of 85 uA, indicating a great potential for amplifier.

The ac performance of the device was characterized by biasing the transistor in the saturation region. The ac output signals were recorded across the anode resistor Ra and load resistor RL, both are 10 MΩ connected in parallel. An ac voltage gain of ~ 44 V/V (or 33 dB) and a phase shift of ~ 180° were realized with a 1 V peak-to-peak sinusoidal input signal, as shown in Figure 3. Detail experimental results will be presented.

References 1. Subramanian, K., Y. M. Wong, W. P. Kang, J. L.

Davidson, B. K. Choi, and M. Howell, “Field emission devices for advanced electronics comprised of lateral nanodiamond or carbon nanotube emitters,” Diamond Relat. Mater., vol. 16, pp. 1997-2002, 2007.

2. Subramanian, K., W. P. Kang, and J. L. Davidson, “A Monolithic Nanodiamond Lateral Field Emission Vacuum Transistor,” IEEE Electron Device Letters, Vol. 29, no. 11, pp. 1259-1261, Nov. 2008.

3. Kang, W. P., J. L. Davidson, K. Subramanian, B. K. Choi, and K. F. Galloway, “Nanodiamond Lateral VFEM Technology for Harsh Environments,” IEEE Transactions on Nuclear Science, Vol. 54, no. 4, pp. 1061-1065, Aug. 2007.

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