26
IBM T.J. Watson Research Center Jeehwan Kim Research Group http://jeehwanlab.mit.edu Jeehwan Kim Assistant Professor Mechanical Engineering Materials Science and Engineering Research Laboratory of Electronics Extremely cost‐effective semiconductor layer‐transfer process via graphene & Highly uniform advanced RRAM

Extremely cost‐effective semiconductor layer‐transfer

  • Upload
    others

  • View
    2

  • Download
    0

Embed Size (px)

Citation preview

Page 1: Extremely cost‐effective semiconductor layer‐transfer

IBM T.J. Watson Research Center

Jeehwan KimResearch Group

http://jeehwanlab.mit.edu

Jeehwan KimAssistant Professor

Mechanical EngineeringMaterials Science and EngineeringResearch Laboratory of Electronics

Extremely cost‐effective semiconductor layer‐transfer process via graphene & Highly uniform advanced RRAM

Page 2: Extremely cost‐effective semiconductor layer‐transfer

IBM T.J. Watson Research Center

Jeehwan KimResearch Group

http://jeehwanlab.mit.edu

1. 2D material based layer transfer2. Highly uniform epitaxial RRAM (epiRAM)

Page 3: Extremely cost‐effective semiconductor layer‐transfer

IBM T.J. Watson Research Center

Jeehwan KimResearch Group

http://jeehwanlab.mit.edu

1. 2D material based layer transfer (2DLT)

Sponsors

Page 4: Extremely cost‐effective semiconductor layer‐transfer

Defect generation

Price: Limited application

Substrate: Essential building block to form Electronic/optoelectronic devicesEpitaxial growth: Process for forming device film structures on the substrate

Substrate

Epitaxial films

Major bottleneck for advancing semiconductor technology

Epitaxy of single‐crystalline films is requiredon given available substrates

http://www.tf.uni-kiel.de/matwis/amat/semi_en/kap_5/backbone/r5_1_4.html

FETs, LEDs, Lasers, Detectors

Si Ge, GaAs InPSiC, Sapphire

Price: SiC > InP > GaAs > Ge >>> Si

Lattice:InP > GaAs/Ge > Si > SiC

Page 5: Extremely cost‐effective semiconductor layer‐transfer

Conventional lift‐off technique

Pro: Control of release interface

Cons:  Post‐treatment required

Slow release 

Limited application mainly for GaAs & InP

E. Yablonovitch et al., Appl. Phys. Lett. 51, 2222 (1987). B. M. Kayes et al, IEEE J. Photovolt. 4, 729 (2014). 

Chemical lift-off (epitaxial lift-off, ELO) Optical lift-off (Laser lift-off, LLO)

Pro: Control of release interface

Cons:  Post‐treatment required

Cracking from local pressurization

Slow release 

Limited application mainly for transparent substrate

Page 6: Extremely cost‐effective semiconductor layer‐transfer

2D material based layer transfer (2DLT)

sp2‐bonded graphene: No broken bonds on the surface Precise release from graphene

Post‐release treatment NOT required

1 sec release due to weak interaction  Universal for any materials

Page 7: Extremely cost‐effective semiconductor layer‐transfer

2DLT enabled by “REMOTE EPITAXY”

Substrate

ConventionalEpitaxy

EpitaxialFilm

Remote Epitaxy

Substrate

Graphene

Epitaxial Layer

2DLT

Page 8: Extremely cost‐effective semiconductor layer‐transfer

Remote epitaxy of GaAs(001) film on GaAs(001) substrate through “monolayer graphene”

400nm

100 GaAs

100 GaAs

100 GaAs

Polycrystalline

EBSD

100 GaAs

Page 9: Extremely cost‐effective semiconductor layer‐transfer

DFT calculation

Critical interaction gap: 1 nmIn collaboration with Prof. Kolpak

HRTEM

Remote homoepitaxy is possible through grapheneY. Kim, S. Cruz, J. Kim et al., Nature (2017) 

Dark field XTEM: Strain field

No sign of dislocation

Remote homoepitaxy: copy/paste dislocation‐free films

Page 10: Extremely cost‐effective semiconductor layer‐transfer

Unversality of 2DLTGrowth of single-crystalline GaN, GaAs, InP, GaP, Ge on graphene

001 101

111

EBSD mapping

Page 11: Extremely cost‐effective semiconductor layer‐transfer

Graphene Reusability (GaN as an example)

J. Kim et al., Nature Communications Vol. 5, 4836 (2014)

Front Surface(RMS roughness: 0.3 nm)

No post-treatment required for further recycle

Direct bondabilityReleased Surface(RMS roughness: 0.3 nm)

GaN(0001)

Page 12: Extremely cost‐effective semiconductor layer‐transfer

Role of grapheneTurning wafers into the copy machine

Dislocation‐reducer/filterRelease layer  1sec release

Wafer Surface protection  infinite reuse 

Wide application of non-Si electronics/photonics

Si wafer

GaNGaAs

InGaAsInP

Enabled heterointegration

Page 13: Extremely cost‐effective semiconductor layer‐transfer

Implication for PV technology

Sponsor:

Sponsor:

Page 14: Extremely cost‐effective semiconductor layer‐transfer

Dislocation-freeLED on graphene

Light emission fromLEDs on graphene

Red LED (III-V)

Y. Kim, S. Cruz, J. Kim et al., Nature (2017)

Implication for display/lighting technology

Blue LED (III-N)

Dislocation-free GaN obtainable by GaN growth on graphene/GaN

High efficiency lightingHigh pixel density microLED

Low-cost flexible LEDs (solid state lighting/microLED)

Host substrate

InGaPInGaN

InGaN

Page 15: Extremely cost‐effective semiconductor layer‐transfer

Implication for power electronics/heterointegrationPower electronics

Sponsor: Thanks to gift from:

HeterointegrationWide field of view focal plane arrays

Page 16: Extremely cost‐effective semiconductor layer‐transfer

IBM T.J. Watson Research Center

Jeehwan KimResearch Group

http://jeehwanlab.mit.edu

2. Highly uniform advanced RRAM

‐ Epitaxial RAM (epiRAM)

Page 17: Extremely cost‐effective semiconductor layer‐transfer

Why Resistive Random Access Memory (RRAM)?

S. H. Jo, et al., Nano lett., 9, 2009.

E. Linn, R. Rosezin, C. Kuegeler, and R. Waser, Complementary resistive switches for passive nanocrossbar memories, Nat. Mater. 9, 403-406 (2010)

• Wide applications• Neuromorphic computing, NVM storage, Logic

• High scalability (10nm size)

• <ns switching

• Large connectivity (2‐terminal structure)

• Low energy consumption

• 3D structure

• CMOS compatibility

Page 18: Extremely cost‐effective semiconductor layer‐transfer

StatusRequirement for commercialization  High endurance and long retention  High on‐off ratio  Cycle‐to‐cycle uniformity Device‐to‐device uniformity Current suppression in low voltage/reverse bias  Suppression of sneak paths Linear synaptic weight update for neuromorphic (Analog)

None of the currently reported RRAM fully satisfies requirements

Page 19: Extremely cost‐effective semiconductor layer‐transfer

Conventional ReRAM devices‐ Valence Change Memory (VCM) Good endurance and retention

Device non‐uniformity  

(Cycle‐to‐cycle / Device‐to‐device) Conductive filament is not confined in single path 

that cause stochastic uncorrelated switching events .

Low On‐off ratio Digital: ~10 / Analog: ~2 

0 50 100 150 2000.00.10.20.30.40.50.60.70.8

Con

duct

ance

[mS]

Pulse Number

Zongwei Wang, et al., Nanoscale, 8, 14015-14022 (2016)

~

~

S. Kim, et al., ACS Nano, 8, 10262-10269 (2014) S. Choi, et al., Scientific Reports, 5, (2015)

Temporal variation on VSET20 consecutive sweeps

SET

1.5 V ··· ···5 V

-3 V

RESETRead30 μs

30 μs

Voltage

Time

1 ms···

100 sets of Set/Read pulses 100 sets of Reset/Read pulses

σ =0.05 Vµ = 0.45 V

σ/µ = 0.11

For VSET,

-1.0 -0.5 0.0 0.5 1.0 1.510-6

10-5

10-4

10-3

|Cur

rent

| [A

]

Voltage [V]

Page 20: Extremely cost‐effective semiconductor layer‐transfer

High On‐off ratio  Digital > 104For reduced power, reduced bit‐error‐rate(BER) and increased read bandwidth in high density RRAM

Device non‐uniformity 

(Cycle‐to‐cycle / Device‐to‐device)

Retention/Endurance trade‐off •Weak Ag‐channel formation enhances endurance but reduces retention time• Strong Ag‐channel formation increases retention time but deteriorate endurance

S. Gaba, et al., IEEE EDL, 35, 2014

Cycle-to-cycle variation

Conventional ReRAM devices‐ Electrochemical Metallization Memory (ECM)

Device-to-device variation

S.H. Jo, et al., Nano Lett., 8, 2008

σ =0.3 Vµ = 3.5 V

σ =0.2 Vµ = 2.5 V

σ/µ = 0.08 σ/µ = 0.085

For VSET, For VSET,

Page 21: Extremely cost‐effective semiconductor layer‐transfer

What is the source of device variation? Due to amorphous switching medium

So many filament candidates

Page 22: Extremely cost‐effective semiconductor layer‐transfer

Can single‐crystalline Si do resistive switching?

-4 -2 0 2 410-11

10-9

10-7

10-5

Cur

rent

(A)

Voltage (V)

5 V

3 V

4 V

Batch 1 Batch 2

Spatial set V variation (device-to-device): 4%

0 100 200 300 400 500 600 7000

1

2

3

4

5

Set V

olta

ge (V

)

Cycle #

0 1 2 3 4

10-11

10-8

10-5

Voltage (V)

Cur

rent

(A)

3.6 3.8 4.0 4.20

100

200

300

Cou

nt

Set Voltage (V)0 1 2 3 4

Voltage (V)

On-off ratio > 104

Temporal set V variation (cycle-to-cycle): 1%

3.0 3.5 4.0 4.5 5.00

5

10

15

20

25

Cou

nt

Set Voltage (V)

Batch 1 Batch 2

Page 23: Extremely cost‐effective semiconductor layer‐transfer

Introduction of epitaxial RAM (epiRAM) for digital

0 10 20 30 40 5010-7

10-6

10-5

On state

Cur

rent

(A)

Retention (Hr)

85C

0 1 2 3 4 5 60

100

200

300

400

500

Cur

rent

(A)

Voltage (V)

10 A 50 A 100 A 500 A

10-7 10-5 10-3 10-110-11

10-8

10-5

Rea

d C

urre

nt (A

)

Current Compliance (A)

Multilevel storage from self-limiting filament growth

Reliable switching with different c.c

Long retention: Two days at 85oC

-2 -1 0 1 2 3

0

20

40

60

80

100

Cur

rent

(A)

Voltage(V)

Self-selection

Page 24: Extremely cost‐effective semiconductor layer‐transfer

New epitaxial RAM (epiRAM) devices contains all required performances for digital and analog applications Long retention with long endurance Excellent spatial/temporal device uniformity  High on/off ratio good for both analog and digital •Analog: >250, Digital: 104

Self‐selection to reduce the impact of sneak path Linear weight update Lower power consumption

This will enable large-scale memory arrays for digital application as well as for neuromorphic computing

Summary of epiRAM performances

Retention Endurance Retention& Endurance On‐off ratio Uniformity

VCM Excellent Excellent Excellent Low Good

ECM Excellent Excellent Bad High Bad

OURS Excellent Excellent Excellent High Excellent

Linearity Self‐selection

Low N/A

Low N/A

High Excellent

Page 25: Extremely cost‐effective semiconductor layer‐transfer

8” two-chamber MBE system (III-N and III-V)

4” UHV CVD (epitaxial graphene,SiC, Si, Ge, diamond)

2” MBE system (II-VI) 6” MOCVD (III-V, Si, Ge)

Moodera group

Collaborators

MIT: Eugene Fitzgerald, Jing Kong, Alexie Kolpak, Jagadeesh Moodera, Richard Molnar

Harvard: Philip Kim

OSU: Jinwoo Hwang

ASU: Shimeng Yu

UIUC: Minjoo Larry Lee

IBM: Tze-Chiang Chen, Frances Ross, James Hannon, Devendra Sadana

Equipment

Page 26: Extremely cost‐effective semiconductor layer‐transfer

Samuel Cruz (MechE) Yunjo Kim (Nano)

Nanoelectronics group

Graduate students

Scott Tan (Physics) Kuan Qiao (Physics)

Postdocs

Visitingstudent

Dr. Shinhyun Choi (EE) Dr. Wei Kong (EE) Dr. Kyusang Lee (EE)

Chanyeol Choi (EE)

Prof. Ibraheem Almansouri (EE)

VisitingScholar