EXTREMELY LOW-POWER AI HARDWARE ENABLED BY ... - AI … › brochure › SEL_LowPower.pdfEXTREMELY LOW-POWER AI HARDWARE ENABLED BY CRYSTALLINE OXIDE SEMICONDUCTORS Semiconductor Energy

Semiconductor Energy Laboratory: White Paper

September 2017

EXTREMELY LOW-POWER AI HARDWARE ENABLED BY CRYSTALLINE OXIDE SEMICONDUCTORS

Semiconductor Energy Laboratory (SEL): Extremely low-power AI chips can be

built with SEL's crystalline oxide semiconductor technology.

One factor enabling this is the extremely low off-state current of the FETs

utilizing crystalline oxide semiconductors, which we term OSFETs. The off-state

leakage current of the OSFET is extremely low. In fact, it is lower than that of

silicon FETs by 15 digits. This feature allows fabrication of devices with

extremely low power consumption, and also enables analog computation in

hardware implementations of artificial neural networks.

Thus, AI chips and systems that consume significantly less power can be

constructed.


Semiconductor Energy Laboratory: White Paper Page 1

Introduction

SEL's crystalline oxide semiconductor (c-OS)

technology will reduce the enormous amount of

power needed for AI computations, which has been

an issue facing AI.

An FET utilizing a crystalline oxide semiconductor

material (OSFET) is characterized by its extremely low

off-state leakage current; when compared with Si

FETs, the OSFET has an off-state current that is 15

digits lower. Thus, it can be said that the OSFET is a

superb switch.

Using this superb switch, we have developed a

new kind of memory, the osMemory Logic (see FIG.

1). In this memory, the OSFET is connected to

another FET and a capacitor. A charge Q can be

stored in this cell when the OSFET is turned on (data

write). Subsequently, OSFET can be turned off to

eliminate the leakage current almost completely, so

that the stored charge Q can be retained for a long

time. The stored charge Q is input to the other FET's

gate, and the amount of current flowing across the

other FET changes according to the size of Q. This is

the principle of osMemory Logic's operation.

Conventional floating-gate non-volatile memory

writes data by injecting a charge into the gate

insulating film of a transistor. Because a large amount

of energy is necessary for charge injection, the gate

insulating film degrades relatively quickly, limiting

the maximum number of write cycles.

Conversely, the osMemory Logic can rewrite data

by simply turning the OSFET on and off. Thus, the

osMemory Logic can be considered an ideal memory

that does not degrade in principle.

An artificial neural network can perform analog

computations when the osMemory Logic is applied

to its hardware. This streamlines the computation

process, enabling an AI solution that has drastically

lower power consumption than conventional ones.

In this white paper, we will introduce the basics of

crystalline oxide semiconductor technology, focusing

on osMemory Logic, analog arithmetic circuits

constructed using the osMemory Logic, and artificial

neural networks.

Figure 1. Operating principles of osMemory Logic



1. Crystalline oxide semiconductor technology

The defining feature of the OSFET is its extremely

low off-state current, which is 70 yA (yoctoamperes,

yocto- is a prefix denoting 10-24) in 85C. This is 15

digits smaller than the off-state current of

conventional silicon transistors.

Such performance is realized by the wide band gap

common to the crystalline oxide semiconductor

(c-OS) material, and also as thermal excitation of the

electron-hole pair does not occur when the transistor

is off. Si has a band gap of 1.12 eV2). On the other

hand, the band gap of IGZO, a typical c-OS material,

is approximately 3.15 eV1).

In addition, we have found that the effective hole

mass of c-OS is heavier than that of Si (see Table. 1).

Therefore, the holes in c-OS do not contribute to

electric conduction and current induced by inversion

does not flow across the transistor. These traits of

c-OS materials contribute to the extremely low

off-state current of the OSFET (see FIG. 2).

Table 1. Effective mass of holes and electrons

IGZO1) Si2)

Hole effective mass mh*/me 11-40 0.49 (heavy)

0.16 (light)

Electron effective mass me*/me 0.23-0.25 0.98 (longitudinal)

0.19 (transverse)

(A) Id-Vg characteristics of Si and OSFET (B) Ioff of Si and OSFETs Figure 2. Off-state current (Ioff) comparison between Si and OSFETs

Currently, SEL is developing VLSI technology using

crystalline oxide semiconductor technology (termed

OSLSI) with UMC3), a partner with whom we have a

joint development agreement (JDA). We are

developing OSLSI for mass production, to introduce

extremely low power (XLP) devices to the market.

OSLSI can be fabricated using a 3D hybrid process in

which OSFETs are stacked on top of Si FETs fabricated



with existing technology platforms. When we

fabricate OSFETs with this process, we can build an IC

that consumes extremely low amount of power,

thanks to extremely low off-state current of the

OSFET.

We have prototyped a 60 nm node OSLSI chip that

can efficiently shut off the power supply utilizing the

features of the OSFET, achieving an exceptionally low

power consumption. Currently our chips' power

consumption figures are lower than those of

conventional chips by one order of magnitude. Our

target is to make the difference even larger, into

three orders of magnitude. Sample chips of this

technology are planned to be shipped out from the

end of 2017 to 2018.

OSLSI not only meets the demands of digital

operation in this IoT and big data age, but also the

needs of extremely low power consumption of

analog operation and analog/digital mixed signal

operation. It can be applied to a variety of devices

such as MCU, FPGA, embedded memory, etc.

One example of such an application is a

DRAM-type device called DOSRAM. Conventional

DRAM needs to be refreshed in regular periods on

the order of milliseconds. However, DOSRAM utilizes

the OSFET to make the refresh intervals longer so

that the device only needs to be refreshed once

every hour, or a few times in one year. Another

example is a normally-off CPU (see FIG. 3). The

normally-off CPU can shut down the power supply

when the CPU does not need to operate. Using these

techniques for low power consumption, we have

successfully built IC chips with remarkably low power

consumption.

Figure 3. Power consumption 4)

1) Murakami et al., Proc.AM-FPD’12 Dig., 171, 2012. 2) S. M. Sze and K. K. Ng, Physics of Semiconductor Devices, 3rd edn. New York: John Wiley, 2006. 3) UMC is a leading global semiconductor foundry headquartered in Hsinchu, Taiwan. Source: www.umc.com (UMC is currently world's No. 2 foundry.) 4) T. Onuki et al., Symp. VLSI Circuits, pp. 124–125, 2016.



Oxide semiconductor memory (osMemory Logic)

A memory device usually stores binary data, that is,

either 0 or 1. In contrast, the osMemory Logic uses

OSFET with its extremely low off-state current, and

thus is able to store levels more than just 0 or 1 in

one memory device..

The osMemory Logic can store 6-bit (64 levels)

data (See FIG. 4).

Another feature of multi-level osMemory Logic is

that it is a four-terminal device in which data write

and data read are performed with different terminals.

This distinguishes the multi-level osMemory Logic

from MRAM (Magnetoresistive Random Access

Memory) and FRAM (Ferroelectric Random Access

Memory) devices, which are two-terminal devices.

Four-terminal devices are more suited for storing

multiple levels of data, as data stored in two-terminal

devices (they have shared write/read terminals)

change their value during data read.

Figure 4. osMemory Logic and its performance



2. AI (Artificial Intelligence) with c-OS technology

Using osMemory Logic, we can construct AI

solutions that consume little power.

Currently, artificial neural networks modeled after

the human brain are widely used in AI development

(see FIG. 5A). In an artificial neural network,

multiply-accumulate operation is performed using

weight coefficients (connection coefficients,

multipliers) and input data (multiplicands). In this

process, massively parallel computations are

required.

It is well known that GPU handles

multiply-accumulate operations of neural nets well.

However, if this kind of operation is to be performed

with digital circuits such as those in conventional

GPU, a circuit of an enormous scale will be necessary.

Furthermore, the results of the calculations will need

to be stored in a memory outside of the arithmetic

circuit, and accessing the memory will limit the

processing speed of this circuit.

Since long ago, there were expectations that

analog processing will result in a more efficient AI

solution. However, up until now, we do not have an

ideal memory that satisfies the demands in cell size

and memory precision.

As described above, the osMemory Logic

developed by SEL is characterized by its high

precision of 6 bits (64 levels) or higher. Thus, the

OSLSI with this memory can perform analog

multiply-accumulate operations in artificial neural

networks. When OSLSI is used in arithmetic

operations for artificial neural networks, there are

two advantages: the first is that the circuit can be

made much smaller than digital circuits, and the

second is that OSLSI can process massively parallel

arithmetic operations more easily than digital

circuits.

OSLSI takes a structure in which is formed by

stacking OSFET layers on top of Si LSI. This is termed

OS-Si hybrid structure, and this structure greatly

reduces energy losses during data transfers, as the

arithmetic circuit and the osMemory Logic can be

placed in locations that are extremely close to each

other (see FIG. 5B). This configuration is called

"on-site memory".

Utilizing these technologies, we can achieve low

power, smaller circuitry, and a power-efficient AI.



Figure 5. Arithmetic processing in an artificial neural network and an analog arithmetic processing circuit

Multiply-accumulate circuits This section will describe multiply-accumulate

circuits constructed with osMemory Logic (see FIG. 6).

Using this multiply-accumulate circuit, we can have a

memory that has unlimited endurance (learning

becomes simple), consumes less power and area,

and performs arithmetic operations in a more

parallel manner.

The current that flows across the osMemory Logic

corresponds to the product of the weight coefficient

W and the input voltage X (W X). In addition, the

current I which is the sum of current from each

osMemory Logic cell corresponds to a sum of

products (I I0 I1 W0 X0 W1 X1). Furthermore,

the current Iout which is the result of subtracting

noise etc. (Inoise) from the current I corresponds to

the difference (Iout I Inoise). We can increase the

operation accuracy by using the difference (Iout) in

addition to the sum of products (I).

For example, the right formula can be expressed

with multiply-accumulate and difference operation

circuits in FIG. 6.

I I0 I1 W0 X0 W1 X1

Iout I Inoise

In addition, this multiply-accumulate circuit

employs the OS-Si hybrid structure, in which digital

and analog circuits can be formed in the same

process step. This makes the multiply-accumulators

efficient in terms of area and power, enabling an

embedded AI chip with various circuits and artificial

neural networks.



Figure 6. Multiply-accumulate and difference operation circuits

Summary

This white paper described the basic information on

crystalline oxide semiconductor technology and AI

configurations that it enables. Another SEL white

paper, "AI Application Based on Crystalline Oxide

Semiconductor Technology", will describe the

performance of AI chips with the configurations

described here, and the application examples of

these chips. We hope you will take a look at them as

well.

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EXTREMELY LOW-POWER AI HARDWARE ENABLED BY ... - AI … › brochure › SEL_LowPower.pdfEXTREMELY LOW-POWER AI HARDWARE ENABLED BY CRYSTALLINE OXIDE SEMICONDUCTORS Semiconductor Energy