EKT 222 MICROPRESSOR SYSTEM - UniMAP Portalportal.unimap.edu.my/portal/page/portal30/Lecture Notes...1) Computer station with Windows OS with MY1 8085 Simulation software and terminal

EKT 222

MICROPRESSOR SYSTEM

LAB 1 :

INTRODUCTION TO 8085

MICROPROCESSOR TRAINING

KIT MTK-85

Revision 2019

EKT222 Microprocessor System

UniMAP 2

LAB 1:INTRODUCTION TO 8085

MICROPROCESSOR TRAINING

KIT MTK-85

Objectives:

1) To familiarize with the 8085 training kit. 2) To discover features and functions available in the system. 3) To utilize the board to analyze simple code executed in the board. 4) To write and compile simple assembly code in host PC and download

the code to board via terminal serial software and execute.

Equipment: 1) Computer station with Windows OS with MY1 8085 Simulation

software and terminal emulation software, Tera Term Pro Ver. 2.3. 2) 8085 Microprocessor Training Kit MTK-85.

1. INTRODUCTION TO 8085 MICROPROCESSOR TRAINING KIT.

The basic components of the 8085 Microprocessor Training Kit board consist of

M80C85AP-2 4MHz 8-bit Intel Microprocessor

32 kB Monitor ROM -27C256

32kB User RAM -HM62256B

Simple I/O Port: 8-bit GPIO built with 74LS175 D-type F-F and 74LS126

Tristate buffer

Programmable Ports: two 8255 chips, system and user ports

Programmable Counter: 8254

UART: 16C550 compatible

Monitor Program

The circuit diagram for this system is as Appendix 1. The board connects to the

computer through its serial port. The monitor program that resides in the EPROM controls

overall system operation.

1.1 Memory and I/O Map

This Training Kit has two different address maps; Memory Map and I/O Map. The

Development Kit can address up to 64K of memory devices and 255 addresses


UniMAP 3

for I/O devices. Please refer to MTK-85 manual (page 34-37) for detail description of

Memory and I/O configurations.

1.1.1 Memory Map

Figure 1 shows the memory allocation and map for the Development Kit board. The

32K of memory spaces (0000H - 7FFFH) that resides in EPROM contains the

monitor program code for the system. Whilst the memory spaces from the address

range of 8000H – FFFFH (32K) that resides in the RAM provide the memories for

user program, interrupt vectors, data and stack (Default Setting).

Figure 1: Memory Map

1.1.2 I/O Map

General purpose I/O is available the address of 00H. Two Programmable Peripheral

Interface (PPI) 8255 and a Universal Asynchronous Receiver/Transmitter (UART)

16C550 are also available in the system. The devices have a unique address, which

decodes them as isolated I/O’s. There is one Intel Programmable Interval Timer 8254

available. Besides, there is a direct BUS interfaced 20x4 Text LCD. Figure 2 shows

the I/O map for the 8085 Training Kit Board.


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Figure 2 : I/O Map

2. INPUT AND OUTPUT

The Training Kit Board have input and output devices as the following:

a. GPIO - provides 4-bit output port using D type F-F, 74LS175 and 4-bit input port

using tristate buffer, 74LS126. The address is 00 for both ports. The low-nibble

D0-D3 is output port. The higher-nibble D4-D7 is input port.

System Programmable Port 8255 - The board provides a system programmable

parallel port, 8255. I/O address from 10H to 13H map the 8255’s registers as

shown in Table 1.

Table 1

10H PORTA

11H PORTB

12H PORTC

13H CONTROL PORT


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b. User Programmable Port 8255 - The board provides a user programmable

parallel port, 8255. I/O address from 30H to 33H map the 8255’s registers as

shown in Table 2.

The 8255 Programmable Peripheral Interface (PPI) as shown in Figure 3 is a

general-purpose interface device, which is widely used in microprocessor design.

It contains three independent 8 bit ports named Port A, B and C. Port A and B can

be programmed as either input or output (all eight line must be same), while port

C is split into two 4 bit halves (Port C upper (PC4-PC7) and Port C lower (PC0-

PC3)) that can be separately programmed as input or output. Figure 3 shows the

internal architecture and pin-out for the 8255 Programmable Peripheral Interface

(PPI).

Figure 3

Four registers control the operations of the PPI and four addresses locations map all

the registers in the 8085 Training Kit as shown below:

Table 2

ADDRESS PORT

30H PORTA

31H PORTB

32H PORTC

33H CONTROL PORT


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Table 3 shows the details of the signals involved in controlling the PPI.

Table 3: Signals Controlling PPI.

A0 A1 CS RD=0 WR=0 0 0 0 Port A to Data bus Data bus to Port A

0 1 0 Port B to Data bus Data bus to Port B

1 0 0 Port C to Data bus Data bus to Port C

1 0 - - Data bus to Control Register

The control register is used to configure the PPI into a variety of operation

modes. There are three basic modes:

mode 0 : basic input/output

mode 1 : strobe input/output

mode 2 : bidirectional bus

We will only concentrate at mode 0. Refer to ‘Intel Microsystems Component

Handbook’ for further descriptions about mode 1 and 2. Mode 0 provides simple

input output operations with no handshaking. This means that data either to or from

the port does not depend on other signal for data transfer. To configure the PPI, sent

a control word to the control register. Table 4 summarized the control word format.

Table 4: Control Word

bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 1 Port A and upper half of Port C Port B & lower half of

Port C MODE Port A Port C UPPER

MODE Port B Port

CLOWER


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Format Mode Definition Control Byte: Indicate by bit b7=1.

Port A and upper half of Port C (Group A)

Bit b3 to bit b6 control the mode and direction of Group A

b6 b5 mode operation

0 0 mode 0

0 1 mode 1

1 0 mode 2

b4 Port A direction

0 OUTPUT

1 INPUT

b3 upper half of Port C direction,

0 OUTPUT

1 INPUT

Port B and lower half of Port C (Group B)

Bit b0 to bit b2 control the mode and direction of Group B

b2 Mode operation

0 mode 0

1 mode 1

b1 Port B direction

0 OUTPUT

1 INPUT

b0 Lower half of Port C direction

0 OUTPUT

1 INPUT

c. Programmable Counter 8254 – This is a programmable counter. A clock signal from

CLOCKOUT or 2 MHz supplies to counter0 and counter1. I/O space from 20H to

23H map the internal registers of 8254 as shown in Table 5.

Table 5

ADDRESS REGISTER

20H COUNTER0

21H COUNTER1

22H COUNTER2

23H CONTROL REGISTER


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Figure 4.

The Intel 8254 is a counter/timer device as shown in Figure 4, designed to solve the

common timing control problems in microcomputer system design. It provides three

independent 16-bit counters, each capable of handling clock inputs up to 10 MHz.

All modes are software programmable. Figure 4 shows block diagram and pin

descriptions from the 8254 programmable interval timer. Three separate

timer/counters are provided (Courtesy: Intel Corporation). Table 5 and Table 6 show

details signals controlling the 8254 programmable counter.

Table 5

𝑪𝑺̅̅̅̅ 𝑹𝑫̅̅̅̅̅ 𝑾𝑹 A1 A0 Function

0 1 0 0 0 Write into Counter 0



0 1 0 1 1 Write into Control Word Register

0 0 1 0 0 Read from Counter 0



0 0 1 1 1 No Operation

1 X X X X No Operation

0 1 1 X X No Operation

Table 6


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A1 A2 SELECTS

0 0 COUNTER 0

0 1 COUNTER 1

1 0 COUNTER 2

1 1 CONTROL WORD

REGISTER

The control word format is shown in the following tables:

Control Word Format

D7 D6 D5 D4 D3 D2 D1 D0

SC1 SC0 RW1 RW0 M2 M1 M0 BCD

SC – Select Counter

RW – Read/Write

M-Mode

BCD – Binary Coded Decimal

D0 Function

0 Binary Counter 16 bit

1 Binary Coded Decimal (BCD) Counter (4 Decades)

SC1 SC0 SELECT

0 0 SELECT COUNTER 0



1 1 READ-BACK COMMAND

RW1 RW0 FUNCTION

0 0 COUNTER LATCH COMMAND

0 1 READ & WRITE LSB BYTE ONLY

1 0 READ & WRITE MSB BYTE ONLY

1 1 READ & WRITE LSB FIRST, THEN MSB

M2 M1 M0 FUNCTION

0 0 0 MODE 0

0 0 1 MODE 1

X 1 0 MODE 2

X 1 1 MODE 3

1 0 0 MODE 4

1 0 1 MODE 5


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d. Serial communication RS232 interface using UART 16C550 - A clock signal from

CLOCKOUT or 2 MHz supplies to the UART 16C550. I/O space from 40H to 47H

map the internal registers of UART 16C550 as shown in Table 7. A RS232 level

converter connects the UART input/output signal to RS232 DB9 connector. The

16550 UART (universal asynchronous receiver/transmitter) is an integrated circuit

designed for implementing the interface for serial communications. Block diagram

and pins configuration of the IC are shown in Figure 5.

Data bus & Control

Logic

Register Select Logic

Interrupt Control

Logic

Interconnect B

us Lines &

Contro

l Signals

Transmit FIFO

Register

Transmit Shift

Register

Receive FIFO

Register

Receive Shift

Register

Modem Control

LogicClock &

Baud rate Generator

DTR,RTS,OUT1,OUT2

SOUT

CTS,DSRDCD,SIN

INTRXRDYTXRDY

A0-A2ADS,

CS0-CS2DDIS

DO-D7,RD, RW

MR

XIN

,XO

UT

RCL

KB

AU

DO

UT

Figure 5: UART 16C550 and its block diagram

Table 7

40H UART BUFFER/UART DIVISOR LSB

41H UART DIVISOR MSB

42H UART FIFO CONTROL REGISTER

43H UART LCR CONTROL REGISTER

44H MCR MODEM CONTROL

45H UART LINE STATUS

46H MSR MODEM STATUS

47H UART SCR

The 16550 is the most common UART. The 16650 contains two 16 byte FIFO's and

on board support for software flow control.

UART 16550 Registers

Eight I/O bytes are used for each UART to access its registers. The following table

shows, where each register can be found. The base address used in the table is the

lowest I/O port number assigned. The switch bit DLAB can be found in the line


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control register LCR as bit 7 at I/O address base + 3. This training kit board has base

address of 40H.

Table 8: UART register to port conversion table

DLAB = 0 DLAB = 1

I/O

port Read Write Read Write

base

RBR

receiver

buffer

THR

transmitter

holding

DLL divisor latch LSB

base +

1

IER

interrupt

enable

IER

interrupt

enable

DLM divisor latch MSB

base +

2

IIR

interrupt

identification

FCR

FIFO

control

IIR

interrupt

identification

FCR

FIFO

control

base +

3 LCR line control

base +

4 MCR modem control

base +

5

LSR

line

status

–

factory

test

LSR

line

status

–

factory

test

base +

6

MSR

modem

status

–

not

used

MSR

modem

status

–

not

used

base +

7 SCR scratch

LCR : Line control register (R/W)

The LCR, line control register is used at initialization to set the communication

parameters. Parity and number of data bits can be changed for example. The register

also controls the accessibility of the DLL and DLM registers. These registers are

mapped to the same I/O port as the RBR, THR and IER registers. Because they are

only accessed at initialization when no communication occurs this register swapping

has no influence on performance.


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Table 9: LCR : line control register

Bit Value Description

0,1

Bit 1 Bit 0 Data word length

0 0 5 bits

0 1 6 bits

1 0 7 bits

1 1 8 bits

2

0 1 stop bit

1

1.5 stop bits (5 bits word)

2 stop bits (6, 7 or 8 bits word)

3,4,5

Bit 5 Bit 4 Bit 3

x x 0 No parity

0 0 1 Odd parity

0 1 1 Even parity

1 0 1 High parity (stick)

1 1 1 Low parity (stick)

6 0 Break signal disabled

1 Break signal enabled

7 0 DLAB : RBR, THR and IER accessible

1 DLAB : DLL and DLM accessible

Example:

To configure serial port as 8 bit, 1 stop bit ,no parity, break disable and SET DLAB:

to access DLL&DLM

1000 0011 B = 83H

To configure serial port as 8 bit 1 stop bit no parity break disable and clear DLB:

RBR,THR&IER are accessible.

0000 0011 B = 03H


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FCR : FIFO control register (WO)

The FCR, FIFO control register is present starting with the 16550 series. This register

controls the behaviour of the FIFO's in the UART. If a logical value 1 is written to

bits 1 or 2, the function attached is triggered. The other bits are used to select a

specific FIFO mode.

Table 10: FCR: FIFO Control register

Bit Value Description

0 0 Disable FIFO's

1 Enable FIFO's

1 0 –

1 Clear receive FIFO

2 0 –

1 Clear transmit FIFO

3 0 Select DMA mode 0

1 Select DMA mode 1

4 0 Reserved

5 0 Reserved (8250, 16450, 16550)

1 Enable 64 byte FIFO (16750)

6,7

Bit 7 Bit 6 Receive FIFO interrupt trigger level

0 0 1 byte

0 1 4 bytes

1 0 8 bytes

1 1 14 bytes

Example:

To enable FIFO, clear receive FIFO and clear transmit FIFO

0000 0111 B = 07 H

DLL and DLM : Divisor latch registers (R/W)

For generating its timing information, each UART uses an oscillator generating a

frequency of about 2 MHz. This frequency is divided by 16 bit number to generate

the time base for communucation. Because of this division, the maximum allowed

communication speed is 115200 bps. Modern UARTS like the 16550 are capable of

handling higher input frequencies up to 24 MHz which makes it possible to

communicate with a maximum speed of 1.5 Mbps. On PC's higher frequencies than


UniMAP 14

the 2 MHz are rarely seen because this would be software incompatible with the

original XT configuration.

This 115200 bps communication speed is not suitable for all applications. To change

the communication speed, the frequency can be further decreased by dividing it by a

programmable value. For very slow communications, this value can go beyond 255.

Therefore, the divisor is stored in two seperate bytes, the divisor latch registers DLL

and DLM which contain the least, and most significant byte.

For error free communication, it is necessary that both the transmitting and receiving

UART use the same time base. Default values have been defined which are commonly

used. The following table is used to initialize 16C550 UART to 9600 baudrate with

2MHz clock rate microprocessor system as this training kit system.

i.e 2MHz/13 = 153846Hz

Table 11: Baudrate setting

Speed (bps) Divisor DLL DLM

9600 13 0x13 0x00

The following code is an example of initializing UART 16550 using a microprocessor

system with 2Mhz clock rate.

;---------- 16C550 COMPATIBLE UART I/O ADDRESS --------------------

; E.G., UM8250B, 16C450, 16C550

UART_BUFFER: EQU 40H

UART_LINE_STATUS: EQU 45H

UART_FIFO: EQU 42H

UART_LCR: EQU 43H

UART_DIVISOR_LSB: EQU 40H

UART_DIVISOR_MSB: EQU 41H

UART_SCR: EQU 47H

; INITIALIZE 16C550 UART TO 9600 8N1 WITH 2MHZ CLOCK

; 2MHZ/13 = 153846HZ

INIT_UART:

MVI A,83H

OUT UART_LCR ; SET DLAB BIT TO ACCESS DIVIDER

MVI A,13

OUT UART_DIVISOR_LSB

MVI A,0

OUT UART_DIVISOR_MSB

; 2MHZ/13 = 153846 HZ

; 153846HZ/16 = 9615HZ

MVI A,7

OUT UART_FIFO ;INIT FIFO AND CLEAR ALL ;

;BUFFERS

MVI A,03H

OUT UART_LCR ; CLAR DLAB


UniMAP 15

; CHECK UART LINE STATUS, IF THE

BYTE IS FF

;THEN NO UART

XRA A

OUT UART_SCR ; CHECK IF THERE IS UART

IN UART_SCR

CPI 0

JZ FOUND

XRA A

STA UART_FOUND

RET

FOUND: MVI A,1

STA UART_FOUND

RET

UART_FOUND:

DFS 1 ; 0 = NO UART, 1 UART FOUND

Example code for sending data through the serial port. Data to send is available in

register A.

;SENDING DATA THROUGH SERIAL PORT

COUT:

MOV B,A ; SAVE A

COUT1:

IN UART_LINE_STATUS

ANI 20H ; TRANSMITTER READY?

JZ COUT1

MOV A,B ; RESTORE A

OUT UART_BUFFER

RET

Example code for reading data from the serial port. Data received is available in

register A.

:READING DATA FROM SERIAL PORT

CIN:

IN UART_LINE_STATUS

ANI 1 ; DATA AVAILABLE?

JZ CIN

IN UART_BUFFER

RET

e. Keypad and Seven Segment Display Interface- these I/O devices are controlled by

system through system PPI at the address of 10H-13H. The port used are as shown in

Table 12.


UniMAP 16

Table 12: Seven Segment Display control.

Digit 6 Digit 5 Digit 4 Digit 3 Digit 2 Digit 1

Anode PB0-PB7 PB0-PB7 PB0-PB7 PB0-PB7 PB0-PB7 PB0-PB7

Cathode

(PC0-PC4)

controls

74LS145-4

to 10

multiplexer

outputs.

Out 0 Out1 Out2 Out3 Out4 Out5

Table 13: Keypad Row Control

Row 1 2 3 4 5 6 7 8

IO

Port PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7

Table 14: Keypad Column Control

Column 1 2 3 4 5 6

Column

(PC0-PC4)

controls

74LS145-

4 to 10

multiplexer

outputs

Out 0 Out1 Out2 Out3 Out4 Out5

f. Interrupts Test Button

The interrupt test button provides a single positive pulse that tied to CPU hardware

interrupt pins, RST5.5, RST6.5 and INTR. User can select the pulse to be triggered

for each pin by dip switch SW1 at a time. The onboard LED, D4 indicates the pulse

is activated when press Test button.

3. COMMUNICATION BETWEEN 8085 TRAINING KIT AND HOST COMPUTER

(TERMINAL)

The ROM monitor contains powerful commands when using UART to connect a terminal. The


UniMAP 17

UART drivers and serial commands are automatically configured when UART chip was

inserted.

Communication format is based on 9600 bit/sec, 8 data bit, no parity and one stop bit. We can

use PC running terminal emulation as VT100. When we type keyboard, the ASCII code will

send to the MTK-85 board. And the response from the board will send back to display on PC

screen.

Figure 6: Using PC as the terminal

Using PC as the terminal, we can run the assembler software that helps translating the assembly

program into machine code easily. The machine code is formed in the ASCII text file using the Intel

HEX file format. The monitor program has command that accepts HEX file downloading from the

PC to the board. This helps for long program and high level programming.

Figure 7: Using Assembler for source program translation.

Terminal Emulation Software

Any terminal emulation software can be used, however we can try the free software, Tera Term Pro

version 2.3, developed by T. Teranishi. You may download it from this URL.


UniMAP 18

We can use the RS232C cable with both ends are DB9 female type. The cable is straight

through signal, not the cross signal cable.

Figure 8: Wiring between both ends DB9 connector.

When open the Tera Term program, we can select mode of connection using serial interface


UniMAP 19

and select the COM port that you are connecting.

Figure 9: Select serial connection using COM1 until COM4 follow your USB com port

setting.

Press RESET at MTK-85 for linking MTK-85 to Tera Term Software.

Figure 10: RESET preview at TERA TERM.

RESET


UniMAP 20

Press command ? for help the help menu will display.

Figure 11: Enter command ‘?’ for help menu display. There is no need to switch between standalone mode and terminal mode. The monitor program

for both modes is working concurrently. When press RESET at MTK-85 the prompt appears on screen.

MTK-85 8085 MICROPROCESSOR TRAINING KIT (? HELP) 8100>

Command ‘?’ for help menu listing.

MTK-85 8085 MICROPROCESSOR TRAINING KIT (? HELP)

A - ASCII code

C - clear watch variables

D - disassemble

E - edit memory

F - fill constant

H - hex dump


UniMAP 21

I - i/o address map

J - jump to user program

K - display user STACK

L - load Intel hex file

M - monitor call number

N - new location pointer

Q - quick home location

R - user register display

S - set value to user register

W - watch variables

SPACE BAR - single step

? - help menu

8100>

Command ‘A’ prints the hexadecimal code for printable ASCII characters.

8100>print ASCII code

=20 !=21 "=22 #=23 $=24 %=25 &=26 '=27 (=28 )=29 *=2A +=2B ,=2C -=2D .=2E /=2F

0=30 1=31 2=32 3=33 4=34 5=35 6=36 7=37 8=38 9=39 :=3A ;=3B <=3C ==3D >=3E ?=3F

@=40 A=41 B=42 C=43 D=44 E=45 F=46 G=47 H=48 I=49 J=4A K=4B L=4C M=4D N=4E O=4F

P=50 Q=51 R=52 S=53 T=54 U=55 V=56 W=57 X=58 Y=59 Z=5A [=5B \=5C ]=5D ^=5E _=5F

`=60 a=61 b=62 c=63 d=64 e=65 f=66 g=67 h=68 i=69 j=6A k=6B l=6C m=6D n=6E o=6F

p=70 q=71 r=72 s=73 t=74 u=75 v=76 w=77 x=78 y=79 z=7A {=7B |=7C }=7D ~=7E =7F

8100>

Command ‘C’ clears the 16-byte watch variables. The monitor provides quick access to a16-byte

RAM for program testing. The watch variables use RAM space from F000-F00F.

8100> F000 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 8100>

Command ‘D’ disassembles the machine code into 8085 instructions.

8100>disassemble...

8100 0A LDAX B

8101 22C480 SHLD 80C4

8104 D8 RC

8105 54 MOV D, H

8106 3B DCX SP

8107 F65E ORI 5E

8109 47 MOV B, A

810A 08 DFB


UniMAP 22

810B 98 SBB B

810C 28 DFB

810D 41 MOV B, C

810E 09 DAD B

810F D2DEC7 JNC C7DE

8112 83 ADD E

8113 4E MOV C, M

8114 60 MOV H, B

8115>

Command ‘E’ examines and modify the data in memory. We can use this command to enter

machine code. To view the content, uses Space key and to enter a byte, press two HEX digits. To

quit just press ENTER.

8115>edit memory location = 8100

Enter to quit, SPACE key to view content

ADDR DATA

8100 [0A]

8101 [22]

8102 [C4]

8103 [80] 11

8104 [D8] 0a

8105 [54] 81

8106 [3B] 34

8107 [F6]

8107>

Command ‘F’ fills 8-bit constant to memory. The example shows fill constant FF to memory

from 9000 to 9100. We can use Command ‘N’ for setting new location and Command ‘H’ for

display the memory contents.

8107>Begin address = 9000 End address = 9100 Data = ff

8107>new location = 9000

9000>

9000 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................








9080>

Command ‘H’ dumps memory. The content of memory from current pointer 9010 to 908F will

display in hexadecimal. The ASCII code for each byte will be displayed also. The dot will be

displayed for nonprintable ASCII code.


UniMAP 23

8115>

8115 C8 76 3E 29 03 92 04 82 00 20 68 26 D8 98 80 65 .v>)..... h&...e

8125 8A C9 DD CB 43 A8 70 00 90 98 4C 80 86 70 A6 54 ....C.p...L..p.T

8135 CE BC 48 43 45 47 10 02 86 A6 43 88 60 5A FA E3 ..HCEG....C.`Z..

8145 B2 40 0C 63 C1 09 C2 61 BC E0 5A 64 32 68 26 49 [email protected]&I

8155 21 54 16 E6 55 04 05 51 6C 49 4B C2 46 C0 48 2C !T..U..QlIK.F.H,

8165 44 8D C4 C5 A7 8C D5 91 C5 93 7A 3A 5A 45 42 8B D.........z:ZEB.

8175 90 AE 85 25 EC 33 71 1A 41 C0 89 34 2C C4 87 11 ...%.3q.A..4,...

8185 F7 A1 1C 05 19 77 40 8B 23 87 0B 01 06 CD A6 58 .....w@.#......X

8195>

Command ‘I’ displays onboard I/O address.

8195>

00H-0FH onboard 4-bit GPIO, D0-D3=output port

D4-D7=input port

10H-13H 8255 system PPI, 10H=PORTA, 11H=PORTB, 12H=PORTC, 13H=CONTROL

20H-23H 8254 programmable counter, 20H=counter0, 21H= counter1

22H=counter2, 23H control register

30H-33H 8255 user PPI, 30H=PORTA, 31H=PORTB, 32H=PORTC, 33H=CONTROL

40H-47H C16550 UART registers

8195>

Command ‘J’ jumps from monitor program to user program. The example shows jump to

address 8100. The user register displays results after running the code. The RST 7 returns control

back to monitor program.

Suppose our program is adding two BCD numbers in register A and register B.

8100 3E19 MVI A, 19

8102 0602 MVI B, 02

8104 80 ADD B

8105 27 DAA

8106 FF RST 7

8117>jump to address [8107] = 8100

AF=2114 BC=02A5 DE=2DF3 HL=7E2E SP=F098 PC=8107 S=0 Z=0 AC=1 P=1 CY=0

8117>

We can see the result of addition in register A is 21 (19+02=21). The user registers are displayed

in 16-bit, e.g. AF=2114 (A=21, F=14).


UniMAP 24

Command ‘K’ displays user STACK memory. The example below shows running instruction

PUSH H. This instruction will put the content of HL register to STACK memory. We may enter

E5 to address 8100 with Command ‘E’.

We first check the user register with Command ‘r’. We see that TOP of STACK is F098. After

pressing SPACE BAR for single step, the SP is now F096. We can see the content of STACK

memory with Command k. The content of HL was saved in STACK, the content of H=91 will

be saved at F097 and L=1B at F096. TOP of STACK is now F096.

F=2114 BC=02A5 DE=2DF3 HL=7E2E SP=F098 PC=8107 S=0 Z=0 AC=1 P=1 CY=0

8117> enter command space

8107 F61E ORI 1E

AF=3F04 BC=02A5 DE=2DF3 HL=7E2E SP=F098 PC=8109 S=0 Z=0 AC=0 P=1 CY=0

8117> enter command ‘k’

ADDR DATA

F098 [62]

Command ‘L’ loads Intel Hex file to memory. The Assembler and C compiler for 8085 CPU

can produce standard Intel Hex file. The hex file contains machine code represented by ASCII

letters. Press command ‘l’ makes the board ready to read HEX file through serial port. We go to

FILE menu and select Send File.

Note: you may press ESC to escape the command before sending the file.


8100>load Intel hex file...

Choose the program form the HEX program to download sample program


UniMAP 25

‘Example1HexFile.Hex’

The onboard dot LED will run to indicate downloading is ongoing.


UniMAP 26

When completed, the report will show a number of byte received and print checksum error. If no

error it will show 0 errors.


8100>load Intel hex file...000515 bytes loaded 0 errors

8100>

8100>

To run the program, press RESET key at MTK-85.

To get back to MONITOR PROGRAM or STOP the running program, TURN OFF the the

‘POWER SWITCH’ and disconnect the software program connection.

RESET


UniMAP 27

or

To get back to MONITOR PROGRAM or STOP the running program press RESET (2 second)

the press USER1 together, then release RESET, then release USER1one by one. Until 7-segment

(ADDRESS and DATA) will show address 8100.

Press 2 Second , Then Press together, Release

RESET then release USER1

The first program will write the 8-bit data to the onboard output port at the I/O address 0.

/*

Test GPIO LED with Micro-C

*/

#include c:\mc85\8085io.h

#define gpio 0 // GPIO I/O address

delay(int j)

{

int n;

RESET

USER1


UniMAP 28

for(n=0; n<j; n++)

continue;

}

main()

{

int i;

i=0;

while(1) // repeat below block forever

{

out(gpio,i++); // write to 4-bit output port

delay(200); // delay

}

}

Command ‘M’ shows monitor call number. Some of common subroutines can be called through

RST 1 with function number preloaded in register E.

8100>

see input parameters in user manual

1Enn MVI E,function_number

CF RST 1

00 - demo

01 - delay

02 - cold_boot

03 - scan

04 - cin

05 - cout

06 - put_str

07 - init_lcd

08 - lcd_ready

09 - clear_lcd

0A - goto_xy

0B - put_str_lcd

0C - put_ch_lcd

0D - demo2

8100>

Command ‘N’ sets new location pointer at prompt. The example sets new pointer to E000 and

press ‘d’ to disassemble.

8100>new location = e000

E000>disassemble...


UniMAP 29

E000 BA CMP D

E001 3E9F MVI A,9F

E003 6F MOV L,A

E004 DF RST 3

E005 6C MOV L,H

E006 97 SUB A

E007 ED DFB

E008 14 INR D

E009 C7 RST 0

E00A A6 ANA M

E00B D9 DFB

E00C C0 RNZ

E00D 33 INX SP

E00E DC945A CC 5A94

E011 60 MOV H,B

E012 BA CMP D

E013>

Command ‘Q’ sets location pointer at prompt to 8100 and sets user PC to 8100.

E013> press ‘q’

8100> press ‘r’

AF=3F21 BC=83A5 DE=29F3 HL=7E2E SP=F098 PC=8100 S=0 Z=0 AC=0 P=0 CY=1

8100>

Command ‘R’ displays user registers content.

8100>

AF=3F21 BC=83A5 DE=29F3 HL=7E2E SP=F098 PC=8100 S=0 Z=0 AC=0 P=0 CY=1

8100>

Command ‘S’ sets value to user registers. Enter Command ‘A’ then Command ‘R’

8100>set value to user register (enter A for AF) ? press ‘a’

AF=3F21 0000

8100> press ‘r’

AF=0000 BC=83A5 DE=29F3 HL=7E2E SP=F098 PC=8100 S=0 Z=0 AC=0 P=0 CY=0

8100>

Command ‘W’ prints watch variables. These 16 bytes memory in RAM are reserved for quick

examining when test the program that used RAM.

8100>

F000 60 0D 5B FB D9 7E 43 BE F7 E6 B7 DD 57 4F 11 8B


UniMAP 30

8100>

For example, we want to store content of register A to RAM at location F000. We can enter

small code at 8100.

Key in the data to MTK-85

8100 3E1D MVI A, 1D ; load accumulator with 1D

8102 3200F0 STA F000 ; store A to RAM at F000

Press Command ‘C’ and Command ‘SPACE BAR’.

8100> enter ‘c’

F000 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

8100> enter space

8100 3E1D MVI A,1D

AF=1D00 BC=83A5 DE=29F3 HL=7E2E SP=F098 PC=8102 S=0 Z=0 AC=0 P=0 CY=0

8100> enter space

8102 3200F0 STA F000

AF=1DB4 BC=82A5 DE=29F3 HL=7E2E SP=F098 PC=8105 S=1 Z=0 AC=1 P=1 CY=0

8100> enter ‘w’

F000 1D 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

8100>

We see that we can display such memory space with single key to see the result of instruction

that stores one byte to this memory.

Command ‘SPACEBAR’ executes the instruction at address in user PC. The instruction will

show on screen with user registers result after execution.

Suppose we write a program shown below.

org 8100h

xra a

loop: out 0

mov h, a

inr h

push h

pop d

mov a, d

jmp loop

end


UniMAP 31

Then translate it to machine code file using the Assembler program. Download hex file.


8100>load Intel hex file...000011 bytes loaded 0 errors

8100>disassemble... press Command D

8100 AF XRA A

8101 D300 OUT 00

8103 67 MOV H, A

8104 24 INR H

8105 E5 PUSH H

8106 D1 POP D

8107 7A MOV A, D

8108 C30181 JMP 8101

810B 00 NOP

810C 00 NOP

810D 00 NOP

810E 00 NOP

810F 00 NOP

8110 00 NOP

8111 00 NOP

8112 00 NOP

8113> print user register with ‘Command r’ AF=1DB4 BC=82A5 DE=29F3 HL=7E2E SP=F098 PC=8100 S=1 Z=0 AC=1 P=1 CY=0

8113> press ‘SPACE’ key to execute instruction at 8100, we see A=00

8100 AF XRA A


8113> press SPACE key, the content of A will send to GPIO

8101 D300 OUT 00


8113> press SPACE key, the content of A will copy to H

8103 67 MOV H,A

AF=0044 BC=82A5 DE=29F3 HL=002E SP=F098 PC=8104 S=0 Z=1 AC=0 P=1 CY=0

8113> press SPACE key, the content of H will increment by 1

8104 24 INR H


8113> press SPACE key, the content SP will decrement by 2

8105 E5 PUSH H


8113> press K, to see the content of STACK memory

ADDR DATA


UniMAP 32

F096 [2E]

F097 [01]

F098 [62]

8113> press SPACE key, DE will be loaded with top of STACK

8106 D1 POP D

AF=0000 BC=82A5 DE=012E HL=012E SP=F098 PC=8107 S=0 Z=0 AC=0 P=0 CY=0

8113> press SPACE key, the content of D will copy to A

8107 7A MOV A,D


8113> press SPACE key, PC will be loaded with 9001

8108 C30181 JMP 8101


8113> press SPACE key, the content of A will send to GPIO, see LED!

8101 D300 OUT 00


8113>

At MTK-85 press HOME and then RUN key for run the program.

Result: The 4 LED GPIO is all light

HOME

RUN


UniMAP 33

Appendix 1

Schematic of circuit connection.


UniMAP 34


UniMAP 35


UniMAP 36


UniMAP 37

Documents

EKT 222 MICROPRESSOR SYSTEM - UniMAP Portalportal.unimap.edu.my/portal/page/portal30/Lecture Notes...1) Computer station with Windows OS with MY1 8085 Simulation software and terminal