Precision Analog-to-Digital Converters Achieve New Level of Noise Performance and Low Power Operation in Portable Industrial and Medical Equipment Portable instrumentation, industrial process controls, medical monitoring devices, and other applications increasingly demand reliable, space-constrained, highly accurate signal conversion on a diminishing power budget.

Solution The AD7170 and AD7171 are 12-bit and 16-bit, respectively, small package devices that achieve new levels of noise performance and low power operation for portable industrial and medical instrumentation equipment. Both devices have a 125 Hz output data rate and generate less noise than competing converters while consuming 25% less current. They contain a precision ∑-∆ ADC core with on-chip oscillator and consume only 110 μA of power. These devices are particularly suitable for portable or battery-operated products where the lowest possible power is a requirement. These ADCs also have a power-down mode in which the devices consume 5 μA, thus increasing the battery life of the product. The AD7170 and AD7171 operate with a power supply from 2.7 V to 5.25 V and are available in a 10-lead LFCSP.

AD7170/AD7171 Features

•RMS noise: 6.9 μV

• INL: ±0.1 LSB at 12 bits (AD7170),±0.4 LSB at 16 bits (AD7171)

•Power consumption: 110 μA (5 μA in power-down mode)

•Ease of use, fixed sampling rate, no programming required

•3 mm × 3 mm LFCSP

•Pricing:• AD7170—$0.95• AD7171—$1.15

16-BIT -ADC

AD7171

GND REFIN(+)

AIN(+)

VDD

AIN(–)

REFIN(–)

DOUT/RDY

SCLK

PDRSTINTERNAL

CLOCK

AD7171 Block Diagram

• Weigh scales

• Pressure measurement

• Industrial process control

• Portable instrumentation

Applications

DATA ConverTer ICs

Contents

Precision ADCs: New Level of Noise Performance, Low Power Operation . . 1

Continuous Time ∑-∆ ADCs for Wider Bandwidth Applications . . . . . . . . . . . . 2

Industry’s First Quad, 16-Bit, 1 GSPS High Speed DAC . . . . . . . . . . . . . . . . . 3

Current Output DACs Provide Speed, Accuracy, Low Power, Integration . . . . 3

Data Converter ICs Selection Guide . . 4

Precision DACs Offer Up to 60 V Output Range . . . . . . . . . . . . . . . . . . . 6

Design Resource Provides Faster Time to Market, Lowers Risks . . . . . . 6

Buffers Provide High Quality Clocking Signals . . . . . . . . . . . . . . . . . 7

ADC Driver Amplifier Dissipates Just 7.5 mW . . . . . . . . . . . . . . . . . . . . 7

Multichannel Simultaneous Sampling ADC . . . . . . . . . . . . . . . . . . . 8

Your SemIConDuCTor SoluTIonS reSourCe volume 10, Issue 7

www.analog.com/v10DataConverters

visit our new website for data sheets, samples, and additional resources.

Continuous Time ∑-∆ ADC Architecture Offers a Number of Benefits for Wider Bandwidth Applications∑-∆ ADCs have long been the architecture of choice for applications requiring both high resolution and high accuracy. The standard product implementation of this converter architecture has been within a discrete time domain and limited to a few MHz of bandwidth. However, the continuous-time ∑-∆ (CTSD) architecture can provide the advantages of its discrete time counterpart, in addition to a wider bandwidth, inherent antialiasing, and an easy to drive input structure.

Solution A key benefit of the CTSD architecture, utilized in the AD926x family of converters from ADI, is the inherent alias immunity that it offers. Since the sampling operation of a CTSD-based ADC occurs at the output of the internal loop filter, which is the same point where quantization noise is injected into the loop, aliases are attenuated by a similar mechanism, which attenuates quantization noise. This process, coupled with a 640 MSPS high speed modulator and a 32× oversampling ratio (OSR) for a 10 MHz input signal, ultimately eliminates the need for antialiasing filters. In addition, the continuous time loop filter architecture enables a passive 1 kΩ input impedance and results in a –3 dBm input power requirement for a 2 V peak-to-peak input voltage swing that significantlyrelaxes the requirements of the ADC driver amplifier. This feature contrasts with a typical switched capacitor input structure that represents a significant challenge to filter and drive.

The AD926x CTSD ADCs achieve a high dynamic range of 86 dB and an SNR of 84.5 dBFS up to a 10 MHz analog input bandwidth. The ADC provides an extremely low 15 dB noise figure, which is nearly a 7 dB improvement over current state-of-the-art wideband converters. The low noise figure reduces the front-end gain, thereby relaxing linearity requirements in an RF system. In addition, the high dynamic range makes it possible to eliminate the automatic gain control commonly employed in many communication systems.

In emerging applications, such as wireless communications, medical imaging, and radar systems, accurate and high speed signal conversion is a key requirement. High SNR and wide bandwidth, in addition to a reduction in requirements of system level components, make CTSD-based ADCs an ideal fit for these applications. An example of this is illustrated by using the AD9262 in combination with ADI’s high performance ADL5382 quadrature demodulator and AD9520 clock generation and distribution products to implement a 20 MHz bandwidth, high performance, low part count 700 MHz to 2.7 GHz direct conversion receiver.

AD9262 Features

•SNR: 83 dB (85 dBFS) to 10 MHz input

•SFDR: 87 dBc to 10 MHz input

•Noise figure: 15 dB

•Output data rate: 30 MSPS to 160 MSPS

• Input impedance: 1 kΩ

•Power dissipation: 600 mW

•Analog supply operation: 1.8 V

•Pricing:• AD9262BCPZ—$30.00

AMP

MAIN Rx

AMP

ADC

AD926216-BIT CTSD ADC

AD9520CLOCK GENERATIONAND DISTRIBUTION

ADL5382I/Q DEMODULATOR

90° PHASESHIFTER

ADC

TO Tx/FPGAFP

GA D

IGIT

ALPR

OCES

SING

AD9262 Dual ADC in I/Q Downconverter Application

• Baseband quadrature receivers CDMA2000, W-CDMA, multicarrier GSM/EDGE, 802.16x, and LTE

• Quadrature sampling instrumentation

• Medical equipment

• Radar receivers

Applications

Webcast Series

Quadrature and DC Correction for Direct Conversion Receivers at www.analog.com/webcasts.

Featured Circuits from the lab

Circuit note Cn-0140, High Performance, Dual Channel IF Sampling Receiver

This circuit includes the RF front end, as well as the IF sampling receiver. It is composed of a dual balanced mixer, broadband IF SAW filter, digitally controlled dual VGA, and dual ADC. The circuit also includes a synthesizer that generates the ADC sampling clock.

Access the complete circuit note at www.analog.com/CN-0140.

2 For data sheets, samples, and additional resources, visit www.analog.com/v10DataConverters

Industry’s First Quad, 16-Bit, 1 GSPS High Speed Digital-to-Analog Converter Simplifies Wireless Transmitter DesignTo meet today’s industrial market environment, many data acquisition design engineers require multichannel data acquisition with added temperature sensing in space-constrained applications.

Solution The AD9148 DAC is designed to provide support for multiantenna wireless communications standards requiring the large bandwidths demanded by digital predistortion (DPD) transmit systems. This 4-channel, 16-bit DAC has a 1 gigasample per second (GSPS) data rate that is 25% faster than competing dual channel devices. Additionally, the new highly integrated converter cuts component count in half relative to dual channel DACs. Its 12 mm × 12 mm BGA package size allows designers of W-DCMA, CDMA2000, TD-SCDMA, GSM, and WiMAX infrastructure equipment and other wireless applications to reduce printed circuit board space by 20%. For more information, visit www.analog.com/pr/AD9148.

AD9148 Features

•Single carrier W-CDMA ACLR: 80 dBc @ 150 MHz IF

•Channel-to-channel isolation: >90 dB

•Novel 2×, 4×, and 8× interpolator eases data interface

•On-chip fine complex NCO allows carrier placement anywhere in DAC bandwidth

•Pricing:• AD9148—$58.60

When Time Domain Performance Is Critical, Current Output DACs Provide an Unmatched Combination of Speed, Accuracy, Low Power, and Integration In arbitrary waveform generation, instrumentation, and medical applications where positioning an analog signal to an exact value within the shortest interval is critical, the demand is for integrating more channels and functionality in the same board space. To achieve this higher level of integration and smaller package sizes, high speed current output DACs are tasked with not only delivering high accuracy and fast settling time specifications but also providing more functionality on lower power consumption.

Solution To achieve fast digital-to-analog conversion, current output DACs are the solution of choice for mixed-signal board designers. This DAC architecture minimizes the output resistance, allowing faster settling time. Led by communications requirements, current DACs have achieved the required high update rates without compromising static accuracy.

The AD9726 is a true 16-bit accurate current output DAC with a maximum update rate of 400 MSPS, combining a single or double data rate LVDS data interface with a factory calibrated 20 mA differential current output for improved INL and DNL performance. The AD9726 operates from 2.5 V and 3.3 V power supplies.

The dual AD9117 features two 14-bit accurate current output DACs operating up to 125 MSPS update rate, integrating a double data rate CMOS digital interface with internally calibrated 20 mA differential current outputs. The AD9117 can operate with supplies between 1.8 V and 3.3 V.

• Wireless infrastructure

• MIMO/transmit diversity

• Digital high or low IF synthesis

• LTE, TD-SCDMA, WiMAX, W-CDMA, CDMA2000, GSM

Applications

Webcast Series

Differential Circuit Design Techniques for Communications Applicationsat www.analog.com/webcasts.

3For data sheets, samples, and additional resources, visit www.analog.com/v10DataConverters

Data Converter ICs Selection Guidenew 𝚺-𝚫 ADCsPart number

resolution (Bits)

number of Channels Differential/Pseudo Differential

noise (rms)

PGAon-Chip

ClockPackage

Price ($u.S.)

AD7190 24 2/4 8.5 nV Yes Yes 24-lead TSSOP 5.90

AD7191 24 2/4 15 nV Yes YesPin-programmable

24-lead TSSOP3.80

AD7192 24 2/4 11 nV Yes Yes 24-lead TSSOP 4.90

AD7193 24 4/8 11 nV Yes Yes 28-lead TSSOP 5.40

AD7194 24 8/16 11 nV Yes Yes 32-lead LFCSP 6.40

AD7171 16 1/0 11.5 μV No Yes 10-lead LFCSP 1.15

AD7170 12 1/0 11.5 μV No Yes 10-lead LFCSP 0.95

new PulSAr® ADCsPart number

resolution (Bits)

Speed (mSPS)

Power (mW)

Snr (dB)

Inl (lSB)

PackagePrice

($u.S.)

AD7986 18 2 15 97 ±2 20-lead LFCSP 33.13

AD7984 18 1.33 10.5 99.7 ±2.25 10-lead LFCSP, 10-lead MSOP 28.29

AD7982 18 1 7 99 ±2.5 10-lead LFCSP, 10-lead MSOP 23.28

AD7985 16 2.5 15.5 90 ±1.5 20-lead LFCSP 30.99

AD7983 16 1.33 10.5 91.6 ±1.25 10-lead LFCSP, 10-lead MSOP 20.19

AD7980 16 1 7 91.5 ±2 10-lead LFCSP, 10-lead MSOP 13.38

AD7944 14 2.5 9 84.5 ±1 20-lead LFCSP 9.99

new multichannel SAr ADCs

Part numbernumber of Channels

resolution (Bits)

Throughput rate

AIn range (v)

Power Supply (v)

Interface Package Price ($u.S.)

AD7291 8 12 22 kSPS 0 to ref 2.7 to 3.6 I2C 20-lead LFCSP 3.90

AD7298 8 12 1 MSPS 0 to ref 2.7 to 3.6 SPI 20-lead LFCSP 3.90

new High Speed, low Power ADCs

Part numberresolution

(Bits)number of Channels Sample rate (mSPS)

Power Consumption (mW/Channel)

Price ($u.S.)

AD9609BCPZ-65 10 1 65 70 4.17

AD9609BCPZ-80 10 1 80 78 4.50

AD9629BCPZ-65 12 1 65 76 12.08

AD9629BCPZ-80 12 1 80 85 16.70

AD9649BCPZ-65 14 1 65 77 23.35

AD9649BCPZ-80 14 1 80 87 25.00

AD9255BCPZ-80 14 1 80 241 33.00

AD9255BCPZ-105 14 1 105 322 45.00

AD9255BCPZ-125 14 1 125 370 59.93

AD9265BCPZ-80 16 1 80 241 48.33

AD9265BCPZ-105 16 1 105 322 56.67

AD9265BCPZ-125 16 1 125 370 65.00

AD9266BCPZ-65 16 1 65 97 43.33

AD9266BCPZ-80 16 1 80 110 48.33

AD9269BCPZ-65 16 2 65 80 73.66

AD9269BCPZ-80 16 2 80 93 84.09

4 For data sheets, samples, and additional resources, visit www.analog.com/v10DataConverters

Continuous Time 𝚺-𝚫 Converter Family

Part number resolution (Bits)Bandwidth

(mHz)number of Channels

Snr (dBFS)

SFDrPower (mW)

output Interface

PackagePrice

($u.S.)

AD9262 16 2.5 2 90.5 87 580 16-bit CMOS 64-lead LFCSP 30.00

AD9262-5 16 5 2 87.5 87 630 16-bit CMOS 64-lead LFCSP 35.29

AD9262-10 16 10 2 84.5 87 675 16-bit CMOS 64-lead LFCSP 35.29

AD9267 4-bit modulator* 10* 2 85 87 400 4-bit LVDS 64-lead LFCSP 48.00

AD9261-10 16 10 1 84.5 87 350 16-bit CMOS 48-lead LFCSP 28.00

*AD9267 is a CTSD modulator providing 4-bit, 640 MSPS LVDS output enabling 85 dBFS SNR over a dc to 10 MHz bandwidth.

High voltage DACsPart number

number of Channels

resolution (Bits)

Inl (lSB)

max outputs (v)

Temperature range (°C)

PackagePrice

($u.S.)

AD5501 1 12 1 30, 60 –40 to +105 16-lead TSSOP 4.58

AD5504 4 12 1 30, 60 –40 to +105 16-lead TSSOP 8.12

Precision nanoDAC® Converters

Part number Converters Configuration resolution/Accuracy PackagePrice

($u.S.)

AD5541A LDAC, VLOGIC functionality 16-bit, 1 LSB 10-lead MSOP, 10-lead LFCSP 6.25

AD5541A-1 CLEAR functionality 16-bit, 1 LSB 8-lead LFCSP 7.95

AD5542A CLEAR, LDAC, RFB, VLOGIC functionality 16-bit, 1 LSB 16-lead TSSOP, 16-lead LFCSP 6.25

AD5542A-1 CLEAR, RFB functionality 16-bit, 1 LSB 10-lead LFCSP 7.95

AD5512A CLEAR, LDAC, RFB, VLOGIC functionality 12-bit, 1 LSB 16-lead LFCSP 2.85

High Speed DACsPart number

resolution (Bits)

maximum update rate

Power Consumption (mW)

Settling Time (ns)

SFDr @ fouT PackagePrice

($u.S.)

AD9726 16 400 MSPS 575 10.5 78 dBc @ 20 MHz 14 mm × 14 mm, 80-lead TQFP 35.37

AD9117 (2-channel)

14 125 MSPS 220 11.5 85 dBc @ 10 MHz 6 mm × 6 mm, 40-lead LFCSP 9.50

AD9148 (4-channel)

16 1 GSPS 2480 2072 dBc @ 80 MHz,

@ 400 MSPS12 mm × 12 mm, 196-ball

CSP_BGA and BGA58.60

ADC Driver AmplifiersPart number

3 dB BW (mHz)

minimum Gain (ACl)

voltage Supply (v)

Supply Current (mA)

Slew rate (v/𝛍s)

Distortion 2nd (dBc)

Distortion 3rd (dBc)

Frequency (mHz)

PackagePrice

($u.S.)

ADA4927-1 2300 1 4.5 to 11 22.1 5000 –87 –89 100 16-lead LFCSP 3.79

ADA4939-1 1400 2 3 to 5 37.7 6800 –77 –91 100 16-lead LFCSP 3.79

ADA4932-1 560 1 3 to 11 9.6 410 –72 –80 50 16-lead LFCSP 2.95

ADA4937-1 1900 1 3 to 5.25 39.5 6000 –77 –84 100 16-lead LFCSP 3.79

ADA4950-1 750 1 3 to 11 9.5 2900 –80 –84 5016-lead LFCSP, 24-lead LFCSP

2.99

ADA4938-1 1000 1 4.5 to 11 40 4700 –82 –82 5016-lead LFCSP, 24-lead LFCSP

3.79

AD8275 15 0.2 (fixed) 3.3 to 15 1.9 25 –106 –106 15 8-lead MSOP 1.60

Clock Drivers and Buffers

Part number Configuration Functionality resolution/Accuracy PackagePrice

($u.S.)

AD5541A LDAC, VLOGIC 16-bit, 1 LSB 10-lead MSOP, 10-lead LFCSP 6.25

AD5541A-1 CLEAR 16-bit, 1 LSB 8-lead LFCSP 7.95

AD5542A CLEAR, LDAC, RFB, VLOGIC 16-bit, 1 LSB 16-lead TSSOP, 16-lead LFCSP 6.25

AD5542A-1 CLEAR, RFB 16-bit, 1 LSB 10-lead LFCSP 7.95

AD5512A CLEAR, LDAC, RFB, VLOGIC 12-bit, 1 LSB 16-lead LFCSP 2.85

5For data sheets, samples, and additional resources, visit www.analog.com/v10DataConverters

Tested Circuits from the Lab Design Resource Provides Faster Timeto Market and Lowers Risks

Featured Circuits from the lab

Circuit note Cn-0149, 40 Channels of Programmable Industrial Level Output Span Using the AD5370 16-Bit Voltage Output DAC

This circuit is a multichannel DAC configuration with different output spans on groups of channels. It utilizes the AD5370 to provide 40 DAC channels with 16 bits of resolution. The AD5370 is configured to have eight channels with an output span of ±10 V and 24 channels with an output span of −4 V to +8 V.The AD5370 is the industry’s only 40-channel DAC offering these industrial signal level outputs and the flexibility of multiple output spans with 16-bit resolution.

The figure shows a typical configuration for the AD5370 using two external references. The nominal output span for the AD5370 is four times the reference voltage. The default offset DAC register values for the AD5370 allow for an output span of −4 V to +8 V using a 3 V reference. Programming the offset DAC register associated with VOUT0 to VOUT7 allows a span of ±10 V to be achieved using a 5 V reference.

Access the complete circuit note at www.analog.com/CN-0149.

Precision DACs Offer Up to 60 V Output RangeDesigners of high voltage systems typically utilize low voltage DACs coupled with a discrete amplifier solution to attain the high voltage output drive capability required in applications such as high voltage test equipment, programmable voltage/current sources, precision HV biasing, and receiver bias in optical communications. This approach involves multiple elements: time spent for layout and interface considerations, additional component count, added costs, and increased power consumption.

Solution Now in full production, ADI’s newest family of high voltage DACs addresses these concerns with the introduction of the AD5501 (single) and AD5504 (quad) devices, which integrate a 12-bit DAC, an on-chip high voltage output amplifier, and a precision reference. In addition, a temperature sensor with alarm function and power saving features are also incorporated on chip. The AD5501/AD5504 provide a pin-selectable 0 V to 30 V or 0 V to 60 V output range, and the on-chip output amplifiers allow an output swing within the range of AGND of +0.5 V and VDD of –0.5 V. The low power, high speed serial interface with readback capability can handle clock speeds up to 30 MHz. The AD5501/AD5504 operate over a wide temperature range of −40°C to +105°C and are available in a 16-lead TSSOP.

AD550x Features

•Resolution: 12 bits

•Output range: 30 V, 40 V, or 60 V

• Integrated precision reference

•SPI interface with readback

Webcast Series

Understanding Sampled Data Systems (Parts I & II)at www.analog.com/webcasts.

SYNC

CLR R_SEL

ALARM

VLOGIC

SCLK

SDI

SDO

VDD

VOUT

VFB

DGND AGND

PRECISIONREFERENCE

POWER-ONRESET

DACREGISTER

OUTPUTBUFFER

POWER-DOWNCONTROL LOGIC

INPUTCONTROL

LOGICTEMPERATURE

SENSOR

RESISTORNETWORK

REF (+)12-BITDAC

122.36k

1713k

AD5501

• HV test equipment

• Programmable voltage and current sources

• Precision HV biasing

• Receiver bias in optical communications

• Avalanche photodiodes

• Piezoelectric cells

• Transducer, servo, HV LED drivers

• HV regulators

Applications

40 channels of programmable output voltage span using the AD5370 DAC (simplified schematic: decoupling and all connections not shown).

AD5501 DAC Block Diagram

ADR435

AD5370

5V

15V 5V

VDD

VSS SIGGND AGND DGND

DVCC

VREF0

VREF1

0.1F

10F

0.1F

0.1F

ADR4233V

0.1F

–15V

10F

0.1F

±10VVOUT0

VOUT7

–4V TO +8VVOUT8

VOUT39

Circuit Design Shortcut

Complementary components for AD5501/AD5504 high voltage output DACs:

•ADSP-BF531 DSP

•ADCLK846 clock buffer for low clock jitter

6 For data sheets, samples, and additional resources, visit www.analog.com/v10DataConverters

Buffers Provide High Quality Clocking Signals for High Speed ADC Applications The clock signals provided to high speed, high performance ADCs are often one of the primary limiting factors for the performance achieved by that ADC. In order to achieve their rated performance specifications, high speed data converters require a fast rising, low jitter sampling clock. In large complex systems where there are many digital chips requiring clock signals as a reference, it can be a significant challenge to maintain a good low noise/low jitter clock signal throughout the entirety of the clock tree. In addition, while performance remains the main concern for the designer, most recent applications require a challenging combination of integration, flexibility, performance, small size, high frequencies, lower cost, and an additional requirement of energy efficiency. These requirements challenge clock vendors when they must all be met in one design.

Solution Analog Devices has developed a broad portfolio of clock buffers that have been designed to help designers solve this clock integrity challenge. With a clock buffer inserted between the converter and the system clock tree, jitter figures on the order of 50 fs to 75 fs for LVPECL fanout buffers and extremely low skew on the order of 9 ps (picoseconds) are achieved. These buffer ICs also provide up to 12 channels of low jitter clock fanout.

The ideal clock signal for a data converter features not only low phase noise/jitter, but also very sharp rise and fall edges. As clocking speeds continue to increase, the challenge to achieve a high quality square wave clock signal grows along with that speed. The ADCLK9xx family can provide very fast edges with extremely little impact on the noise of the clock signal when located in close proximity to the converter.

To view the complete ADCLK9xx clock buffer family, visit www.analog.com/ADCLK9xxFamily.

ADC Driver Amplifier Dissipates Just 7.5 mW, Enabling Low Power SAR Applications DC converter technology has continued to steadily advance in noise and distortion performance while simultaneously lowering power dissipation. Converters such as ADI’s AD7986, an 18-bit SAR ADC sampling at 2 MSPS, can digitize up to 1 MHz of input bandwidth and operate on just 15 mW of power. A challenge faced by many designers today is finding a driver amplifier that is capable of delivering adequate noise performance at a correspondingly low power point.

Solution Analog Devices has developed the ADA4940, an ultralow distortion ADC driver amplifier to provide the solution. Dissipating just 7.5 mW, this device is capable of delivering true 18-bit ENOB performance over a dc to 2 MHz bandwidth. With THD greater than 100 dB and RTO noise of just 9.5 nV/√Hz, the ADA4940 enables full ADC performance at a power point commensurate with the class of SAR converters that it is intended to drive. Fully differential and balanced, the ADA4940 is also capable of dc level translation to interface between sensors and ADC cores.

The ADA4940-1 is a single-channel device in an 8-lead SOIC and a 3 mm × 3 mm, 16-lead LFCSP. The ADA4940-2 is a dual-channel device in a 4 mm × 4 mm, 24-lead LFCSP.

ADA4940-1 Features

•Extremely low harmonic distortion: –95 dBc @ 2 MHz

•Low input noise: 3 nV/√Hz

•Very low power consumption: 7.5 mW (5 V supply)

•Single-ended-to-differential or differential- to-differential operation

•Pricing:• ADA4940-1—$1.79• ADA4940-2—$2.99

LVPECL

OTHER ADCs,FPGA, SERDES, ETC.

LVPECL

LVPECL

AD9523/AD9524AD9520

ADCLK9xx

AD9262 ADC

AD9262 ADC

AD9262 ADC

Typical low Jitter ADC Clock Tree

ADA4940-x

+

–

10k

1k

1k

1k

1k

5V 10F

VINVOCM

100nF

10kVREF

2.5V

DIGITALOUTPUT

VDD

GND

REFIN+

IN–AD7356

• Low power ADC drivers

• Single-ended-to-differential converters

• Medical imaging

• Industrial process controls

• Portable electronics

Applications

Driver Amplifier and 18-Bit SAr ADC Application

7For data sheets, samples, and additional resources, visit www.analog.com/v10DataConverters

Analog Devices, Inc.600 North Bedford Street East Bridgewater, MA 02333-1122

All prices in this bulletin are in USD in quantities greater than 1000 (unless otherwise noted), recommended lowest grade resale, FOB U.S.A.

I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).

©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners.

Inventory Code: DATA-CONV-V10-IS7-10

Printed in the U.S.A. SB09244-3-7/10

Multichannel Simultaneous Sampling ADC Eases Complexities of Power-Line Monitoring SystemsDesigners of multichannel current and voltage monitoring systems deal with a complex host of circuit design challenges: dual supply requirements, limited analog input range, input impedance dependent on speed, and high costs due to implementation of expensive discrete components.

Solution The AD7606 ADC simplifies substation automation design with its 8-channel, 16-bit, simultaneously sampling, true bipolar inputs. Integrating multiple channels enables the measurement of 3-phase current, voltage, and neutral monitoring for substation automation equipment. The ±5 V and ±10 V input ranges allow for the preservation of phase information while sampling bipolar voltages and currents over a wide dynamic range. The AD7606’s bipolar input capability from a single 5 V supply, high impedance analog inputs, and on-board reference eliminate the need for external components and allow for single supply systems.

The 16-bit AD7606 is available in 8-, 6-, and 4-channel versions; the AD7607 is a 14-bit version with the same options.

AD7606/AD7607 Features

•8/6/4 simultaneously sampled inputs

•True bipolar analog input ranges: ±10 V, ±5 V

•Single 5 V analog supply, 1.8 V to 5 VDRIVE

•1 MΩ analog input impedance

•Analog input clamp protection

•Fast throughput rate: up to 200 kSPS

•Low power: 100 mW typical at 200 kSPS

•0.1% gain and 0.01% offset error

•Pricing:• AD7606—$23.10• AD7607—$18.48

• Power-line monitoring and protection systems

• Instrumentation and control systems

• Multiaxis positioning systems

• Data acquisition systems

• Multiphase motor control

Applications

DSP ISOLATOR RS-232

REF

POWER MANAGEMENT

8-CHANNELSIMULTANEOUSSAMPLING ADC

AD7606

VIN

IIN

Analog Devices, Inc. Worldwide HeadquartersAnalog Devices, Inc. One Technology Way P.O. Box 9106 Norwood, MA 02062-9106 U.S.A. Tel: 781.329.4700 (800.262.5643, U.S.A. only) Fax: 781.461.3113

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