Mixed Signal Lecture PLL

8/14/2019 Mixed Signal Lecture PLL

1/15

2005/5/10 A. Matsuzawa 1

Mixed signal systems

and integrated circuits

Akira Matsuzawa

Tokyo Institute of Technology


2/15


PLL system

Basic PLL system

Basic circuit block Phase detector

Analog mixer

Digital 3 state Phase Frequency Detector

Charge pump circuit

Filter

Voltage Controlled Oscillator Pull-in process

System characteristics (frequency and time response) With 1st order filter

With Lag-Lead filter

Delay Locked Loop

Clock recovery circuits

Frequency synthesizer


3/15


Phase locked loop (PLL)

Application area

1. Internal clock generation in LSI locked to external clock2. Frequency Synthesizer for communication systems3. Clock recovery for communication systems and data storage systems4. FM demodulation

Clock recovery

Frequency Synthesizer

Fast settling and accurate frequency are required


4/15


Basic Phase-Locked Loop (PLL) system

Phase

detector

Filter

(LPF)

Voltage

ControlledOscillator

Frequency

Divider

Output signal

Input signal

Basic construction of a PLL system

Vc( )oipPD KV =

i

o

cvco V

Higher frequency components

are attenuated

PLL is a feedback system to match the input signal phase and the output signal phase.Through this process, frequencies of these signals become equal completely.


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Waveforms in PLL system


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Analog phase detector (mixer type)

Vout Vout

A

B

Gilbert cell PD (Small signal)Or EXOR

( )11tsin +

( )22tcos +

A

B

Vout

( )( )

( )( )2121

2121

tsin

tsin

++

+++

Filter out

( ) 2121sin

21outV

2

2

Suitable for high frequency application, but no ability as a frequency detector


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D Q

Clk R

1

Clk

R

D Q1

Up

Down

3 state Phase Frequency Detector

A

B

A

B

Down

Glitch

Up

UP=0

Down=0

UP=1

Down=0

UP=0

Down=1

State II State 0 State IB A

B A

A B 2

2

Vout

Works as an Up-Down counter

Frequency detector

Vout goes High, if rising edge comes earlier.

This 3 state phase detector is currently most widely used.Because it has a ability for frequency detect.


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Dead zone in PFD

Dead zone

Id Insert delay circuits

The most serious issue of PFD is dead zone at a small phase deviation.This causes a large jitter and a phase noise.

Improved PDF


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Narrow pulse effect

If the output pulse is very narrow, the pulse height can notexceed the logic threshold voltage. This results in the missing data.

Finally, this makes the dead zone.


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up

down

Ipump

Ipump

IPD to VCO

F(s)

)/(2

radAI

K

KI

pump

PD

PDPD

=

=

IPD :Effective average current

Vcont

2

Charge pump circuit

The charge pump circuit can generate the averaged current of which thevalue is proportional to the phase difference.

This circuit works as Digital to Analog Converter.


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Actual charge pump circuit

Cascode: high impedance and small capacitance

Stable node voltage

Active filter

Prevent large voltage change,when not connected


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VcontVmin VmaxVcenter

max

min

fr

VCOVcntr

cntrVCOfrout VK +=

Vcntris high

Vcntris low

Frequ

ency

Voltage Controlled Oscillator

Design points Proper tuning rangeLow jitter and phase noiseLow power supply noise and stability

High linearity for V to f characteristics


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( )

+=

=

+=

+=

tsinVKtcosA)t(y

tcosV)t(V:exampleFor

dtVKtcosA)t(y

VK

mm

m

VCOfr

mmcntr

cntrVCOfr

cntrVCOfrout

High frequency component in Vcntr can be suppressed

VCO

Low frequency component in Vcntr can't be suppressed

VCO act as a low pass filter to the control voltage signal


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VDDCN

If

)WLWL(C2

5

)WLWL(C2

3)WLWL(CCCC

tot

VCOosc

nnppox

nnppoxnnppoxinouttot

=

+=

+++=+=

Current starved Ring oscillator

Vcntr

IVCO

Ring Oscillator (Odd stages)

Current sourse

Merit: easy implementation on LSI

Issue: large jitter noise

This ring oscillator is widely used for the digital clock generator in LSI


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VCO (Source coupled VCO)

VDD

IoIo Io

2IoOff

VDD

VDD-VTHN

Y

X

Time

M2 on M1 on M2 on M1 on M2 on

VDD

XDischargeVinVCO

VDD

M1 M2

X Y

Out Out

Out

Out

Y

M1 M2

Low frequency generation

Differential signalHigh noise tolerance

Sometime used forLow frequency oscillator

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Mixed Signal Lecture PLL