1510 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 46, NO. 7, JULY 1999

Collector-Up SiGe HeterojunctionBipolar Transistors

Andreas Gruhle, Horst Kibbel, Claus Mahner, and Werner Mroczek

Abstract—SiGe heterojunction bipolar transistors (HBT’s) incollector-up version have been built. This configuration has theadvantage of a very low collector-base capacitance. In addition,because the substrate is the emitter, extremely low emitter seriesinductances may be achieved, e.g., in the case of packaged discretedevices. This is particularly interesting for RF power amplifiers.Transistors fabricated on MBE-grown layers with an emitter sizeof 1.6 �m showed near-ideal Gummel plots, dc current gains ofup to 485, anS21 gain of 20 dB at 2 GHz and anfmax of 33 GHz.A problem to be solved is the large parasiticCBE capacitancewhich degrades the transit frequency.

I. INTRODUCTION

A LL present silicon bipolar transistors have their emitteron the top (surface) of the substrate. The reason is

that an efficient carrier collection requires an emitter areawhich lies nested inside the collector area. In addition itwould be technologically very difficult to form a polysiliconemitter buried below monocrystalline silicon. A transistorin collector-up (C-up) configuration, however, has severaladvantages like a very small and ease of integration aspointed out in 1980 [1]. There are two reasons why the SiGeheterojunction bipolar transistors (HBT’s) is the preferredchoice to realize a C-up transistor: First, there is no needfor a (buried) polysilicon emitter. Instead, a monocrystallineemitter may be used because the hole injection is suppressedby the Si/SiGe heterostructure. Second, the active BE and BCjunction areas are almost equal in the case of an HBT as theion-implanted external base contact area does not participatein the transistor action. This is because the turn-on voltage ofits pn-homojunction is higher than that of the inner Si/SiGeheterojunction of the transistor [2]. Moreover, the devices willprofit from the excellent performance of SiGe HBT’s whichhave reached record transit frequencies and -values wellabove 100 GHz [3], [4]. A first realization of C-up SiGe HBT’swith symmetrical doping in the emitter and collector layershowed an of 9 GHz [5] in C-up mode. The SiGe HBT’spresented in this paper have a layer structure optimized forC-up operation. The fabrication technology is described andmeasured dc and high frequency data are reported.

Manuscript received November 21, 1998; revised January 8, 1999. Thereview of this paper was arranged by Editor W. Weber.

A. Gruhle and H. Kibbel are with the Daimler-Benz Research Center, D-89013 Ulm, Germany (e-mail: andreas.gruhle@dbag.ulm.DaimlerBenz.com).

C. Mahner and W. Mroczek are with Vishay Semiconductor GmbH, D-74025 Heilbronn, Germany.

Publisher Item Identifier S 0018-9383(99)05069-8.

Fig. 1. Layer structure of a collector-up SiGe HBT.

II. FABRICATION

The 4-in, 1.5-m cm n substrates are loaded into theMBE system after an RCA clean. The complete HBT layerstructure is grown without interruption. The sensitive BE orBC interfaces are therefore never exposed to air or otherprocess environments unlike in the cases of an epitaxiallygrown base or a polysilicon emitter. After a thermal cleaningat 900 C growth starts with the 200 nm thick emitter layer.The 1.5 10 cm doping concentration is achievedwith secondary ion implantation of Sb. The 5 10 cmboron doped SiGe base is 47-nm thick and and contains24% of germanium (no grading) grown by coevaporation.Undoped spacer layers on both the collector and emitter sideallow a limited diffusion of the boron within the base duringsubsequent processing. The collector, 250 nm thick doped4 10 with Sb, is followed by an 80-nm thick ncollectorcontact layer.

Device fabrication starts with the deposition of a 300 nmCVD masking oxide. Optical lithography defines the collectorareas. The oxide and the top nlayer around the collectorare dry etched in a way that the SiGe remains covered bythe n collector layer. The external base is formed by a BF2implantation. Next the emitter mesa is dry etched therebyremoving the SiGe layer outside the device area (Fig. 1). Notethat this mesa is again very shallow and that it is not necessaryto etch down to the n substrate because the emitter contactwill be formed on the backside of the wafer. Then the mesais surrounded by a 1.5m thick pad oxide. Now a few nmof thermal oxide are grown at 690–750C for 10 minutes. Itprovides the necessary passivation of the surfaces and acts asan implantation anneal. The thermal budget has to be carefullycontrolled so that the unavoidable boron diffusion in the basewill not reach collector or emitter and form parasitic barriers.

0018–9383/99$10.00 1999 IEEE

GRUHLE et al.: COLLECTOR-UP SiGe HBT’S 1511

Fig. 2. Cross section of a discrete collector-up SiGe HBT.

Fig. 3. Micrograph of a fabricated SiGe HBT. Die size is 260�m� 300 m.The upper transistor with eight emitter fingers has been contacted. The bondpads are base and collector, there is no parasitic Cbc pad capacitance.

Finally a 0.3- m CVD oxide is deposited and contact holesare opened. After a TiSi salicide process a 1m thick TiW/Aumetallization is formed. Fig. 2 shows a cross section of afinished HBT, Fig. 3 is a micrograph. The collector fingersare 1.6 m 9 m and the distance between two adjacentgold lines is 2.5 m.

III. D EVICE PERFORMANCE AND DISCUSSION

Fig. 4 shows the Gummel plots in C-up and E-up (inverse)operation of a 2 1.6 m 9 m device with 23%germanium. Collector current ideality factors are below

which proves the absence of any parasitic barrier dueto base dopant outdiffusion [6]. The base current ideality isslightly larger than 1 at low current densities probably due toa nonideal pn-junction between the external base implantationand the emitter layer because of end-of-range damage. This isconfirmed by the fact that recent samples with an additional900 C RTA had lower base currents and therefore higher ßthan earlier devices [7]. The maximum obtained value wasß for an HBT with a 29% Ge base. The current gainsof the devices with RTA are in fact similar to the ß valuesobtained with emitter-up HBT’s [8]. This prooves that theexternal base current is in fact negligible due to its higherturn-on voltage. The average was 12 V and reached3–6 V depending on the ß value.

The high frequency performance of the transistors in classicE-up operation is poor ( below 10 GHz) despite the well-behaved dc characteristics. The false doping levels in thisinverse mode result in a high and a low emitter doping

Fig. 4. Gummel plots of a 2� 1.6 �m � 9 �m C-up SiGe HBT in C-upand E-up operation.

which limits the maximum current density. However operatingthe devices in the envisaged C-up configuration at mAand V they show high gain (Fig. 5). No deembeddingwas done, i.e. all pad capacitances are included. Note that thereis no parasitic detrimental pad capacitance between collectorand base. The extremely low of only 18 fF (extractedfrom -parameter measurements) results in a high MAG andMSG with an of 28 GHz. The MUG (not shown) givesan of 33 GHz. Note that the slope of the MAG curveis steeper than the usual 20 dB/decade. This means that atlower frequencies the transistor has a higher gain than expectedfrom the -value. At, e.g., 4 GHz operating frequency,the performance of the C-up HBT is that of a conventionaltransistor with 50 GHz . In discrete circuits the transistoris usually in a 50 Ohm environment and the gain is most

1512 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 46, NO. 7, JULY 1999

Fig. 5. C-up on-chip high frequency performance (2� 1.6 �m � 9 �m) at IC = 8 mA, VCE = 3 V.

(a) (b)

Fig. 6. Common-emitterS-parameters from 2 to 20 GHz of a C-up HBT and an E-up HBT. The latter device was from [8]. Both devices had equalsizes and bias as in Fig. 5.

important. It reaches almost 20 dB at 2 GHz. The transitfrequencies (not shown) however are only between 10 GHzand 18 GHz.

Simulations confirmed that these rather poor values comefrom the large parasitic base-emitter area which is about fourtimes as large as the intrinsic emitter.This adds a parallel

capacitance to the internal leading to total valuesof up to 1.1 pF. This capacitance is the dynamic valuein the equivalent circuit diagram extracted from-parametermeasurements at mA. Considering the fact that theaverage of an E-up transistor [8] is only about 0.25 pF itbecomes clear that the total is roughly proportional to thetotal base-emitter area, i.e., the sum of intrinsic and extrinsicpart. The external therefore largely influences the high

frequency performance of the transistor despite its inactive rolein static measurements. Note that this effect was not foreseenin Ref. [1]. The external homojunction may even represent ahigher capacitance per area because of an increased minoritycarrier (hole) charge which has to be added to the pure spacecharge capacitance. When comparing samples with differentGe percentages in the base there is a tendency of lowerwith higher Ge content, probably because the difference ofthe built-in voltages increases.

What are the consequences of the large capacitance?The measured -parameters in Fig. 6 show that the inputimpedance is not even lower than for E-up versionsof these HBT’s fabricated with the same technology [8]. Thisis due to the extremely small and therefore the

GRUHLE et al.: COLLECTOR-UP SiGe HBT’S 1513

absence of any Miller capacitance. For 2–5 GHz applicationsin common-emitter configuration, e.g. low noise or poweramplifiers, the presented C-up HBT’s are therefore the pre-ferred choice. At higher frequencies the advantage is lostdue to the steeper gain-rolloff. On the other hand digitalcircuits will in any case suffer from the large . Forpackaged discrete devices however an additional advantageof the emitter substrate is the lack of any emitter bond wireinductance: C-up HBT’s in SOT 343 packages indeed showed1–2 dB higher gains than normal emitter-up HBT’s with equalon-chip S21 values.

IV. CONCLUSION

Collector-up SiGe HBT’s have been realized using anexisting fabrication technology for normal SiGe HBT’s. TheC-up version has demonstrated almost ideal static behaviorand a slightly better high frequency performance than emitter-up devices. The reason is the extremely low collector-basecapacitance which even compensates for the drawbacks of theincreased . Packaged discrete devices benefit from theabsence of any emitter bonding inductance resulting in up to2 dB higher gains. A suggested future improvement is thereduction of the external capacitance by an optimizedfabrication technology, e.g. using selective or differentialepitaxy.

ACKNOWLEDGMENT

The authors thank U. Erben, University of Ulm, for thehigh frequency measurements.

REFERENCES

[1] H. Kroemer, “Heterostructure bipolar transistors and integrated circuits,”Proc. IEEE, vol. 70, pp. 13–25, Jan. 1982.

[2] L. van den Oever, L. Nanver, C. Visser, T. Scholtes, R. Hueting, andJ. Slotboom, “Inverse SiGe heterojunction bipolar transistor,” inProc.ESSDERC’97, pp. 540–543.

[3] A. Schuppen, A. Gruhle, U. Erben, H. Kibbel, and U. Konig, “Multiemitter finger SiGe-HBT’s withfmax up to 120 GHz,” inIEDM Tech.Dig., 1994, pp. 377–380.

[4] E. F. Crabbe, B. S. Meyerson, J. M. C. Stork, and D. L. Harame,“Vertical profile optimization of very high frequency epitaxial Si- andSiGe-base bipolar transistors,” inIEDM Tech. Dig., 1993, pp. 83–86.

[5] J. N. Burghartz, K. A. Jenkins, D. A. Grutzmacher, T. O. Sedgewick,and C. L. Stanis, “High-performance emitter-up/down SiGe HBT’s,”IEEE Electron Device Lett., vol. 15, pp. 360–362, 1994.

[6] A. Gruhle, “The influence of EB-junction design on collector saturationcurrent, ideality factor, early voltage and device switching speed of SiGeHBT’s,” IEEE Trans. Electron Devices,, vol. 41, pp. 198–203, 1994.

[7] C. Mahner, W. Mroczek, A. Gruhle, and H. Kibbel, “SiGe heterojunctionbipolar transistors in collector-up configuration,” inProc. ESSDERC’98,pp. 136–140.

[8] A. Gruhle and C. Mahner, “Low1=f noise SiGe HBT’s with applicationto low phase noise microwave oscillators,”Electron. Lett.,vol. 33, no.24, pp. 2050–2052, 1997.

Andreas Gruhle was born in Heidelberg, Ger-many, in 1959. He received the Dipl.-Ing. andPh.D. degrees in electrical engineering from theTechnical University of Aachen, Germany, in 1985and 1989, respectively. In 1983, he spent one yearunder a Fulbright scholarship at the University ofCincinnati, Concinnati, OH.

He was with the CNET Research Center, Greno-ble, France, from 1990 to 1991. Back in Germany,he joined the Daimler-Benz Group working withTemic-Telefunken in Heilbronn and with Dornier,

Friedrichshafen. Since 1994, he is at the Daimler-Benz Research Center, Ulm,Germany, where he is responsible for research and development of SiGeheterostructure devices.

Horst Kibbel was born in 1943. He received theIng. grad. degree in physical technologie from theFachhochschule Lubeck, Germany, in 1970.

In the same year, he joint the AEG ResearchCenter, Ulm, Germany. Since 1974, he has beenengaged in the development of the SiGe-MBEtechniques and growth of SiGe superlattices, Si,and SiGe device structures. He has been with theDaimler-Benz Research Center Ulm, since 1990,responsible for MBE growth of HBT’s.

Claus Mahner war born in Heilbronn, Germany in 1956. He received theDipl.-Ing. (FH) degree in physical engineering from the FachhochschuleHeilbronn in 1980.

In 1980, he joined the former TEMIC Semiconductor Corporation, wherehe was worked on the development of RF BJT chips. He is now Manager ofthe Wafer Design/Development Transistors Section, Diodes and TransistorsDivision, Vishay Semiconductor GmbH, Heilbronn.

Werner Mroczek was born in Gross-Poetzdorf, Germany, in 1939. Hereceived the Dipl.-Ing. degree in electrical engineering from the RWTHAachen, Aachen, Germany in 1965.

In the same year he joined the former Telefunken AG, Heilbronn, Germany,where he first developed horizontal and vertical deflecting circuits for TVapplications. In 1969, he changed his field of interest and developed siliconNF transistors, RF pnp transistors for TV-tuners, MOS power transistorsin D-MOS and V-MOS technique. For ten years, he was involved indevelopment and processing of GaAs components. He was Product Managerof manufacturing GaAs MESFETs at AEG-Telefunken GmbH, Heilbronn,Germany. He is now with the Devision Product Engineering Transistors,Vishay Semiconductor GmbH, Heilbronn, Germany, where he is engaged indevelopment and processing of RF BJTs and SiGe HBTs.