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Assembly Language Basic Concepts IA-32 Processor Architecture

Assembly Language Basic Concepts IA-32 Processor Architecture

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Page 1: Assembly Language Basic Concepts IA-32 Processor Architecture

Assembly Language

Basic ConceptsIA-32 Processor Architecture

Page 2: Assembly Language Basic Concepts IA-32 Processor Architecture

Hardware

Intel386, Intel486, Pentium, or latest processors, AMD processors, or compatible processors. The same architectures, but different organizations.

Not working in MAC computers, SUN Sparc workstations.

Page 3: Assembly Language Basic Concepts IA-32 Processor Architecture

Operating Systems

MS-DOS, Windows 95/98/ME/NT/2000/XP.

Advanced programs relating to direct hardware access and disk sector programming must be run under MS-DOS, Windows 95/98/ME.

Not working in Linux, MAC OS.

Page 4: Assembly Language Basic Concepts IA-32 Processor Architecture

Programming Software

Editor: Microsoft Visual C++, TextPad, Notepad.

Assembler and linker: MASM 6.15. 32-but debugger: Microsoft Visual C++. Other: MASM 32.

Page 5: Assembly Language Basic Concepts IA-32 Processor Architecture

Two Types of Programs

16-bit real-address mode: Run under MS-DOS and in the console window under MS-Windows. Written for the Intel 8086 and 8088 processors. Not discussed in this class.

32-bit protected mode: All the programs in this class.

Page 6: Assembly Language Basic Concepts IA-32 Processor Architecture

Build Environments

Microsoft Visual C++ installed. Install MASM 6.15:

ftp://[email protected] Set tools: Build, run, and debug.

http://kipirvine.com/asm/4th/ide/vs6/index.htm

Page 7: Assembly Language Basic Concepts IA-32 Processor Architecture

A Simple C File

#include <stdio.h>

void main() { int i;

i = 0x10000; i = i + 0x40000; i = i - 0x20000; printf("i= %d\n", i); }

Page 8: Assembly Language Basic Concepts IA-32 Processor Architecture

Into Assembly Language 3: void main() 4: { 0040B450 push ebp 0040B451 mov ebp,esp 0040B453 sub esp,44h 0040B456 push ebx 0040B457 push esi 0040B458 push edi 0040B459 lea edi,[ebp-44h] 0040B45C mov ecx,11h 0040B461 mov eax,0CCCCCCCCh 0040B466 rep stos dword ptr [edi] 5: int i; 6: 7: i = 0x10000; 0040B468 mov dword ptr [ebp-4],10000h

Page 9: Assembly Language Basic Concepts IA-32 Processor Architecture

8: i = i + 0x40000; 0040B46F mov eax,dword ptr [ebp-4] 0040B472 add eax,40000h 0040B477 mov dword ptr [ebp-4],eax 9: i = i - 0x20000; 0040B47A mov ecx,dword ptr [ebp-4] 0040B47D sub ecx,20000h 0040B483 mov dword ptr [ebp-4],ecx 10: printf("i= %d\n", i); 0040B486 mov edx,dword ptr [ebp-4] 0040B489 push edx 0040B48A push offset string "i= %d\n" (0041fe50) 0040B48F call printf (0040b710) 0040B494 add esp,8 11: }

Page 10: Assembly Language Basic Concepts IA-32 Processor Architecture

A Simple MASM File

TITLE Add and Subtract (AddSub.asm)

; This program adds and subtracts 32-bit integers. ; Last update: 2/1/02

INCLUDE Irvine32.inc

.code main PROC

mov eax,10000h ; EAX = 10000h add eax,40000h ; EAX = 50000h sub eax,20000h ; EAX = 30000h call DumpRegs

exit main ENDP END main

Page 11: Assembly Language Basic Concepts IA-32 Processor Architecture

Portability

Assembly language is not portable. Well-known processor families are Mot

orola 68x00, Intel IA-32, SUN Sparc, DEC Vax, and IBM-370.

Page 12: Assembly Language Basic Concepts IA-32 Processor Architecture

Applications

Small embedded programs. Real-time applications. Computer game consoles. Help understand computer

hardware and operating systems. Subroutines hand optimized for

speed. Device drivers.

Page 13: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Virtual MachinesVirtual Machines

• Tanenbaum: Virtual machine concept• Programming Language analogy:

• Each computer has a native machine language (language L0) that runs directly on its hardware

• A more human-friendly language is usually constructed above machine language, called Language L1

• Programs written in L1 can run two different ways:• Interpretation – L0 program interprets and executes L1

instructions one by one• Translation – L1 program is completely translated into an L0

program, which then runs on the computer hardware

Page 14: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Translating LanguagesTranslating Languages

English: Display the sum of A times B plus C.

C++: cout << (A * B + C);

Assembly Language:

mov eax,Amul Badd eax,Ccall WriteInt

Intel Machine Language:

A1 00000000

F7 25 00000004

03 05 00000008

E8 00500000

Page 15: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Specific Machine LevelsSpecific Machine Levels

(descriptions of individual levels follow . . . )

Page 16: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Modes of OperationModes of Operation

• Protected mode• native mode (Windows, Linux)

• Real-address mode• native MS-DOS

• System management mode• power management, system security, diagnostics

• Virtual-8086 mode• hybrid of Protected

• each program has its own 8086 computer

Page 17: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Basic Execution EnvironmentBasic Execution Environment

• Addressable memory• General-purpose registers• Index and base registers• Specialized register uses• Status flags• Floating-point, MMX, XMM registers

Page 18: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Addressable MemoryAddressable Memory

• Protected mode• 4 GB

• 32-bit address

• Real-address and Virtual-8086 modes• 1 MB space

• 20-bit address

Page 19: Assembly Language Basic Concepts IA-32 Processor Architecture

Web site Examples

Microsoft Visual C++

Page 20: Assembly Language Basic Concepts IA-32 Processor Architecture

Web site Examples

Flags

Book OF D I x SF ZF x AC x P x CF

Visual C

OV UP EI x PL ZR x AC x PE x CY

Page 21: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

General-Purpose RegistersGeneral-Purpose Registers

CS

SS

DS

ES

EIP

EFLAGS

16-bit Segment Registers

EAX

EBX

ECX

EDX

32-bit General-Purpose Registers

FS

GS

EBP

ESP

ESI

EDI

Named storage locations inside the CPU, optimized for speed.

Page 22: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Accessing Parts of RegistersAccessing Parts of Registers

• Use 8-bit name, 16-bit name, or 32-bit name• Applies to EAX, EBX, ECX, and EDX

Page 23: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Index and Base RegistersIndex and Base Registers

• Some registers have only a 16-bit name for their lower half:

Page 24: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Some Specialized Register Uses Some Specialized Register Uses (1 of 2)(1 of 2)

• General-Purpose• EAX – accumulator• ECX – loop counter• ESP – stack pointer• ESI, EDI – index registers• EBP – extended frame pointer (stack)

• Segment• CS – code segment• DS – data segment• SS – stack segment• ES, FS, GS - additional segments

Page 25: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Some Specialized Register Uses Some Specialized Register Uses (2 of 2)(2 of 2)

• EIP – instruction pointer• EFLAGS

• status and control flags

• each flag is a single binary bit

Page 26: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Status FlagsStatus Flags• Carry

• unsigned arithmetic out of range• Overflow

• signed arithmetic out of range• Sign

• result is negative• Zero

• result is zero• Auxiliary Carry

• carry from bit 3 to bit 4• Parity

• sum of 1 bits is an even number

Page 27: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Floating-Point, MMX, XMM RegistersFloating-Point, MMX, XMM Registers

• Eight 80-bit floating-point data registers

• ST(0), ST(1), . . . , ST(7)

• arranged in a stack

• used for all floating-point arithmetic

• Eight 64-bit MMX registers

• Eight 128-bit XMM registers for single-instruction multiple-data (SIMD) operations

Page 28: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

IA-32 Memory ManagementIA-32 Memory Management

• Real-address mode• Calculating linear addresses• Protected mode• Multi-segment model• Paging

Page 29: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Real-Address modeReal-Address mode

• 1 MB RAM maximum addressable• Application programs can access any area

of memory• Single tasking• Supported by MS-DOS operating system

Page 30: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Segmented MemorySegmented Memory

Segmented memory addressing: absolute (linear) address is a combination of a 16-bit segment value added to a 16-bit offset

li ne

ar a

ddr e

sse

s

one segment

Page 31: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Calculating Linear AddressesCalculating Linear Addresses

• Given a segment address, multiply it by 16 (add a hexadecimal zero), and add it to the offset

• Example: convert 08F1:0100 to a linear address

Adjusted Segment value: 0 8 F 1 0

Add the offset: 0 1 0 0

Linear address: 0 9 0 1 0

Page 32: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Protected ModeProtected Mode (1 of 2) (1 of 2)

• 4 GB addressable RAM• (00000000 to FFFFFFFFh)

• Each program assigned a memory partition which is protected from other programs

• Designed for multitasking• Supported by Linux & MS-Windows

Page 33: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Protected modeProtected mode (2 of 2) (2 of 2)

• Segment descriptor tables• Program structure

• code, data, and stack areas

• CS, DS, SS segment descriptors

• global descriptor table (GDT)

• MASM Programs use the Microsoft flat memory model

Page 34: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Flat Segment ModelFlat Segment Model

• Single global descriptor table (GDT).• All segments mapped to entire 32-bit address space

Page 35: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Multi-Segment ModelMulti-Segment Model

• Each program has a local descriptor table (LDT)• holds descriptor for each segment used by the program

Page 36: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

PagingPaging

• Supported directly by the CPU• Divides each segment into 4096-byte blocks called

pages• Sum of all programs can be larger than physical

memory• Part of running program is in memory, part is on disk• Virtual memory manager (VMM) – OS utility that

manages the loading and unloading of pages• Page fault – issued by CPU when a page must be

loaded from disk

Page 37: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Levels of Input-OutputLevels of Input-Output

• Level 3: Call a library function (C++, Java)• easy to do; abstracted from hardware; details hidden• slowest performance

• Level 2: Call an operating system function• specific to one OS; device-independent• medium performance

• Level 1: Call a BIOS (basic input-output system) function• may produce different results on different systems• knowledge of hardware required• usually good performance

• Level 0: Communicate directly with the hardware• May not be allowed by some operating systems

Page 38: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

Displaying a String of CharactersDisplaying a String of Characters

When a HLL program displays a string of characters, the following steps take place:

Page 39: Assembly Language Basic Concepts IA-32 Processor Architecture

Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, 2007. Web site Examples

ASM Programming levelsASM Programming levels

ASM programs can perform input-output at each of the following levels:

Library Level 3