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ECE 453 Homework Assignment 5 Topic: Op Amp Design Active current Mirrors Consider the following amplifier: Vdd V out C M4 M3 M1 M2 M5 M6 M7 M8 V b3 V b2 V b1 M9 M10 M11 M12 C L A V in + V in - This is a single stage amplifier with differential inputs, a single output and high gain. In other words, an op-amp. 1. Find the differential gain and output swing of this op-amp 2. How many poles does the differential response contain? Where are they? What is the bandwidth given by the output pole? Sketch magnitude and phase Bode plots. 3. Estimate common mode gain and frequency response. Sketch magnitude and phase plots. 4. Explain what the op-amp is doing and how it works. Answer the floowing in your description. Why are there two transistors stacked at node “A” (M3 and M4) rather than 1? Why is/isn’t this a good idea. What does the connection at node “C” do? How would you size M5 and M6 and what do they do? What do M1 and M2 do? 5. Redraw the amplifier with NFET inputs. Is the gain the same? Why or why not? 6. Design a bias network to set V b1 , V b2 , and V b3 1

Analog IC Design (ECE 4530) Problem Set 5

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Page 1: Analog IC Design (ECE 4530) Problem Set 5

ECE 453 Homework Assignment 5

Topic: Op Amp Design Active current Mirrors

Consider the following amplifier:

Vdd

VoutC

M4

M3

M1 M2

M5 M6

M7M8

Vb3

Vb2

Vb1

M9M10

M11M12

CL

AVin+ Vin

-

This is a single stage amplifier with differential inputs, a single output and high gain. In otherwords, an op-amp.

1. Find the differential gain and output swing of this op-amp

2. How many poles does the differential response contain? Where are they? What is thebandwidth given by the output pole? Sketch magnitude and phase Bode plots.

3. Estimate common mode gain and frequency response. Sketch magnitude and phase plots.

4. Explain what the op-amp is doing and how it works. Answer the floowing in your description.

• Why are there two transistors stacked at node “A” (M3 and M4) rather than 1? Whyis/isn’t this a good idea.

• What does the connection at node “C” do?

• How would you size M5 and M6 and what do they do?

• What do M1 and M2 do?

5. Redraw the amplifier with NFET inputs. Is the gain the same? Why or why not?

6. Design a bias network to set Vb1, Vb2, and Vb3

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