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AHCAL – Electromechanical Integration
EUDET annual meeting – Paris 8.-10. Oct. 2007
M. Reinecke
Outline
Mathias Reinecke EUDET annual meeting – Paris 8.-10. Oct. 2007
-AHCAL - Mechanical and Electrical Integration
-Light Calibration System – First Results
-Integration Studies
AHCAL Half Sector - Integration
Mathias Reinecke EUDET annual meeting – Paris 8.-10. Oct. 2007
AHCAL Slab6 HBUs in a row
HBUHCAL Base Unittyp. 12 x 12 tiles
SPIROCtyp. 4 on a HBU
HEBHCAL Endcap BoardHosts mezzanine modules:DIF, CALIB and POWER HLD
HCAL Layer Distributor
Mechanical Constraints
Mathias Reinecke EUDET annual meeting – Paris 8.-10. Oct. 2007
HCAL: 2 x 8 Sectors2,432,000 Tiles
Requirements for a HCAL Base-Unit (HBU)from the Barrel‘s mechanics:
-As large as possible (assembly time)
-As thin as possible (barrel diameter)
-Easy de-/installation of single units (repair)
-Rail System needed (Sector walls ?)
-Minimize dead area
HBU – Cross Section
Mathias Reinecke EUDET annual meeting – Paris 8.-10. Oct. 2007
Sector wall
Reflector Foil100µm
Polyimide Foil100µm PCB
800µm
Bolt with innerM3 threadwelded to bottom plate
SiPM
Tile3mm
HBU Interface500µm gap
Bottom Plate600µm
ASICTQFP-1001mm high
UV LED500µm
Component Area: 900µm highHBU height:6.1mm(4.9mm without covers => absorber)
AbsorberPlates(steel)
Spacer1.7mm
Top Plate fixing
HBU – PCB Layer Structure
Mathias Reinecke EUDET annual meeting – Paris 8.-10. Oct. 2007
-6 layer design with cut-outs for ASICS and connectors-75 Lines for high-gain SiPM setup-Two signal layers for impedance-controlled routing-Total height (PCB + components): 1.5mm-Two companies agreed on structure at reasonable costs!!
Ligth Calibration System (LCS)
Mathias Reinecke EUDET annual meeting – Paris 8.-10. Oct. 2007
SiPM response strongly depends ontemperature and bias voltage.
LCS (based on UV LEDs) needed for:
-Calibration (ADC counts per PE)
-Gain Monitoring
Two different concepts under investigation:- Quasi-Resonant LED driver setup on DIF, fibers into AHCAL gaps (see: our Prague colleagues, I. Polak et al.)- One LED per tile, direct coupling without fibers (currently tested at DESY)
LED Testboard (LCS Test)
Mathias Reinecke EUDET annual meeting – Paris 8.-10. Oct. 2007
Test LED integration into HBU (LCS):
-Crosstalk of driving circuit to SiPM?
-Integration to PCB / coupling to tile?
-Connector test: stability, number of connection-cycles?
LED Integration
Mathias Reinecke EUDET annual meeting – Paris 8.-10. Oct. 2007
LEDs radiate throughholes in PCB
Two different types of LEDsassembled on PCB (top)
1 Cent
LED optical output
Mathias Reinecke EUDET annual meeting – Paris 8.-10. Oct. 2007
Pulse Generator Output (inv),2.5V pre-bias of LED
LED optical output, measuredwith PMT H9858-01(Hamamatsu) in 50, Vc=0.8V=> Gain ≈ 3*10^(4) A/W
Our LEDs are very fast !!!
30nW peak
5ns
LED driving circuit on HBU
Mathias Reinecke EUDET annual meeting – Paris 8.-10. Oct. 2007
LED: Ledtronics SML0603-395-TRTransistor: Infineon BFR340F (npn)
Charge on Cdrive
defines currentthrough LED
Response from Tiles
Mathias Reinecke EUDET annual meeting – Paris 8.-10. Oct. 2007
SiPM 1
SiPM 2
SiPM 4
Trigger WLS decay time?
SiPMs coupled to oscilloscope (50),LED1 amplitude controlled by VCALIB(DC).
Only LED1 active
30ns
Estimate Crosstalk
Mathias Reinecke EUDET annual meeting – Paris 8.-10. Oct. 2007
Scope in averagingmode
Crosstalk ≈ 2.5%electr./optical ??
Light in Tile 1
Crosstalk to tile 2 and tile 4
≈40mV
≈1mV
Prelim
inar
y
LCS Status
Mathias Reinecke EUDET annual meeting – Paris 8.-10. Oct. 2007
GOOD
Critical
- The LEDs can be assembled automatically without problems. All of the 5 tested LEDs survived the assembling.-The LEDs are very fast.-The driving circuit works concerning speed and amplitude. The amplitude can be controlled in wide range by VCALIB (6-9V)
-The driving voltage (base of transistor) has to be large (1V step).-The sensitivity to changes of the driving amplitude is high.
Next steps-Connect the LED testboard to the ASIC‘s testboard (VFE ASIC) in order to measure dynamic range, crosstalk and linearity w.r. to VCALIB and LED uniformity.
Testboard II : ASIC + Integration
Mathias Reinecke EUDET annual meeting – Paris 8.-10. Oct. 2007
SPIROC Testboard (HBU prototype):
-Assembly (Tiles, PCB, ASICs, LEDs), Cassette Construction-Performance in the dense HBU setup: Noise, gain, crosstalk, power and signal integrity-DAQ Interface -LCS with LEDs on board.
Tile integration to HBU : see M. Danilov‘s talk (alignment pins)
Testboard III : Power-System
Mathias Reinecke EUDET annual meeting – Paris 8.-10. Oct. 2007
Test Power-Ground System (2.20m):
-Oscillations when switching?
-Voltage drop, signal integrity (traces, connectors)?
-SPIROC performance @ far end (blocking caps sufficient)?
‚LayerConcentrator‘(DIF*)
SPIROCTestboard
Extenders(Power-Gnd, Traces)
Conclusions
Mathias Reinecke EUDET annual meeting – Paris 8.-10. Oct. 2007
-First ideas about the next generation AHCAL develop to a promising concept.
-Feasibility of many design aspects (e.g. PCB structure) have to be proved.
-Testboard Design I (LCS) is alive now!-Testboard II (HBU prototype) design starts in spring 2008.-Testboard III (power plane test) runs in parallel (beginning of 2008).
-Mechanical engineering of absorber stack and HBU cassette is starting!