5.Introduction to the Design of Embedded System

7/31/2019 5.Introduction to the Design of Embedded System

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I n t r o du ct ion t o t h e

Design o f Em bedd ed

. .

Pre se n t e d b y Sa n g -Uk Je on

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Contents

Part I What is Embedded System?

Part II Designing Embedded System

Embedded System Design

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.Em bedded Sy st em ?

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Definition of Embedded S stem*

Part I. What is Embedded System?

A combination of computer hardware and

software, and perhaps additional

mechanical or other arts

Designed to perform a dedicated function

In some cases, part of a large system orroduct

e.g.) Antilock Braking System(ABS) in a car

* " , , ,

Available at http://www.netrino.com/Embedded-Systems/Glossary KAIST SE LAB 20 0 8 4/35


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Characteristics of Embedded S stem*


Single-functioned

Executes a single program, repeatedly

Low power, small, fast, etc.

Reactive and real-time

environment

without delay

* ,

Hardware/Software Introduction, John Wiley & Sons, ISBN: 0471386782, 2002. KAIST SE LAB 20 0 8 5/35


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Cate orization of Embedded S stem


Computation oriented

MP3 player, MPEG decoder, etc

Home appliances, industrial controller, safety-

cr ca con ro erHybrid(computation + control)

Portable information devices

.

Networked multimedia applications



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.Em b edd ed Sy st em

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Issues in Embedded S stem Desi n

Part II. Designing Embedded System Traditional Embedded System Design

Top-priority design goal

Construct the system with desired functionality

Simultaneously optimize numerous design

cons ra n s Size, performance, power, flexibility, etc.



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Traditional Embedded S stem Desi n

Part II. Designing Embedded System Traditional Embedded System Design

System Specification Designers partition the system intohardware and software early in the flow

ar on

HW Develo ment

Test notpassed

HW and SW engineers design theirrespective components in isolationHW and SW engineers do not talk to each

SW Development

other

Integration problems

Prototype Test

g cos an ong era on

Prototype

Test passed

Need new methodology!!9HW & SW co-design9Platform-based design

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HW & SW Co-Desi n

Part II. Designing Embedded System HW & SW Co-Design

System Specification

Design Space ExplorationHW & SW Partition

HW Model SW Model* Synonym *ApplicationFunctionality

* Synonym *ArchitecturePlatform

Map HW & SW

Evaluation*va ua on a e

HW & SW Inte ration

*Evaluation subject : Performance, energy, etc. KAIST SE LAB 20 0 8 10/35


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Desi n S ace Ex loration DSE *


Finding the optimal design of software and

hardware

Problem Space

(Characteristics of SW & HW)

Solution Space

(Design objectives)

Software functionalityHardware parameters9

Performance objectiveEnergy objective

Clock rateCache size

9Memory architecturePage replacement policy * M. Gries. Methods for evaluating and

9 covering the design space during earlydesign development. Integr. VLSI J.,38(2):131183, 2004. KAIST SE LAB 20 0 8 11/35


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HW & SW Partition


Decides whether each functionality is

implemented in HW or SWRe uirements : Summin u 100 values

Software implementation

Alternative 1 Alternative 2

Software implementation

ADD v1, v2ADD v1, v3

ADD v1, v2, , v100

ADD v1, v100

ADD x1, x2 ADD x1, x2, , x100

Hardware su ort Hardware su ort

More flexible software Smaller software sizeBetter performance KAIST SE LAB 20 0 8 12/35


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Software Model


Kahn process networks

DAGs with periods and deadlines

Synchronous data flow

Control data flow graphs and dynamic data flow

High-level programming language

Co-Design Finite State Machines

Communication analysis graphs

Transaction Level Modeling

SystemC Hierarchical and heterogeneous models of computation

Ptolemy framework, Metropolis meta-model language, etc.



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Hardware Model


Abstract models

Instruction-accurate model

-

Non-linear, accumulative service descriptions

xecuta e mo e s Micro-architecture tem lates

Hardware description language



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Ma in Software and Hardware


Binding software tasks to hardware building

blocks

Rewriting/adapting software code

To link re uired interface of software and rovided interface

of hardware Compilation of the software onto the hardware

Software Tasks

ARM P1 ARM P2 DSP P3Hardware blocks



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Evaluation 1/3


Simulation-based methods

Cycle-accurate simulation

Software HardwareRead Memory

Cycle 1 (do Inst1)

Done! (3 cycle)

Cycle 3 (do Inst2)

-Software HardwareRead Memory

Done! 3 c cleRead Memory :

Assume that itconsumes 3 cycle



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Evaluation 2/3


Analytical methods

Static profiling

Com lexit anal sis of al orithms the de endencanalysis of function call graph, etc.

Hi h-level s nthesis

Find an optimal mapping for the software tasks tothe hardware

Exact method such as Integer/mixed linear programformulations, heuristics, evolutionary algorithms, etc.



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Evaluation 3/3


Combination of simulation-based and

analytical methods

-

A trace contains allmemor access

Cache hit & miss statistics

Analytical models with initial, calibratingInitial simulation Use the trace to calculate performance

simulation

~ P = A / B * Simulation results

Q = C * 100 + .

a n ranges o

performance factor

ee e n orma on

Into the analytical model KAIST SE LAB 20 0 8 18/35


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Frameworks for DSE


System-level Micro-architecture centric

Metropolis

Mescal

Mescal/Tipi

ASIP-Meister / PEAS-III StepNP

SPADE

EXPRESSION

LisaTek

Artemis MILAN

Chess / Checkers MaxCore & MaxSim

MESH

SEAS Incisive-SPW

CoCentric System Studio



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Exam le Metro olis 1/4


Functionality modeling

Process Src Medium S Process Sink

Process Src {port Out out;void thread() {

Process Sink {port In in;void thread() {

Medium S {void send() {

out.send(data);

}void doSomething() {

in.receive(data);}

}

}void receive() {

} }

Port Out {void send() {}

Port In {void receive() {}



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Architecture modelingTask 1

CPU

Task 2 Task n

rocess asport TaskToCPU taskToCPU;void thread() {

e umvoid read() {

// read from memory

void read() {

void write() {// write to memory

void write() {

}

void execute(int n) {// Consume n CPU cycles

}



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Mapping

Process Src Medium S Process Sink

Task 1

CPU

Task 2

Mapper {

Src.send => Task1.write;. .

Sink.receive => Task2.read;

} KAIST SE LAB 20 0 8 22/35


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A part of the output in Simple case study

example



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Platform-Based Desi n

Part II. Designing Embedded System Platform-Based Design

Main idea

Reusing & facilitating a common design to a

variet of different a lications

Cell Phone Platform

Phone SW Phone SW Phone SW

o. o. .

Phone Product No. 1 Phone Product No. 2 Phone Product No. n KAIST SE LAB 20 0 8 24/35


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What is the Platform?* 1/2


Platform

Processor Bus A library of components

To generate a design at certain level ofemoryabstraction

Platform instance Processor P1-

Selected from the library(platform)

-Cache size : 16Kb-

arameters are setBus B1

-Bandwidth : 10Mb/s* A. Sangiovanni-Vincentelli, Quo Vadis, SLD? Reasoning About the-ren s an a enges o ystem eve es gn, rocee ngs o e

IEEE, Vol. 95, No. 3, March 2007. KAIST SE LAB 20 0 8 25/35

P t II D i i E b dd d S t Pl tf B d D i


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What is the Platform? 2/2


Multiple abstraction levels of the platform

Each platform instance in the abstraction levels

can be reusedFunctionality

Level 1Functionality

Level 2Functionality

Level 3

Processor ARM920T R2000

Memory Bus ISADDR SDRAM

DDR-200

ARM926EJ-S R4600

8-bit ISA

PCI 2.2

DDR-333 16-bit ISA

DDR2-533

PCI 3.0DDR2-800 KAIST SE LAB 20 0 8 26/35

P t II D i i E b dd d S t Pl tf B d D i


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Desi n Process


Meet-in-the-middle process

Combination of top-down and bottom-up

a roach


Part II Designing Embedded System Platform Based Design


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A Platform for Software Reuse


API Platform*

* A. Sangiovanni-Vincentelli and Grant Martin,Platform-Based Design and Software Design

Design & Test, Vol. 18(6), November 2001.



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Par t I I I . So f t w ar e

S st em Desi n

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Challen e in Embedded S stem Desi n

Consideration of flexible implementation

To address rapidly changing & increasing

re uirements Sacrificing some degree of performance

Increasing usage of programmable elements instead of

ASICs (Application Specific Integrated Circuits)

Increasing complexity of application(software)


Part III Software Engineering in Embedded System Design


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Research Issues 1/3

Part III. Software Engineering in Embedded System Design

In the view of the software process*

Embedded System Engineering

Issue 1 : Coordination of embedded softwaredevelopment process with other sub-processes

Embedded Software Electrical Mechanical

Issue 2 : Specialized software development process for

*

dealing with non-functional requirements(Memory, power, real-time requirements, etc.)

, ,The State of the Practice, IEEE Software, Nov.-Dec., 2003




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Research Issues 2/3


In the view of the software modelHW & SW Partition

Issue 1 : DSE in a more

o e(Abstraction lv. 1)

SW Model(Abstraction lv. 1)

Issue 2 : Performance/

Evaluationfailed

Map HW & SW

-

Issue 3 : Performance/

Issue 4 : Model-Driven

energy-related metric

HW Model(Abstraction lv. n)

SW Model(Abstraction lv. n)

Development

Map HW & SWNeed to consider theunderlying hardware KAIST SE LAB 20 0 8 32/35



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Research Issues 3/3

a t So t a e g ee g bedded Syste es g

In the view of the software code

HW & SW Partition

HW Model SW Model Usually SystemC code

Map HW & SWEvaluation Issue 1 : UML to SystemC

Evaluation* Issue 2 : Application of code-levelsoftware engineering techniques

9Testing9Clone detection9Reverse engineering9Metric



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References

[1] Michael Barr, "Embedded Systems Glossary, Netrino Technical Library,Available at htt ://www.netrino.com/Embedded-S stems/Glossar

[2] Frank Vahid and Tony Givargis, Embedded System Design: A UnifiedHardware/Software Introduction, John Wiley & Sons, ISBN: 0471386782,

.

[3] M. Gries. Methods for evaluating and covering the design space duringearly design development. Integr. VLSI J., 38(2):131183, 2004.

[4] A. Sangiovanni-Vincentelli, Quo Vadis, SLD? Reasoning About the

Trends and Challenges of System Level Design, Proceedings of the IEEE,Vol. 95, No. 3, March 2007.

[5] Bass Graaf, Marco Lormans, and Hans Toetenel, Embedded SoftwareEngineering: The State of the Practice, IEEE Software, Nov.-Dec., 2003

- -. ,Software Design Methodology for Embedded Systems, IEEE Design &Test, Vol. 18(6), November 2001.



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Discussion

Q & A


Documents

5.Introduction to the Design of Embedded System