Embedded System Design: A Unified Hardware/Software Introduction - Chapter 1 slides

Embedded Systems Design: A Unified Hardware/Software IntroductionHardware/Software Introduction

Chapter 1: IntroductionChapter 1: Introduction

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Outline

Embedded systems overviewy What are they?

Design challenge optimizing design metricsg g p g g Technologies

Processor technologies IC technologies Design technologies

Embedded Systems Design: A Unified Hardware/Software Introduction, (c) 2000 Vahid/Givargis

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Embedded systems overviewy

Embedded computing systemsp g y Computing systems embedded within larger

products

Computers are in here...

and here...

Difficult to give a precise definition, though any computing system other than a desktop computer can be qualified as an embedded

and even here...

p qcomputing system

Lots more of these, though they cost a lot less each.


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Embedded systems overviewy

The trends of disappearing computerpp g p Laptops Personal Computers Mainframes Servers

But theres another type of computing system Far more common...


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A short list of embedded systemsyAnti-lock brakesAuto-focus camerasAutomatic teller machines

ModemsMPEG decodersNetwork cards

Automatic toll systemsAutomatic transmissionAvionic systemsBattery chargersCamcordersCell phonesC ll h b t ti

Network switches/routersOn-board navigationPagersPhotocopiersPoint-of-sale systemsPortable video gamesP i tCell-phone base stations

Cordless phonesCruise controlCurbside check-in systemsDigital camerasDisk drivesElectronic card readers

PrintersSatellite phonesScannersSmart ovens/dishwashersSpeech recognizersStereo systemsTeleconferencing systemsElectronic card readers

Electronic instrumentsElectronic toys/gamesFactory controlFax machinesFingerprint identifiersHome security systems

Teleconferencing systemsTelevisionsTemperature controllersTheft tracking systemsTV set-top boxesVCRs, DVD playersVideo game consoles

And the list goes on and on

Life-support systemsMedical testing systems

Video phonesWashers and dryers


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g

Some common characteristics of embedded systemssystems

Single-functionedg Executes a single program, repeatedly

Tightly-constrainedg y Low cost, low power, small, fast, etc.

Reactive and real-time Continually reacts to changes in the systems environment Some must compute certain results in real-time without delay


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An embedded system example -- a digital cameray p g

Digital camera chip

CCD preprocessor Pixel coprocessorA2D

D2A

g p

lens

CCD (Charge Coupled Device)

MicrocontrollerJPEG codec

DMA controller Display ctrl

Multiplier/Accum

Memory controller ISA bus interface UART LCD ctrl

Single-functioned as always is a digital camera, tightly-constrained to be low cost, low power, small, and fast, and to some extend is real-time


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small, and fast, and to some extend is real time

Design challenge optimizing design metricsg g p g g

Obvious design goal:g g Construct an implementation with desired functionality

Key design challenge:y g g Simultaneously optimize numerous design metrics

Design metric A measurable feature of a systems implementation Optimizing design metrics is a key challenge


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Common metrics Unit cost: the monetary cost of manufacturing each copy of the system, excluding

NRE cost

NRE cost (Non Recurring Engineering cost): Th ti t t NRE cost (Non-Recurring Engineering cost): The one-time monetary cost of designing the system

Size: the physical space required by the system Performance: the execution time or throughput of the system Power: the amount of power consumed by the system

Fl ibili Flexibility: the ability to change the functionality of the system without incurring heavy NRE cost


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Common metrics (continued)( ) Time-to-prototype: the time needed to build a working version of the system Time-to-market: the time required to develop a system to the point that it can be

l d d ld released and sold to customers

Maintainability: the ability to modify the system after its initial release Correctness safety many moreCorrectness, safety, many more


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Design metric competition -- improving one may worsen othersworsen others

Expertise with both software Powerand hardware is needed to optimize design metrics

A designer must be comfortable with SizePerformance

gvarious technologies in order to choose the best for a given application and set of constraintsNRE cost

Software

Hardware


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Time-to-market: a demanding design metricg g

Time required to develop a product to the point it can be sold to customers

Market window Market window Period during which the product

would have highest sales

R

e

v

e

n

u

e

s

(

$

)

Average time-to-market constraint is about 8 months

Time (months)


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Losses due to delayed market entryy y

Simplified revenue model Product life = 2W, peak at W Time of market entry defines a

Peak revenue

Peak revenue from

(

$

) Time of market entry defines a triangle, representing market penetration

Triangle area equals revenue

delayed entry

Market rise Market fall

On-time

Delayed

R

e

v

e

n

u

e

s

(

Triangle area equals revenue Loss

The difference between the on-i d d l d i l

W 2WD

Delayed

time and delayed triangle areasOn-time Delayedentry entry

Time


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Losses due to delayed market entry (cont.)y y ( )

Area = 1/2 * base * heightArea 1/2 base height On-time = 1/2 * 2W * W Delayed = 1/2 * (W-D+W)*(W-D)

Peak revenue

Peak revenue from

(

$

)

Percentage revenue loss = (D(3W-D)/2W2)*100%

Try some examples

delayed entry

Market rise Market fall

On-time

Delayed

R

e

v

e

n

u

e

s

(

Try some examples

W 2WD

Delayed

Lifetime 2W=52 wks, delay D=4 wks (4*(3*26 4)/2*26^2) = 22%

Lifetime 2W=52 wks delay D=10 wksOn-time Delayedentry entry

Time Lifetime 2W=52 wks, delay D=10 wks (10*(3*26 10)/2*26^2) = 50% Delays are costly!


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NRE and unit cost metrics

Costs: Unit cost: the monetary cost of manufacturing each copy of the system, excluding NRE

cost NRE cost (Non-Recurring Engineering cost): The one-time monetary cost of designing

the systemthe system Total cost : NRE cost plus the unit cost * # of units per-product cost = total cost / # of units

= (NRE cost / # of units) + unit cost( ) Example

NRE=$2000, unit=$100 For 10 units

total cost = $2000 + 10*$100 = $3000 per-product cost = $2000/10 + $100 = $300

Amortizing NRE cost over the units results in an dditi l $200 it


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additional $200 per unit

NRE and unit cost metrics

Compare technologies by costs -- best depends on quantityp g y p q y Technology A: NRE=$2,000, unit=$100 Technology B: NRE=$30,000, unit=$30

Technology C: NRE=$100 000 unit=$2

$160,000

$200,000ABC

$160

$200ABC

0

0

)

o

s

t

Technology C: NRE=$100,000, unit=$2

$40,000

$80,000

$120,000

$40

$80

$120

t

o

t

a

l

c

o

s

t

(

x

1

0

p

e

r

p

r

o

d

u

c

t

c

o

$00 800 1600 2400

$00 800 1600 2400

Number of units (volume)Number of units (volume)

But must also consider time-to-marketEmbedded Systems Design: A Unified Hardware/Software

Introduction, (c) 2000 Vahid/Givargis16

But, must also consider time to market

The performance design metricp g

Widely-used (abused) measure of system performance Clock frequency, instructions per second not good measures Digital camera example a user cares about how fast it processes images, not clock

speed or instructions per secondLatency (response time) Latency (response time)

Time between task start and end e.g., Cameras A and B process images in 0.25 seconds

Th h t Throughput Tasks per second, e.g. Camera A processes 4 images per second Throughput is not always the inverse of Latency due to concurrency, e.g. Camera B may

process 8 images per second (by capturing a new image while previous image is being process 8 images per second (by capturing a new image while previous image is being stored).

Speedup of B over A = Bs performance / As performance Throughput speedup = 8/4 = 2


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Throughput speedup 8/4 2

Three key embedded system technologiesy y g

Three key technologies for embedded systemsy g y Processor technology IC technology Design technology


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Processor technologygy

The architecture of the computation engine used to implement a t f ti litsystems functionality

Processor does not have to be programmable and does not generally mean a general-purpose processorg p p p

Application-specific Single-purpose (hardware)General-purpose (software)


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Processor technologygy

Processors vary in their customization for the problem at hand

total = 0for i = 1 to N loop

total += M[i]end loop

Desired functionality

General-purpose processor

Single-purpose processor

Application-specific processor


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General-purpose processorsp p p

Programmable devices also known as microprocessor (software) are used in a DatapathControllermicroprocessor (software) are used in a variety of applications

FeaturesRegister

file

p

Control logic and

State register

Program memory General datapath with large register file and

general ALUIR PC

GeneralALU

User benefits Low time-to-market and NRE costs High flexibility

Program memory

Assembly code for:

Datamemory

g ytotal = 0for i =1 to


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Single-purpose processorsg p p p

Digital circuit (hardware) designed to execute DatapathControllerexactly one program a.k.a. coprocessor, accelerator or peripheral

Features

DatapathController

Control logic

State

index

total Features

Contains only the components needed to execute a single programN

State register

Data

+

No program memory Benefits

Fast

memory

Low power Small size


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Application-specific processorspp p p

Programmable processor optimized for a DatapathControllerparticular class of applications having common characteristics Compromise between general-purpose and single-

Registers

Custom

Control logic and

State register

Compromise between general purpose and singlepurpose processors

FeaturesP

IR PCALU

Program memoryData

memory Program memory Optimized datapath Special functional units

Program memory

Assembly code for:

memory

Benefits Some flexibility, good performance, size and power

total = 0for i =1 to


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IC technologygy

The manner in which a digital implementation (gate-level) is g p (g )mapped onto an Integrated Circuit (IC) ICs consist of numerous layers (perhaps 10 or more) and for

different IC technologies these layers are built at different stage

Integrated Circuit

source drainchanneloxidegate

Silicon substrate

IC package


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Silicon substrate

IC technologygy

Three types of IC technologiesyp g Full-custom/VLSI Semi-custom ASIC (gate array and standard cell) PLD (Programmable Logic Device)


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Full-custom/VLSI

All layers are optimized for a particular implementationy p p p Placing transistors Sizing transistors Routing wires

Benefits Excellent performance, small size, low power

Drawbacks High NRE cost (e.g., $300k), long time-to-market


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Semi-custom

Lower layers are fully or partially builty y p y Designers are left with routing of wires and maybe placing some

blocks Benefits

Good performance, good size, less NRE cost than a full-custom implementation (perhaps $10k to $100k)implementation (perhaps $10k to $100k)

DrawbacksStill require weeks to months to develop Still require weeks to months to develop


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PLD (Programmable Logic Device)( g g )

All layers already existy y Designers can purchase an IC Connections on the IC are either created or destroyed to

implement desired functionality Field-Programmable Gate Array (FPGA) very popular

B fit Benefits Low NRE costs, almost instant IC availability

Drawbacks Drawbacks Bigger, expensive (perhaps $30 per unit), power hungry, slower


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Independence of processor and IC technologiesp p g

Basic tradeoff General vs. custom With respect to processor technology or IC technology The two technologies are independentThe two technologies are independent

General-purpose

processorASIP

Single-purpose

processorGeneral, Customized, processor processorproviding improved: providing improved:

Power efficiencyPerformance

Size

FlexibilityMaintainability

NRE cost

Semi-customPLD Full-custom

SizeCost (high volume)Time- to-prototype

Time-to-marketCost (low volume)


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Semi customPLD Full custom

The co-design ladderg

In the past: Sequential program code (e.g., C, VHDL) Hardware and software design

technologies were very different Recent maturation of synthesis Assembly instructions

Register transfers

Compilers(1960's,1970's)

Behavioral synthesis(1990's)

RT synthesisyenables a unified view of hardware and software

Hardware/software codesign

y

Machine instructions

Assemblers, linkers(1950's, 1960's)

RT synthesis(1980's, 1990's)

Logic synthesis(1970's, 1980's)

Logic equations / FSM's

Hardware/software codesign

Implementation

Machine instructions ( , )

Microprocessor plus program VLSI, ASIC, or PLD

Logic gates

bits: software implementation: hardware

The choice of hardware versus software for a particular function is simply a tradeoff among various design metrics, like performance, power, size, NRE cost, and especially flexibility; there is no fundamental difference

between what hardware or software can implement


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between what hardware or software can implement.

Moores law

The most important trend in embedded systems p y Predicted in 1965 by Intel co-founder Gordon MooreIC transistor capacity has doubled roughly every 18 months for

the past several decades10,000

1,000

10010

10 1

Logic transistors per chip

(in millions)

0.1

0.01

0.001

Note: logarithmic scale


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Graphical illustration of Moores lawp

1981 1984 1987 1990 1993 1996 1999 2002

10,000transistors

150,000,000transistors

Leading edgechip in 1981

Leading edgechip in 2002

Something that doubles frequently grows more quickly than most people realize!most people realize! A 2002 chip can hold about 15,000 1981 chips inside itself


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Design productivity increaseg p y

100,000

10,000

1,000

100

v

i

t

y

a

f

f

M

o

.

10

1

P

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t

i

(

K

)

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.

/

S

t

a

0.1

0.01

1

9

8

3

1

9

8

7

1

9

8

9

1

9

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1

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9

3

1

9

8

5

1

9

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5

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7

1

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9

2

0

0

1

2

0

0

3

2

0

0

5

2

0

0

7

2

0

0

9

Exponentially increased over the past few decades


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Design productivity gapg p y g p

While designer productivity has grown at an impressive rate over the past decades, the rate of improvement has not kept pace with chip capacity

10,000

1,000

10010


100,000

10,000

1000100 ProductivityGap10

10.1

0.01

chip(in millions)

100

101

0.1

y(K) Trans./Staff-Mo.IC capacity

productivity

0.001 0.01


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Design productivity gapg p y g p

1981 leading edge chip required 100 designer months 10,000 transistors / 100 transistors/month

2002 leading edge chip requires 30,000 designer months 150,000,000 / 5000 transistors/month, ,

Designer cost increase from $1M to $300M10,000 100,0001,000

100101

0 1


(in millions)

10,0001000100101

Productivity(K) Trans./Staff-Mo.IC capacity

Gap

0.10.01

0.001

10.10.01

productivity


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The mythical man-monthy

The situation is even worse than the productivity gap indicates In theory, adding designers to team reduces project completion time In reality, productivity per designer decreases due to complexities of team management and

communication I th ft it k th thi l th (B k 1975) In the software community, known as the mythical man-month (Brooks 1975)

At some point, can actually lengthen project completion time! (Too many cooks)

60000 15Team

1M t i t 1 d i 5000 nt

h

)

2000030000400005000060000

2419

16 15 1618

23

Months until completion

1M transistors, 1 designer=5000 trans/month

Each additional designer reduces for 100 trans/month

t

i

v

i

t

y

(

T

r

a

n

s

.

/

m

o

10 20 30 400

1000020000 43

Individual

p

Number of designers

So 2 designers produce 4900 trans/month each

T

e

a

m

P

r

o

d

u

c

t


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Number of designers

Summaryy

Embedded systems are everywhere Key challenge: optimization of design metrics

Design metrics compete with one anotherTh k t h l i Three key technologies Processor: general-purpose, application-specific, single-purpose IC: Full-custom, semi-custom, PLD Design: Compilation/synthesis, libraries/IP, test/verification

A unified view of hardware and software is necessary to improve productivityproductivity


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Embedded System Design: A Unified Hardware/Software Introduction - Chapter 1 slides