Circuit design with a commercial 0.13 m CMOS technology for high energy physics applications K....

Circuit design with a commercial 0.13 m CMOS technology for high

energy physics applications

K. Hänsler, S. Bonacini, P. Moreira

CERN, EP/MIC

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Outline Background Technology presentation Test module Radiation tolerance Bandgap Dual port SRAM Time to digital converter Conclusions

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Background

Can we take profit from this new technology?– Radiation tolerance?– Higher functional density?– Use in high energy physics experiments?– Commercial libraries?– Costs?

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Technology presentation

Technology features• 0.13m generation CMOS technology• All copper technology, 4 – 8 metal levels• Core supply 1.2V & 1.5V• I/O voltages 2.5V & 3.3V• Triple gate oxide (1.7nm, 2.2nm, 5.2nm)• Non-epi p- substrate

Device options• Standard, low Vt, high Vt NMOS and PMOS, ZeroVt NMOS• Ultra thin gate oxide NMOS and PMOS• Thick oxide NMOS, PMOS and ZeroVt NMOS• n+ diffusion and p+ polysilicon resistors• Metal-insulator-metal precision capacitors

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Test module 5x5mm module in foundry

MPW – Test structures– Basic circuit building

blocks: SRAM, TDC, Bandgap, Serializer, Shift Register, AFP

Design start Jul-03Submission Nov-03Reception Mar-04

Cooperation with RAL and Imperial College London

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Radiation tolerance: TID, 30 Mrd

Linear transistors with 1.7 nm and 2.2 nm physical gate oxide thicknesses present a promising natural TID hardness.No worries for a number of environments.

Linear transistors with 5.2nm gate oxide are more sensitive: careful use.

Further information: K. Hänsler et al.

“TID and SEE performance of a commercial 0.13 m CMOS technology”

Proceedings RADECS 2003

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Radiation tolerance: SEE

SEU cross section in order of magnitude of older technologies.

Influence of supply voltage and TID on SEU cross section as foreseen and expected in the past.

Further information: K. Hänsler et al.

“TID and SEE performance of a commercial 0.13 m CMOS technology”

Proceedings RADECS 2003

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Bandgap: Structure

New structure required

due to low supply voltage.

Standard structure based on the sum of the built-in

voltage of a diode and of the thermal voltage.

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Bandgap: Structure

VVR

RVV BGBGref 25.1,

2

4

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Bandgap: Results

Reference Voltage: 0.587V

Power supply sensitivity: 14mV/V

Temperature sensitivity: 0.22mV/K

Minimum supply voltage: 1V

Current consumption: 310A @ 1.5V

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-10

0

10

20

30

40

0.1 1 10 100 1000

Dose [Mrd]

DV

ref

[mV

]Irradiation Annealing

24h,25 C

168h,100 C

Bandgap: Irradiation

Reference voltage before irradiation: 587mV

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Bandgap: Comparison with 0.25 m0.13 m 0.25 m

Die area 46 800 m2 110 000 m2

Nominal supply voltage 1.5 V 2.5 V

Operational supply voltage range 1.0…1.7 V 1.4…2.7V

Temperature sensibility of reference voltage

+0.22 mV/K -0.22 mV/K

Nominal reference voltage 0.587 V 1.175 V

Reference voltage variation over supply voltage range

< 10 mV < 1mV

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SRAM: Structure•1.5 V supply

•Memory size 256x9 bits

•Physical size: 553m X 129m

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SRAM: Memory cell2 cross-coupled inverters

2 enclosed NMOS

2 PMOS

2 PMOS pass transistors

Cell size 3.73m X 2.58m

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SRAM: Results

All cells fully functional for supply voltages above 1.6V and frequencies up to 75 MHz.

Read operation down to 0.8V Write operation: limited operation range Power consumption

– 3.84mW @ 25MHz– Increase rate 104W/MHz

in future: no enclosed layout, but EDAC

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SRAM: Comparison 0.25 m

0.13 m 0.25 m

Cell size 9.62 m2 m2

Nominal supply 1.6 V 2.5 V

Access time 5.1 ns 4.5 ns

Maximum operation frequency

75 MHz 70 MHz

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TDC: Structure

LVDS

DATA

DELAYLINE

LVDSRECEIVER

PHASEDETECTOR

CHARGEPUMP

HIT ANDREADOUT

LOGIC

HIT

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TDC: Delay Cell

IN OUT

VC+

VC-

VDD

Ib Ib

Ib Ib

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TDC: Results I

40

50

60

70

80

90

100

110

0 0.5 1 1.5

Control voltage [V]

Del

ay p

er d

elay

cel

l [p

s]

nom. process, slow modenom. process, fast mode

slow process, slow modeslow process, fast mode

78.125psps

bins

ns125.78

128

10

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40

50

60

70

80

90

100

0 0.5 1 1.5

Control voltage [V]

Del

ay p

er d

elay

cel

l [p

s]

pre-rad, slow modepre-rad, fast mode

75 Mrd, slow mode75 Mrd, fast mode

78.125ps

TDC: Results II

psbins

ns125.78

128

10

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TDC: Results III

-0.6

-0.4

-0.2

0

0.2

0.4

0.6

0.8

1

1.2

0 16 32 48 64 80 96 112 128

BinDif

fere

nti

al N

on

lin

eari

ty D

NL

[b

in]

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Conclusions

Natural radiation tolerance

Higher functional density / Use in HEP experiments

3 prototypes, linear and enclosed designs, with satisfying results presented

CostsTechnology is in full production BUT still very high engineering costs

Low voltage design challenge

Use of commercial library possible

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Besten Dank für Ihre Aufmerksamkeit.Grazie per la vostra attenzione.Muito obrigado pela vossa atenção.

Thank you for your attention.Je vous remercie de votre attention.

Acknowledgements: J. Christiansen,F. Faccio, K. Kloukinas, A. Marchioro,R. Szczygiel, G. Cervelli, E. Murer