Virtual Memory - Computer Sciencecr4bd/3330/S2017/notes/20170425... · •An “address translation”mechanism maps this address to a “physical ... A System with Virtual Memory

VirtualMemorySamiraKhanApr25,2017

1

Memory(Programmer’sView)

2

Hmmm,HowDoesThisWork?!Process1 Process2 Processn

Solution:VirtualMemory(todayandnextlecture) 3

Today

• VirtualMemory:Concepts• BenefitsofVM

• VMasatoolforcaching• VMasatoolformemorymanagement• VMasatoolformemoryprotection

• Addresstranslation

4

ASystemUsingPhysicalAddressing

• Usedin“simple”systemslikeembeddedmicrocontrollersindeviceslikecars,elevators,anddigitalpictureframes

0:1:

M-1:

Mainmemory

CPU

2:3:4:5:6:7:

Physicaladdress(PA)

Dataword

8: ...

4

5

TheProblem• Physicalmemoryisoflimitedsize(cost)

• Whatifyouneedmore?• Shouldtheprogrammerbeconcernedaboutthesizeofcode/datablocksfittingphysicalmemory?

• Howtomanagedatamovementfromdisktophysicalmemory?• Howtoensuretwoprocessesdonotusethesamephysicalmemory?

• Also,ISAcanhaveanaddressspacegreaterthanthephysicalmemorysize

• E.g.,a64-bitaddressspacewithbyteaddressability• Whatifyoudonothaveenoughphysicalmemory?

6

DifficultiesofDirectPhysicalAddressing• Programmerneedstomanagephysicalmemoryspace

• Inconvenient&hard• Harderwhenyouhavemultipleprocesses

• Difficulttosupportcodeanddatarelocation

• Difficulttosupportmultipleprocesses• Protectionandisolationbetweenmultipleprocesses• Sharingofphysicalmemoryspace

• Difficulttosupportdata/codesharingacrossprocesses

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physical mem.

active process’sregion

another process’sregion

VirtualMemory• Idea:Givetheprogrammertheillusionofalargeaddressspacewhilehavingasmallphysicalmemory

• Sothattheprogrammerdoesnotworryaboutmanagingphysicalmemory

• Programmercanassumehe/shehas“infinite” amountofphysicalmemory

• Hardwareandsoftwarecooperativelyandautomaticallymanagethephysicalmemoryspacetoprovidetheillusion

• Illusionismaintainedforeachindependentprocess

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Abstraction:Virtualvs.PhysicalMemory• Programmerseesvirtualmemory

• Canassumethememoryis“infinite”

• Reality: Physicalmemorysizeismuchsmallerthanwhattheprogrammerassumes

• Thesystem(systemsoftware+hardware,cooperatively)mapsvirtualmemoryaddressesaretophysicalmemory

• Thesystemautomaticallymanagesthephysicalmemoryspacetransparentlytotheprogrammer

+Programmerdoesnotneedtoknowthephysicalsizeofmemorynormanageità Asmallphysicalmemorycanappearasahugeonetotheprogrammerà Lifeiseasierfortheprogrammer

-- Morecomplexsystemsoftwareandarchitecture

Aclassicexampleoftheprogrammer/(micro)architecttradeoff9

BasicMechanism• Indirection(inaddressing)

• Addressgeneratedbyeachinstructioninaprogramisa“virtualaddress”

• i.e.,itisnotthephysicaladdressusedtoaddressmainmemory

• An“addresstranslation” mechanismmapsthisaddresstoa“physicaladdress”

• Addresstranslationmechanismcanbeimplementedinhardwareandsoftwaretogether

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“Attheheart[...]isthenotionthat‘address’isaconceptdistinct from‘physicallocation.’”PeterDenning

ASystemUsingVirtualAddressing

• Usedinallmodernservers,laptops,andsmartphones• Oneofthegreatideasincomputerscience

0:1:

M-1:

Mainmemory

MMU

2:3:4:5:6:7:

Physicaladdress(PA)

Dataword

8: ...CPU

Virtualaddress(VA)

CPUChip

44100

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VirtualPages,PhysicalFrames• Virtual addressspacedividedintopages• Physical addressspacedividedintoframes

• Avirtualpageismappedto• Aphysicalframe,ifthepageisinphysicalmemory• Alocationindisk,otherwise

• Ifanaccessedvirtualpageisnotinmemory,butondisk• Virtualmemorysystembringsthepageintoaphysicalframeandadjuststhemappingà thisiscalleddemandpaging

• Pagetableisthetablethatstoresthemappingofvirtualpagestophysicalframes

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OverviewofPaging

virtua

lvirtua

l

physica

l

Process1

Process2

4GB

4GB

16MB

VirtualPage

VirtualPage

PhysicalPageFrame

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OverviewofPaging• Map virtualpagestophysicalpages

• Byitself,a virtualpageismerelyanillusion• Cannotactuallystoreanything• Needstobebacked-upbyaphysicalpage

• Beforeavirtualpagecanbeaccessed…• Itmustbepairedwithaphysicalpage• I.e.,itmustbemapped toaphysicalpage• Thismappingisstoredinapagetable

• Oneverysubsequentaccesstothevirtualpage…• Itsmappingislookedup• Then,theaccessisdirectedtothephysicalpage

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ASystemwithVirtualMemory(Pagebased)

• AddressTranslation:ThehardwareconvertsvirtualaddressesintophysicaladdressesviaanOS-managedlookuptable(pagetable)

0:1:

N-1:

Memory

0:1:

P-1:

Page Table

Disk

VirtualAddresses Physical

Addresses

CPU

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PaginginIntel80386

• Intel80386(Mid80s)• 32-bitprocessor• 4KBvirtual/physicalpages

• Q:Whatisthesizeofavirtualaddressspace?• A:2^32=4GB

• Q:Howmanyvirtualpagespervirtualaddressspace?• A:4GB/4KB=2^20

• Letusassumethatphysicaladdressesare28bits• Q:Whatisthesizeofthephysicaladdressspace?

• A:2^28=256MB• Q: Howmanyphysicalpagesinthephysicaladdressspace?

• A:256MB/4KB=6553616

VirtualPages

VirtualPage0VirtualPage1VirtualPage2

0KB

···

VirtualPage1M-1

4KB

8KB

4GB

12KB

031

XXXXX

1112

32-bitVirtualAddress

0000000000

17

VirtualPages


0KB

···

VirtualPage1M-1

4KB

8KB

4GB

12KB

031

XXXXX

1112


0000000001

18

VirtualPages


0KB

···

VirtualPage1M-1

4KB

8KB

4GB

12KB

031

XXXXX

1112


1111111111

19

VirtualPages


0KB

···

VirtualPage1M-1

4KB

8KB

4GB

12KB

031

XXXXX

1112


1111111111

VPN(VirtualPageNo.)

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Intel80386:VirtualPages


0KB

···

VirtualPage1M-1

4KB

8KB

4GB

12KB

031

XXXXX

1112


1111111111

OffsetVPN(VirtualPageNo.)

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Translation• Assume:VirtualPage7ismappedtoPhysicalPage32• ForanaccesstoVirtualPage7…

031

011001

1112

0000000111

OffsetVPNVirtualAddress:

027

011001

1112

0000100000

OffsetPPNPhysicalAddress:

Translated

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VPN→PPN

• HowtokeeptrackofVPN→PPNmappings?• VPN65→ PPN981,• VPN3161→PPN1629,• VPN9327→PPN524,…

• PageTable:A“lookuptable”forthemappings• Canbethoughtofasanarray• Eachelementinthearrayiscalledapagetableentry(PTE)uint32 PAGE_TABLE[1<<20];PAGE_TABLE[65]=981;PAGE_TABLE[3161]=1629;PAGE_TABLE[9327]=524; ...

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Today




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WhyVirtualMemory(VM)?• Usesmainmemoryefficiently

• UseDRAMasacacheforpartsofavirtualaddressspace

• Simplifiesmemorymanagement• Eachprocessgetsthesameuniformlinearaddressspace

• Isolatesaddressspaces• Oneprocesscan’tinterferewithanother’smemory• Userprogramcannotaccessprivilegedkernelinformationandcode

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VMasaToolforCaching• Conceptually, virtualmemory isanarrayofNcontiguousbytesstoredondisk

• Thecontentsofthearrayondiskarecachedinphysicalmemory(DRAMcache)

• Thesecacheblocksarecalledpages(sizeisP=2p bytes)

PP2m-p-1

Physicalmemory

Empty

Empty

Uncached

VP0VP1

VP2n-p-1

Virtualmemory

UnallocatedCachedUncachedUnallocatedCachedUncached

PP0PP1

EmptyCached

0

N-1M-1

0

Virtualpages(VPs)storedondisk

Physicalpages(PPs)cachedinDRAM

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Organization• DRAMcacheorganizationdrivenbytheenormousmisspenalty

• DRAMisabout10x slowerthanSRAM• Diskisabout10,000x slowerthanDRAM

• Consequences• Largepage(block)size:typically4KB,sometimes4MB• Fullyassociative

• AnyVPcanbeplacedinanyPP• Requiresa“large”mappingfunction– differentfromcachememories

• Highlysophisticated,expensivereplacementalgorithms• Toocomplicatedandopen-endedtobeimplementedinhardware

• Write-backratherthanwrite-through

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EnablingDataStructure:PageTable• Apagetableisanarrayofpagetableentries(PTEs)thatmapsvirtualpagestophysicalpages.

• Per-processkerneldatastructureinDRAM

null

null

Memoryresidentpagetable(DRAM)

Physicalmemory(DRAM)

VP7VP4

Virtualmemory(disk)

Valid01

010

10

1

Physicalpagenumberordiskaddress

PTE0

PTE7

PP0VP2VP1

PP3

VP1

VP2

VP4

VP6

VP7

VP3

VP0

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PageHit• Pagehit:referencetoVMwordthatisinphysicalmemory(hit)

null

null



VP7VP4

Virtualmemory(disk)

Valid01

010

10

1


PTE0

PTE7

PP0VP2VP1

PP3

VP1

VP2

VP4

VP6

VP7

VP3

Virtualaddress

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PageFault• Pagefault:referencetoVMwordthatisnotinphysicalmemory(miss)

null

null



VP7VP4

Virtualmemory(disk)

Valid01

010

10

1


PTE0

PTE7

PP0VP2VP1

PP3

VP1

VP2

VP4

VP6

VP7

VP3

Virtualaddress

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HandlingPageFault• Pagemisscausespagefault(anexception)

null

null



VP7VP4

Virtualmemory(disk)

Valid01

010

10

1


PTE0

PTE7

PP0VP2VP1

PP3

VP1

VP2

VP4

VP6

VP7

VP3

Virtualaddress

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HandlingPageFault• Pagemisscausespagefault(anexception)• Pagefaulthandlerselectsavictimtobeevicted(hereVP4)

null

null



VP7VP4

Virtualmemory(disk)

Valid01

010

10

1


PTE0

PTE7

PP0VP2VP1

PP3

VP1

VP2

VP4

VP6

VP7

VP3

Virtualaddress

32

HandlingPageFault• Pagemisscausespagefault(anexception)• Pagefaulthandlerselectsavictimtobeevicted(hereVP4)

null

null



VP7VP3

Virtualmemory(disk)

Valid01

100

10

1


PTE0

PTE7

PP0VP2VP1

PP3

VP1

VP2

VP4

VP6

VP7

VP3

Virtualaddress

33

HandlingPageFault• Pagemisscausespagefault(anexception)• Pagefaulthandlerselectsavictimtobeevicted(hereVP4)• Offendinginstructionisrestarted:pagehit!

null

null



VP7VP3

Virtualmemory(disk)

Valid01

100

10

1


PTE0

PTE7

PP0VP2VP1

PP3

VP1

VP2

VP4

VP6

VP7

VP3

Virtualaddress

Keypoint:WaitinguntilthemisstocopythepagetoDRAMisknownasdemandpaging

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AllocatingPages• Allocatinganewpage(VP5)ofvirtualmemory.

null



VP7VP3

Virtualmemory(disk)

Valid01

100

10

1


PTE0

PTE7

PP0VP2VP1

PP3

VP1

VP2

VP4

VP6

VP7

VP3

VP5

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LocalitytotheRescueAgain!• Virtualmemoryseemsterriblyinefficient,butitworksbecauseoflocality.

• Atanypointintime,programstendtoaccessasetofactivevirtualpagescalledtheworkingset

• Programswithbettertemporallocalitywillhavesmallerworkingsets

• If(workingsetsize<mainmemorysize)• Goodperformanceforoneprocessaftercompulsorymisses

• If(SUM(workingsetsizes)>mainmemorysize)• Thrashing: Performancemeltdown wherepagesareswapped(copied)inandoutcontinuously

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Today




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VMasaToolforMemoryManagement• Keyidea:eachprocesshasitsownvirtualaddressspace

• Itcanviewmemoryasasimplelineararray• Mappingfunctionscattersaddressesthroughphysicalmemory

• Well-chosenmappingscanimprovelocality

VirtualAddressSpaceforProcess1:

PhysicalAddressSpace(DRAM)

0

N-1(e.g.,read-onlylibrarycode)


VP1VP2...

0

N-1

VP1VP2...

PP2

PP6

PP8

...

0

M-1

Addresstranslation

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VMasaToolforMemoryManagement• Simplifying memoryallocation

• Eachvirtualpagecanbemappedtoanyphysicalpage• Avirtualpagecanbestoredindifferentphysicalpagesatdifferenttimes

• Sharingcodeanddataamongprocesses• Mapvirtualpagestothesamephysicalpage(here:PP6)


PhysicalAddressSpace(DRAM)

0

N-1(e.g.,read-onlylibrarycode)


VP1VP2...

0

N-1

VP1VP2...

PP2

PP6

PP8

...

0

M-1

Addresstranslation

39

Today




40

Page-LevelAccessControl(Protection)• Noteveryprocessisallowedtoaccesseverypage

• E.g.,mayneedsupervisorlevelprivilegetoaccesssystempages

• Idea:Storeaccesscontrolinformationonapagebasisintheprocess’spagetable

• Enforceaccesscontrolatthesametimeastranslation

à VirtualmemorysystemservestwofunctionstodayAddresstranslation(forillusionoflargephysicalmemory)Accesscontrol(protection)

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VMasaToolforMemoryProtection• ExtendPTEswithpermissionbits• MMUchecksthesebitsoneachaccess

Processi: AddressREAD WRITEPP6Yes NoPP4Yes YesPP2Yes

VP0:VP1:VP2:

•••

Processj:

Yes

SUPNoNoYes

AddressREAD WRITEPP9Yes NoPP6Yes YesPP11Yes Yes

SUPNoYesNo

VP0:VP1:VP2:

PhysicalAddressSpace

PP2

PP4

PP6

PP8PP9

PP11

EXEC

Yes

EXEC

YesYes

Yes

Yes

No

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Today




43

AddressTranslationWithaPageTable

Virtualpagenumber(VPN) Virtualpageoffset(VPO)

Physicalpagenumber(PPN) Physicalpageoffset(PPO)

Virtualaddress

Physicaladdress

Valid Physicalpagenumber(PPN)

Pagetablebaseregister(PTBR)

(CR3inx86)

Pagetable

Physicalpagetableaddressforthecurrentprocess

Validbit=0:Pagenotinmemory

(pagefault)

0p-1pn-1

0p-1pm-1

Validbit=1

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AddressTranslation:PageHit

1)ProcessorsendsvirtualaddresstoMMU

2-3)MMUfetchesPTEfrompagetableinmemory

4)MMUsendsphysicaladdresstocache/memory

5)Cache/memorysendsdatawordtoprocessor

MMU Cache/MemoryPA

Data

CPU VA

CPUChip PTEA

PTE1

2

3

4

5

45

AddressTranslation:PageFault

1)ProcessorsendsvirtualaddresstoMMU2-3)MMUfetchesPTEfrompagetableinmemory4)Validbitiszero,soMMUtriggerspagefaultexception5)Handleridentifiesvictim(and,ifdirty,pagesitouttodisk)6)HandlerpagesinnewpageandupdatesPTEinmemory7)Handlerreturnstooriginalprocess,restartingfaultinginstruction

MMU Cache/Memory

CPU VA

CPUChip PTEA

PTE1

2

3

4

5

Disk

Pagefaulthandler

Victimpage

Newpage

Exception

6

7

46

IntegratingVMandCache

VACPU MMU

PTEA

PTE

PA

Data

MemoryPAPA

miss

PTEAPTEAmiss

PTEAhit

PAhit

Data

PTE

L1cache

CPUChip

VA:virtualaddress,PA:physicaladdress,PTE:pagetableentry,PTEA=PTEaddress47

TwoProblems

• Twoproblemswithpagetables

•Problem#1:Pagetableistoolarge

• Problem#2:Pagetableisstoredinmemory• Beforeeverymemoryaccess,alwaysfetchthePTEfromtheslowmemory?èLargeperformancepenalty

48

Multi-LevelPageTables• Suppose:

• 4KB(212)pagesize,48-bitaddressspace,8-bytePTE

• Problem:• Wouldneeda512GBpagetable!

• 248 *2-12*23 =239 bytes

• Commonsolution:Multi-levelpagetable• Example:2-levelpagetable

• Level1table:eachPTEpointstoapagetable(alwaysmemoryresident)

• Level2table:eachPTEpointstoapage(pagedinandoutlikeanyotherdata)

Level1Table

...

Level2Tables

...

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ATwo-LevelPageTableHierarchyLevel1

pagetable

...

Level2pagetables

VP0

...

VP1023

VP1024

...

VP2047

Gap

0

PTE0

...

PTE1023

PTE0

...

PTE1023

1023nullPTEs

PTE1023 1023unallocated

pagesVP9215

Virtualmemory

(1K- 9)nullPTEs

PTE0

PTE1

PTE2(null)

PTE3(null)

PTE4(null)

PTE5(null)

PTE6(null)

PTE7(null)

PTE8

2KallocatedVMpagesforcodeanddata

6KunallocatedVMpages

1023unallocatedpages

1allocatedVMpageforthestack

32bitaddresses,4KBpages,4-bytePTEs 50

Documents

Virtual Memory - Computer Sciencecr4bd/3330/S2017/notes/20170425... · •An “address translation”mechanism maps this address to a “physical ... A System with Virtual Memory