transformer and its uses

7/29/2019 transformer and its uses

1/286

1

Fundamentals of Microelectronics II

CH9 Cascode Stages and Current Mirrors

CH10 Differential Amplifiers

CH11 Frequency Response

CH12 Feedback


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2

Chapter 9 Cascode Stages and Current Mirrors

9.1 Cascode Stage

9.2 Current Mirrors


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CH 9 Cascode Stages and Current Mirrors 3

Boosted Output Impedances

SOSmout

EOEmout

RrRgR

rRrrRgR

1

||||1

2

1


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Bipolar Cascode Stage

1211

12112

||

||)]||(1[

rrrgR

rrrrrgR

OOmout

OOOmout


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Maximum Bipolar Cascode Output Impedance

The maximum output impedance of a bipolar cascode isbounded by the ever-present r between emitter and groundof Q1.

11max,

11max, 1

Oout

Omout

rR

rrgR


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Example: Output Impedance

Typically r is smaller than rO, so in general it is impossibleto double the output impedance by degenerating Q2 with aresistor.

21

122

O

OoutA

rr

rrR


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PNP Cascode Stage

1211

12112

||

||)]||(1[

rrrgR

rrrrrgR

OOmout

OOOmout


8/286


Another Interpretation of Bipolar Cascode

Instead of treating cascode as Q2 degenerating Q1, we canalso think of it as Q1 stacking on top of Q2 (current source)to boost Q2s output impedance.


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False Cascodes

When the emitter of Q1 is connected to the emitter of Q2, itsno longer a cascode since Q2 becomes a diode-connecteddevice instead of a current source.

1

2

1

2

1

12

2

112

2

1

2

1

1

||||1

||||1

1

O

m

O

m

mout

O

m

OO

m

mout

rgrg

g

R

rrg

rrrg

gR


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MOS Cascode Stage

211

21211

OOmout

OOOmout

rrgR

rrrgR


11/286


Another Interpretation of MOS Cascode

Similar to its bipolar counterpart, MOS cascode can bethought of as stacking a transistor on top of a currentsource.

Unlike bipolar cascode, the output impedance is not limitedby .


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PMOS Cascode Stage

211

21211

OOmout

OOOmout

rrgR

rrrgR


13/286


Example: Parasitic Resistance

RP will lower the output impedance, since its parallelcombination with rO1 will always be lower than rO1.

2121 )||)(1( OPOOmout rRrrgR


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Short-Circuit Transconductance

The short-circuit transconductance of a circuit measures itsstrength in converting input voltage to output current.

0

outvin

out

m v

iG


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Transconductance Example

1mm gG


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Derivation of Voltage Gain

By representing a linear circuit with its Norton equivalent,the relationship between Vout and Vin can be expressed bythe product of Gm and Rout.

outminout

outinmoutoutout

RGvv

RvGRiv


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Example: Voltage Gain

11 Omv rgA


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Comparison between Bipolar Cascode and CE Stage

Since the output impedance of bipolar cascode is higherthan that of the CE stage, we would expect its voltage gainto be higher as well.


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Voltage Gain of Bipolar Cascode Amplifier

Since rO is much larger than 1/gm, most of IC,Q1 flows into thediode-connected Q2. Using Rout as before, AV is easilycalculated.

)||( 21111

1

rrgrgA

gG

OmOmv

mm


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Alternate View of Cascode Amplifier

A bipolar cascode amplifier is also a CE stage in series witha CB stage.


21/286


Practical Cascode Stage

Since no current source can be ideal, the output impedancedrops.

)||(|| 21223 rrrgrR OOmOout


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Improved Cascode Stage

In order to preserve the high output impedance, a cascodePNP current source is used.

)||(||)||( 21223433 rrrgrrrgR OOmOOmout


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MOS Cascode Amplifier

2211

21221 )1(

OmOmv

OOOmmv

outmv

rgrgArrrggA

RGA


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Improved MOS Cascode Amplifier

Similar to its bipolar counterpart, the output impedance of aMOS cascode amplifier can be improved by using a PMOScascode current source.

oponout

OOmop

OOmon

RRR

rrgR

rrgR

||

433

122


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Temperature and Supply Dependence of BiasCurrent

Since VT, IS, n, and VTH all depend on temperature, I1 forboth bipolar and MOS depends on temperature and supply.

2

21

21

1212

21

)ln()(

THDDoxn

STCC

VVRR

RLWCI

IIVRRVR


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Concept of Current Mirror

The motivation behind a current mirror is to sense thecurrent from a golden current source and duplicate this

golden current to other locations.


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Bipolar Current Mirror Circuitry

The diode-connected QREF produces an output voltage V1that forces Icopy1 = IREF, if Q1 = QREF.

REFREFS

S

copy II

I

I ,

1


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Bad Current Mirror Example I

Without shorting the collector and base of QREF together,there will not be a path for the base currents to flow,therefore, Icopy is zero.


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Bad Current Mirror Example II

Although a path for base currents exists, this technique ofbiasing is no better than resistive divider.


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Multiple Copies of IREF

Multiple copies of IREF can be generated at differentlocations by simply applying the idea of current mirror tomore transistors.

REF

REFS

jS

jcopy I

I

II

,

,

,


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Current Scaling

By scaling the emitter area of Qj n times with respect toQREF, Icopy,j is also n times larger than IREF. This is equivalentto placing n unit-size transistors in parallel.

REFjcopy nII ,


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Example: Scaled Current


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Fractional Scaling

A fraction of IREF can be created on Q1 by scaling up theemitter area of QREF.

REFcopy II31


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Example: Different Mirroring Ratio

Using the idea of current scaling and fractional scaling,Icopy2 is 0.5mA and Icopy1 is 0.05mA respectively. All comingfrom a source of 0.2mA.


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Mirroring Error Due to Base Currents

11

1

n

nII REFcopy


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Improved Mirroring Accuracy

Because of QF, the base currents of QREF and Q1 are mostlysupplied by QF rather than IREF. Mirroring error is reduced times.

1112

n

nII REF

copy


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Example: Different Mirroring Ratio Accuracy

2

2

2

1

15

4

10

15

4

REFcopy

REFcopy

II

II


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PNP Current Mirror

PNP current mirror is used as a current source load to anNPN amplifier stage.


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Generation of IREF for PNP Current Mirror


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Example: Current Mirror with Discrete Devices

Let QREF and Q1 be discrete NPN devices. IREF and Icopy1 canvary in large magnitude due to IS mismatch.


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MOS Current Mirror

The same concept of current mirror can be applied to MOStransistors as well.


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Bad MOS Current Mirror Example

This is not a current mirror since the relationship betweenVX and IREF is not clearly defined.

The only way to clearly define VX with IREF is to use a diode-connected MOS since it provides square-law I-Vrelationship.


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Example: Current Scaling

Similar to their bipolar counterpart, MOS current mirrorscan also scale IREF up or down (I1 = 0.2mA, I2 = 0.5mA).


44/286


CMOS Current Mirror

The idea of combining NMOS and PMOS to produce CMOScurrent mirror is shown above.


45/286

45

Chapter 10 Differential Amplifiers

10.1 General Considerations

10.2 Bipolar Differential Pair

10.3 MOS Differential Pair

10.4 Cascode Differential Amplifiers

10.5 Common-Mode Rejection

10.6 Differential Pair with Active Load


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CH 10 Differential Amplifiers 46

Audio Amplifier Example

An audio amplifier is constructed above that takes on arectified AC voltage as its supply and amplifies an audiosignal from a microphone.


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Humming Noise in Audio Amplifier Example

However, VCC contains a ripple from rectification that leaksto the output and is perceived as a humming noise by the

user.


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Supply Ripple Rejection

Since both node X and Y contain the ripple, their differencewill be free of ripple.

invYX

rY

rinvX

vAvv

vv

vvAv


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Ripple-Free Differential Output

Since the signal is taken as a difference between twonodes, an amplifier that senses differential signals isneeded.


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Common Inputs to Differential Amplifier

Signals cannot be applied in phase to the inputs of adifferential amplifier, since the outputs will also be inphase, producing zero differential output.

0

YX

rinvY

rinvX

vv

vvAv

vvAv


51/286


Differential Inputs to Differential Amplifier

When the inputs are applied differentially, the outputs are180 out of phase; enhancing each other when senseddifferentially.

invYX

rinvY

rinvX

vAvv

vvAv

vvAv

2

Diff i l Si l


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Differential Signals

A pair of differential signals can be generated, among otherways, by a transformer.

Differential signals have the property that they share thesame average value to ground and are equal in magnitudebut opposite in phase.

Si l d d Diff i l Si l


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Single-ended vs. Differential Signals

Diff ti l P i


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Differential Pair

With the addition of a tail current, the circuits above operateas an elegant, yet robust differential pair.

C M d R


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Common-Mode Response

2

221

21

EECCCYX

EE

CC

BEBE

IRVVV

I

II

VV

C M d R j ti


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Common-Mode Rejection

Due to the fixed tail current source, the input common-mode value can vary without changing the output common-mode value.

Diff ti l R I


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Differential Response I

CCY

EECCCX

C

EEC

VV

IRVVI

II

02

1

Diff ti l R II


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Differential Response II

CCX

EECCCY

C

EEC

VV

IRVVI

II

01

2

Differential Pair Characteristics


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Differential Pair Characteristics

None-zero differential input produces variations in outputcurrents and voltages, whereas common-mode inputproduces no variations.

Small Signal Analysis


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Small-Signal Analysis

Since the input to Q1 and Q2 rises and falls by the sameamount, and their bases are tied together, the rise in IC1 hasthe same magnitude as the fall in IC2.

I

I

I

II

I

EE

C

EEC

2

2

2

1

Virtual Ground


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Virtual Ground

For small changes at inputs, the gms are the same, and therespective increase and decrease of IC1 and IC2 are thesame, node P must stay constant to accommodate thesechanges. Therefore, node P can be viewed as AC ground.

VgI

VgI

V

mC

mC

P

2

1

0

Small Signal Differential Gain


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Small-Signal Differential Gain

Since the output changes by -2gm VRC and input by 2 V,the small signal gain isgmRC, similar to that of the CEstage. However, to obtain same gain as the CE stage,power dissipation is doubled.

CmCm

v RgV

VRgA

2

2

Large Signal Analysis


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Large Signal Analysis

T

inin

EEC

T

inin

T

ininEE

C

V

VV

II

V

VV

V

VVI

I

212

21

21

1

exp1

exp1

exp

Input/Output Characteristics


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Input/Output Characteristics

T

ininEEC

outout

V

VVIR

VV

2tanh 21

21

Linear/Nonlinear Regions


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Linear/Nonlinear Regions

The left column operates in linear region, whereas the rightcolumn operates in nonlinear region.

Small-Signal Model


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Small-Signal Model

Half Circuits


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Half Circuits

Since VP is grounded, we can treat the differential pair astwo CE half circuits, with its gain equal to one half

circuits single-ended gain.

Cm

inin

outout Rgvv

vv

21

21

Example: Differential Gain


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Example: Differential Gain

Om

inin

outout rgvvvv

21

21

Extension of Virtual Ground


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Extension of Virtual Ground

It can be shown that if R1 = R2, and points A and B go upand down by the same amount respectively, VX does notmove.

0XV

Half Circuit Example I


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Half Circuit Example I

1311 |||| RrrgA OOmv


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Half Circuit Example III


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Half Circuit Example III

m

E

Cv

gR

RA

1

Half Circuit Example IV


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Half Circuit Example IV

m

E

Cv

g

R

RA

1

2

MOS Differential Pairs Common-Mode Response


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MOS Differential Pair s Common Mode Response

Similar to its bipolar counterpart, MOS differential pairproduces zero differential output as VCMchanges.

2

SSDDDYX

IRVVV

Equilibrium Overdrive Voltage


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Equilibrium Overdrive Voltage

The equilibrium overdrive voltage is defined as theoverdrive voltage seen by M1 and M2 when both of themcarry a current of ISS/2.

L

W

C

IVV

oxn

SS

equilTHGS

Minimum Common-mode Output Voltage


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Minimum Common mode Output Voltage

In order to maintain M1 and M2 in saturation, the common-mode output voltage cannot fall below the value above.

This value usually limits voltage gain.

THCMSS

DDD VVI

RV 2

Differential Response


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Differential Response

Small-Signal Response


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S a S g a espo se

Similar to its bipolar counterpart, the MOS differential pairexhibits the same virtual ground node and small signalgain.

Dmv

P

RgA

V

0

Power and Gain Tradeoff


79/286


In order to obtain the source gain as a CS stage, a MOSdifferential pair must dissipate twice the amount of current.This power and gain tradeoff is also echoed in its bipolarcounterpart.

MOS Differential Pairs Large-Signal Response


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g g p

2211214

2

12 inin

oxn

SSinoxnDD VV

L

WC

IVV

L

WCII

in

Maximum Differential Input Voltage


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p g

There exists a finite differential input voltage thatcompletely steers the tail current from one transistor to theother. This value is known as the maximum differentialinput voltage.

equilTHGSinin

VVVV 2max21

Contrast Between MOS and Bipolar Differential Pairs


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p

In a MOS differential pair, there exists a finite differentialinput voltage to completely switch the current from onetransistor to the other, whereas, in a bipolar pair thatvoltage is infinite.

MOS Bipolar

The effects of Doubling the Tail Current


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g

Since ISS is doubled and W/L is unchanged, the equilibriumoverdrive voltage for each transistor must increase byto accommodate this change, thus Vin,max increases byas well. Moreover, since ISS is doubled, the differentialoutput swing will double.

2

2

The effects of Doubling W/L


84/286


g

Since W/L is doubled and the tail current remains

unchanged, the equilibrium overdrive voltage will belowered by to accommodate this change, thus Vin,maxwill be lowered by as well. Moreover, the differentialoutput swing will remain unchanged since neither ISS nor RDhas changed

22

Small-Signal Analysis of MOS Differential Pair


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g y

When the input differential signal is small compared to4ISS/ nCox(W/L), the output differential current is linearlyproportional to it, and small-signal model can be applied.

212121

4

2

1ininSSoxn

oxn

SSininoxnDD VVI

L

WC

L

WC

IVV

L

WCII

Virtual Ground and Half Circuit


86/286


Applying the same analysis as the bipolar case, we willarrive at the same conclusion that node P will not move forsmall input signals and the concept of half circuit can beused to calculate the gain.

Cmv

P

RgA

V

0

MOS Differential Pair Half Circuit Example I


87/286


13

3

1 ||||1

0

OO

m

mv rrg

gA

MOS Differential Pair Half Circuit Example II


88/286


3

1

0

m

mv

g

gA

MOS Differential Pair Half Circuit Example III


89/286


mSS

DDv

gR

RA

12

2

0

Bipolar Cascode Differential Pair


90/286


133131 || OOOmmv rrrrggA

Bipolar Telescopic Cascode


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)||(|||| 575531331 rrrgrrrggA OOmOOmmv

Example: Bipolar Telescopic Parasitic Resistance


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opOOmmv

OOmOop

RrrrggA

Rrr

RrrgrR

||)||(

2||||

2||||1

31331

157

15755

MOS Cascode Differential Pair


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1331 OmOmv rgrgA

MOS Telescopic Cascode


94/286


)(|| 7551331 OOmOOmmv rrgrrggA

Example: MOS Telescopic Parasitic Resistance


95/286


)||(

]1[||

1331

77515

OmOopmv

OOmOop

rgrRgA

rrgRrR

Effect of Finite Tail Impedance


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If the tail current source is not ideal, then when a input CMvoltage is applied, the currents in Q1 and Q2 and henceoutput CM voltage will change.

mEE

C

CMin

CMout

gR

R

V

V

2/1

2/

,

,

Input CM Noise with Ideal Tail Current


97/286


Input CM Noise with Non-ideal Tail Current


98/286


Comparison


99/286


As it can be seen, the differential output voltages for bothcases are the same. So for small input CM noise, thedifferential pair is not affected.

CM to DM Conversion, ACM-DM


100/286


If finite tail impedance and asymmetry are both present,then the differential output signal will contain a portion ofinput common-mode signal.

EEm

D

CM

out

Rg

R

V

V

2/1

Example: ACM-DM


101/286


3133131

||)]||(1[21

rRrrRgg

R

A

Om

m

C

DMCM

CMRR


102/286


CMRR defines the ratio of wanted amplified differentialinput signal to unwanted converted input common-modenoise that appears at the output.

DMCM

DM

A

ACMRR

Differential to Single-ended Conversion


103/286


Many circuits require a differential to single-endedconversion, however, the above topology is not very good.

Supply Noise Corruption


104/286

CH 10 Differential Amplifiers104

The most critical drawback of this topology is supply noisecorruption, since no common-mode cancellationmechanism exists. Also, we lose half of the signal.

Better Alternative


105/286


This circuit topology performs differential to single-endedconversion with no loss of gain.

Active Load


106/286


With current mirror used as the load, the signal currentproduced by the Q1 can be replicated onto Q4.

This type of load is different from the conventional static

load and is known as an active load.

Differential Pair with Active Load


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The input differential pair decreases the current drawn fromRL by I and the active load pushes an extra I into RL bycurrent mirror action; these effects enhance each other.

Active Load vs. Static Load


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The load on the left responds to the input signal andenhances the single-ended output, whereas the load on theright does not.

MOS Differential Pair with Active Load


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Similar to its bipolar counterpart, MOS differential pair canalso use active load to enhance its single-ended output.

Asymmetric Differential Pair


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Because of the vastly different resistance magnitude at thedrains of M1 and M2, the voltage swings at these two nodesare different and therefore node P cannot be viewed as avirtual ground.

Thevenin Equivalent of the Input Pair


111/286


oNThev

ininoNmNThev

rR

vvrgv

2

)( 21

Simplified Differential Pair with Active Load


112/286


)||(21

OPONmN

inin

out rrgvv

v

Proof of VA


113/286


I

A

OPmP

outA

rg

vv

2

AmO

out

vgr

v

I 44

Chapter 11 Frequency Response


114/286


11.1 Fundamental Concepts

11.2 High-Frequency Models of Transistors

11.3 Analysis Procedure 11.4 Frequency Response of CE and CS Stages

11.5 Frequency Response of CB and CG Stages

11.6 Frequency Response of Followers

11.7 Frequency Response of Cascode Stage

11.8 Frequency Response of Differential Pairs

11.9 Additional Examples

114

Chapter Outline


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CH 10 Differential Amplifiers 115CH 11 Frequency Response 115

High Frequency Roll-off of Amplifier


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As frequency of operation increases, the gain of amplifierdecreases. This chapter analyzes this problem.

Example: Human Voice I


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Natural human voice spans a frequency range from 20Hz to20KHz, however conventional telephone system passesfrequencies from 400Hz to 3.5KHz. Therefore phoneconversation differs from face-to-face conversation.CH 11 Frequency Response 117

Natural Voice Telephone System

Example: Human Voice II


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Mouth RecorderAir

Mouth EarAir

Skull

Path traveled by the human voice to the voice recorder

Path traveled by the human voice to the human ear

Since the paths are different, the results will also bedifferent.

Example: Video Signal


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Video signals without sufficient bandwidth become fuzzy asthey fail to abruptly change the contrast of pictures fromcomplete white into complete black.

CH 11 Frequency Response 119

High Bandwidth Low Bandwidth

Gain Roll-off: Simple Low-pass Filter


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In this simple example, as frequency increases theimpedance of C1 decreases and the voltage divider consistsof C1 and R1 attenuates Vin to a greater extent at the output.


Gain Roll-off: Common Source


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The capacitive load, CL, is the culprit for gain roll-off sinceat high frequency, it will steal away some signal currentand shunt it to ground.

1||out m in D

L

V g V RC s

Frequency Response of the CS Stage


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At low frequency, the capacitor is effectively open and thegain is flat. As frequency increases, the capacitor tends toa short and the gain starts to decrease. A specialfrequency is =1/(RDCL), where the gain drops by 3dB.

1222

LD

Dm

in

out

CR

Rg

V

V

Example: Figure of Merit


123/286


This metric quantifies a circuits gain, bandwidth, and

power dissipation. In the bipolar case, low temperature,supply, and load capacitance mark a superior figure ofmerit.

LCCT CVV

MOF1

...

Example: Relationship between FrequencyResponse and Step Response


124/286


2 2 2

1 1

1

1H s j

R C

0

1 1

1 expoutt

V t V u tR C

The relationship is such that as R1C1 increases, thebandwidth dropsand the step response becomes slower.

Bode Plot


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When we hit a zero, zj, the Bode magnitude rises with aslope of +20dB/dec.

When we hit a pole, pj, the Bode magnitude falls with aslope of -20dB/dec

21

21

0

11

11

)(

pp

zz

ss

ss

AsH

Example: Bode Plot


126/286


The circuit only has one pole (no zero) at 1/(RDCL), so theslope drops from 0 to -20dB/dec as we pass p1.

LD

pCR

11

Pole Identification Example I


127/286


inS

pCR

11

LD

pCR

12

222212 11 ppDm

in

out Rg

V

V

Pole Identification Example II


128/286


in

m

S

p

Cg

R

1||

11

LD

pCR

12

Circuit with Floating Capacitor


129/286


The pole of a circuit is computed by finding the effectiveresistance and capacitance from a node to GROUND.

The circuit above creates a problem since neither terminalof CF is grounded.

Millers Theorem


130/286


If Av is the gain from node 1 to 2, then a floating impedanceZF can be converted to two grounded impedances Z1 and Z2.

v

F

A

ZZ

11

v

F

A

ZZ

/112

Miller Multiplication


131/286


With Millers theorem, we can separate the floatingcapacitor. However, the input capacitor is larger than theoriginal floating capacitor. We call this Miller multiplication.

Example: Miller Theorem


132/286


FDmSin CRgR

1

1

F

Dm

D

out

CRg

R

11

1

High-Pass Filter Response


133/286


12

1

2

1

2

1

11

CR

CR

V

V

in

out

The voltage division between a resistor and a capacitor canbe configured such that the gain at low frequency isreduced.


Example: Audio Amplifier


134/286


nFCi 6.79 nFCL 8.39

In order to successfully pass audio band frequencies (20Hz-20 KHz), large input and output capacitances areneeded.

200/1

100

m

i

g

KR


Capacitive Coupling vs. Direct Coupling


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Capacitive coupling, also known as AC coupling, passesAC signals from Y to X while blocking DC contents.

This technique allows independent bias conditions betweenstages. Direct coupling does not.

Capacitive Coupling Direct Coupling


Typical Frequency Response


136/286


Lower Corner Upper Corner


High-Frequency Bipolar Model


137/286


At high frequency, capacitive effects come into play. Cbrepresents the base charge, whereas C and Cje are thejunction capacitances.

b jeC C C

High-Frequency Model of Integrated BipolarTransistor


138/286


Since an integrated bipolar circuit is fabricated on top of asubstrate, another junction capacitance exists between thecollector and substrate, namely CCS.

Example: Capacitance Identification


139/286


MOS Intrinsic Capacitances


140/286


For a MOS, there exist oxide capacitance from gate tochannel, junction capacitances from source/drain tosubstrate, and overlap capacitance from gate tosource/drain.

Gate Oxide Capacitance Partition and Full Model


141/286


The gate oxide capacitance is often partitioned betweensource and drain. In saturation, C2 ~ Cgate, and C1 ~ 0. Theyare in parallel with the overlap capacitance to form CGS andCGD.

Example: Capacitance Identification


142/286


Transit Frequency


143/286


Transit frequency, fT, is defined as the frequency where thecurrent gain from input to output drops to 1.

C

gf mT 2

GS

mT

C

gf 2

Example: Transit Frequency Calculation


144/286


THGS

nT VV

Lf

22

32

GHzf

sVcm

mVVV

nmL

T

n

THGS

226

)./(400

100

65

2


Analysis Summary


145/286


The frequency response refers to the magnitude of thetransfer function.

Bodes approximation simplifies the plotting of the

frequency response if poles and zeros are known.

In general, it is possible to associate a pole with each nodein the signal path.

Millers theorem helps to decompose floating capacitors

into grounded elements.

Bipolar and MOS devices exhibit various capacitances that

limit the speed of circuits.


High Frequency Circuit Analysis Procedure


146/286


Determine which capacitor impact the low-frequency regionof the response and calculate the low-frequency pole(neglect transistor capacitance).

Calculate the midband gain by replacing the capacitors withshort circuits (neglect transistor capacitance).

Include transistor capacitances. Merge capacitors connected to AC grounds and omit those

that play no role in the circuit.

Determine the high-frequency poles and zeros.

Plot the frequency response using Bodes rules or exact

analysis.


Frequency Response of CS Stagewith Bypassed Degeneration


147/286


1

1

SmbS

bSDm

X

out

RgsCR

sCRRgs

V

V

In order to increase the midband gain, a capacitor Cb isplaced in parallel with Rs.

The pole frequency must be well below the lowest signalfrequency to avoid the effect of degeneration.


Unified Model for CE and CS Stages


148/286


Unified Model Using Millers Theorem


149/286


Example: CE Stage


150/286


f FC

f FC

f FC

mAI

R

CS

C

S

30

20

100

100

1

200

GHz

MHz

outp

inp

59.12

5162

,

,

The input pole is the bottleneck for speed.


Example: Half Width CS Stage


151/286


XW 2

2

21

2

1

221

2

1

,

,

XY

Lm

outL

outp

XYLminS

inp

C

Rg

CR

CRgCR


Direct Analysis of CE and CS Stages


152/286


Direct analysis yields different pole locations and an extrazero.

outinXYoutXYinLThev

outXYLinThevThevXYLmp

outXYLinThevThevXYLm

p

XY

mz

CCCCCCRR

CCRCRRCRg

CCRCRRCRg

C

g

1||

1

1||

||

2

1

Example: CE and CS Direct Analysis


153/286


outinXYoutXYinOOS

outXYOOinSSXYOOmp

outXYOOinSSXYOOm

p

CCCCCCrrR

CCrrCRRCrrgCCrrCRRCrrg

21

212112

21211

1

||

)(||||1)(||||1

1

Example: Comparison Between Different Methods


154/286


MHz

MHz

outp

inp

4282

5712

,

,

GHz

MHz

outp

inp

53.42

2642

,

,

GHz

MHz

outp

inp

79.42

2492

,

,

KR

g

fFC

fFC

fFC

R

L

m

DB

GD

GS

S

2

0

150

100

80

250

200

1

Millers Exact Dominant Pole


Input Impedance of CE and CS Stages


155/286


rsCRgC

ZCm

in ||1

1

sCRgCZ

GDDmGS

in

1

1

Low Frequency Response of CB and CG Stages


156/286


miSm

iCm

in

out

gsCRg

sCRgs

V

V

1

As with CE and CS stages, the use of capacitive couplingleads to low-frequency roll-off in CB and CG stages(although a CB stage is shown above, a CG stage issimilar).


Frequency Response of CB Stage


157/286


X

m

S

Xp

Cg

R

1||

1,

CCX

YL

YpCR

1,

CSY CCC Or

Frequency Response of CG Stage

1


158/286


Or

X

m

S

Xp

Cg

R

1||

1,

SBGSX CCC

YL

YpCR

1,

DBGDY

CCC

Similar to a CB stage, the input pole is on the order of fT, sorarely a speed bottleneck.

Or

Example: CG Stage Pole Identification


159/286


111

,1

||

1

GDSB

m

S

Xp

CCg

R

22112

, 11

DBGSGDDB

m

Yp

CCCCg

Example: Frequency Response of CG Stage


160/286


KR

g

fFC

fFC

fFC

R

d

m

DB

GD

GS

S

2

0

150

100

80

250

200

1

MHz

GHz

Yp

Xp

4422

31.52

,

,


Emitter and Source Followers


161/286


The following will discuss the frequency response ofemitter and source followers using direct analysis.

Emitter follower is treated first and source follower isderived easily by allowing r to go to infinity.

Direct Analysis of Emitter Follower


162/286


1

12

bsas

sg

C

V

V m

in

out

m

LS

m

S

LL

m

S

g

C

r

R

g

CCRb

CCCCCCg

Ra

1

Direct Analysis of Source Follower Stage


163/286


1

12

bsas

sg

C

V

V m

GS

in

out

m

SBGDGDS

SBGSSBGDGSGD

m

S

g

CCCRb

CCCCCC

g

Ra

Example: Frequency Response of Source Follower


164/286


0

150

100

80

250

100

200

1

m

DB

GD

GS

L

S

g

f FC

f FC

f FC

f FC

R

GHzjGHz

GHzjGHz

p

p

57.279.12

57.279.12

2

1


Example: Source Follower


165/286


1

1

2

bsas

sg

C

V

V m

GS

in

out

1

22111

2211111

1))((

m

DBGDSBGDGDS

DBGDSBGSGDGSGD

m

S

g

CCCCCRb

CCCCCCCg

Ra

Input Capacitance of Emitter/Source Follower


166/286


Lm

GSGDin

Rg

CCCCC

1

//

Or

Example: Source Follower Input Capacitance


167/286


12111

||11

GS

OOm

GDin Crrg

CC

Output Impedance of Emitter Follower


168/286


1

sCr

RrsCrR

I

V SS

X

X

Output Impedance of Source Follower


169/286


mGS

GSS

X

X

gsC

sCR

I

V

1

Active Inductor


170/286


The plot above shows the output impedance of emitter andsource followers. Since a followers primary duty is tolower the driving impedance (RS>1/gm), the activeinductor characteristic on the right is usually observed.

Example: Output Impedance


171/286


33

321 1||

mGS

GSOO

X

X

gsC

sCrr

I

V

Or

Frequency Response of Cascode Stage


172/286


For cascode stages, there are three poles and Millermultiplication is smaller than in the CE/CS stage.

12

1

,

m

m

XYv g

g

A XYx CC 2

Poles of Bipolar Cascode

1

1

1 Yp


173/286


111

,2||

CCrR

S

Xp

1212

,

21

CCC

g CSm

Yp

22,

1

CCR CSL

outp

Poles of MOS Cascode

1Xp

1


174/286


12

1

1

,

1 GDm

m

GSS

Xp

Cg

g

CR

1

1

221

2

,

11

1

GD

m

mGSDB

m

Yp

Cg

gCC

g

22

,

GDDBL

outpCCR

Example: Frequency Response of Cascode


175/286


KR

g

fFC

fFC

fFC

R

L

m

DB

GD

GS

S

2

0

150

100

80

250

200

1

MHz

GHz

GHz

outp

Yp

Xp

4422

73.12

95.12

,

,

,


MOS Cascode Example

1Xp

1


176/286


12

1

1

,

1 GDm

m

GSS

Xp

Cg

g

CR

331

1

221

2

,

11

1

DBGDGD

m

mGSDB

m

Yp

CCCg

gCC

g

22

,

GDDBL

outpCCR

I/O Impedance of Bipolar Cascode


177/286


sCCrZin

11

12

1||

sCC

RZCS

Lout

22

1||

I/O Impedance of MOS Cascode


178/286


sCg

gC

Z

GD

m

mGS

in

1

2

11 1

1 sCC

RZDBGD

Lout

22

1||

Bipolar Differential Pair Frequency Response


179/286


Since bipolar differential pair can be analyzed using half-circuit, its transfer function, I/O impedances, locations ofpoles/zeros are the same as that of the half circuits.

Half Circuit

MOS Differential Pair Frequency Response


180/286


Since MOS differential pair can be analyzed using half-circuit, its transfer function, I/O impedances, locations ofpoles/zeros are the same as that of the half circuits.

Half Circuit

Example: MOS Differential Pair

1


181/286


33,

1

1

331

3

,

1311

,

1

11

1])/1([

GDDBL

outp

GD

m

mGSDB

m

Yp

GDmmGSS

Xp

CCR

Cg

gCC

g

CggCR

Common Mode Frequency Response


182/286


12

1

SSmSSSS

SSSSDm

CM

out

RgsCR

CRRg

V

V

Css will lower the total impedance between point P toground at high frequency, leading to higher CM gain whichdegrades the CM rejection ratio.


Tail Node Capacitance Contribution


183/286


Source-Body Capacitance ofM1, M2 and M3

Gate-Drain Capacitance of M3


Example: Capacitive Coupling


184/286


EBin

RrRR 1||222

Hz

CRr BL 5422

||

1

111

1

HzCRR inC

L 9.221

22

2


Example: IC Amplifier Low Frequency Design


185/286


MHz

CRR inDL 92.62

1

221

2

MHzCR

Rg

S

SmL

4.4221

11

111

2

21

v

Fin

A

RR


Example: IC Amplifier Midband Design


186/286


77.3|| 211 inDmin

X RRgv

v


Example: IC Amplifier High Frequency Design


187/286


)21.1(2

)15.1(1

)15.2(2

)308(2

222

3

2

1

GHz

CCR

GHz

MHz

DBGDL

p

p

p


Chapter 12 Feedback


188/286

188

12.1 General Considerations

12.2 Types of Amplifiers

12.3 Sense and Return Techniques

12.4 Polarity of Feedback

12.5 Feedback Topologies

12.6 Effect of Finite I/O Impedances

12.7 Stability in Feedback Systems

Negative Feedback System


189/286

CH 12 Feedback 189

A negative feedback system consists of four components:1) feedforward system, 2) sense mechanism, 3) feedbacknetwork, and 4) comparison mechanism.

Close-loop Transfer Function


190/286

CH 12 Feedback 190

1

1

1 KA

A

X

Y

Feedback Example


191/286

CH 12 Feedback 191

A1 is the feedforward network, R1 and R2 provide thesensing and feedback capabilities, and comparison isprovided by differential input of A1.

1

21

2

1

1 ARR

R

A

X

Y

Comparison Error


192/286

CH 12 Feedback 192

As A1K increases, the error between the input and fed backsignal decreases. Or the fed back signal approaches agood replica of the input.

KA

XE

1

1

E

Comparison Error


193/286

CH 12 Feedback 193

2

11R

R

X

Y

Loop Gain


194/286

CH 12 Feedback 194

When the input is grounded, and the loop is broken at anarbitrary location, the loop gain is measured to be KA1.

test

N

V

VKA 10X

Example: Alternative Loop Gain Measurement


195/286

CH 12 Feedback 195

testN VKAV 1

Incorrect Calculation of Loop Gain


196/286

CH 12 Feedback 196

Signal naturally flows from the input to the output of afeedforward/feedback system. If we apply the input theother way around, the output signal we get is not a result

of the loop gain, but due to poor isolation.

Gain Desensitization


197/286

CH 12 Feedback 197

A large loop gain is needed to create a precise gain, onethat does not depend on A1, which can vary by .

11 KA

KX

Y 1

Ratio of Resistors


198/286

CH 12 Feedback 198

When two resistors are composed of the same unit resistor,their ratio is very accurate. Since when they vary, they willvary together and maintain a constant ratio.

Merits of Negative Feedback


199/286

CH 12 Feedback 199

1) Bandwidthenhancement

2) Modification of I/O

Impedances

3) Linearization

Bandwidth Enhancement

Open LoopClosed Loop


200/286

CH 12 Feedback 200

Although negative feedback lowers the gain by (1+KA0), italso extends the bandwidth by the same amount.

0

0

1

s

AsA

00

0

0

11

1

KAs

KA

A

s

X

Y

Open Loop

NegativeFeedback

Bandwidth Extension Example


201/286

CH 12 Feedback 201

As the loop gain increases, we can see the decrease of theoverall gain and the extension of the bandwidth.

Example: Open Loop Parameters


202/286

CH 12 Feedback 202Dout

m

in

Dm

RR

gR

RgA

1

0

Example: Closed Loop Voltage Gain


203/286

CH 12 Feedback 203

Dm

Dm

in

out

RgRR

R

Rg

v

v

21

21

Example: Closed Loop I/O Impedance


204/286

CH 12 Feedback 204

Dmm

in RgRR

R

gR

21

211

Dm

Dout

RgRR

RRR

21

21

Example: Load Desensitization


205/286

CH 12 Feedback 205

3/DmDm RgRg Dm

Dm

Dm

Dm

RgRR

R

Rg

RgRR

R

Rg

21

2

21

2 31

W/O Feedback

Large Difference

With Feedback

Small Difference

Linearization


206/286

CH 12 Feedback 206

Before feedback

After feedback

Four Types of Amplifiers


207/286

CH 12 Feedback 207

Ideal Models of the Four Amplifier Types


208/286

CH 12 Feedback 208

Realistic Models of the Four Amplifier Types


209/286

CH 12 Feedback 209

Examples of the Four Amplifier Types


210/286

CH 12 Feedback 210

Sensing a Voltage


211/286

CH 12 Feedback 211

In order to sense a voltage across two terminals, avoltmeter with ideally infinite impedance is used.

Sensing and Returning a Voltage


212/286

CH 12 Feedback 212

Similarly, for a feedback network to correctly sense theoutput voltage, its input impedance needs to be large.

R1 and R2 also provide a mean to return the voltage.

21 RR

FeedbackNetwork

Sensing a Current


213/286

CH 12 Feedback 213

A current is measured by inserting a current meter with

ideally zero impedance in series with the conduction path. The current meter is composed of a small resistance r in

parallel with a voltmeter.

Sensing and Returning a Current


214/286

CH 12 Feedback 214

Similarly for a feedback network to correctly sense the

current, its input impedance has to be small.

RS has to be small so that its voltage drop will not changeIout.

0SR

FeedbackNetwork

Addition of Two Voltage Sources


215/286

CH 12 Feedback 215

In order to add or substrate two voltage sources, we placethem in series. So the feedback network is placed in serieswith the input source.

FeedbackNetwork

Practical Circuits to Subtract Two Voltage Sources


216/286

CH 12 Feedback 216

Although not directly in series, Vin and VF are beingsubtracted since the resultant currents, differential andsingle-ended, are proportional to the difference of Vin andVF.

Addition of Two Current Sources


217/286

CH 12 Feedback 217

In order to add two current sources, we place them inparallel. So the feedback network is placed in parallel withthe input signal.

FeedbackNetwork

Practical Circuits to Subtract Two Current Sources


218/286

CH 12 Feedback 218

Since M1

and RF

are in parallel with the input current source,their respective currents are being subtracted. Note, RF hasto be large enough to approximate a current source.

Example: Sense and Return


219/286

CH 12 Feedback 219

R1 and R2 sense and return the output voltage tofeedforward network consisting of M1- M4.

M1 and M2 also act as a voltage subtractor.

Example: Feedback Factor


220/286

CH 12 Feedback 220

mF

out

F gv

iK

Input Impedance of an Ideal Feedback Network


221/286

CH 12 Feedback 221

To sense a voltage, the input impedance of an ideal

feedback network must be infinite. To sense a current, the input impedance of an ideal

feedback network must be zero.

Output Impedance of an Ideal Feedback Network


222/286

CH 12 Feedback 222

To return a voltage, the output impedance of an ideal

feedback network must be zero.

To return a current, the output impedance of an idealfeedback network must be infinite.

Determining the Polarity of Feedback

1) Assume the input goes


223/286

CH 12 Feedback 223

1) Assume the input goeseither up or down.

2) Follow the signal throughthe loop.

3) Determine whether thereturned quantity enhances oropposes the original change.

Polarity of Feedback Example I


224/286

CH 12 Feedback 224

inV 21 , DD II xout VV , 12 , DD II

Negative Feedback

Polarity of Feedback Example II


225/286

CH 12 Feedback 225

inV AD VI ,1 xout VV , AD VI ,1

Negative Feedback

Polarity of Feedback Example III


226/286

CH 12 Feedback 226

inI XD VI ,1 2, Dout IV XD VI ,1

Positive Feedback

Voltage-Voltage Feedback


227/286

CH 12 Feedback 227

0

0

1 KA

A

V

V

in

out

Example: Voltage-Voltage Feedback


228/286

CH 12 Feedback 228

)||(1

)||(

21

2OPONmN

OPONmN

in

out

rrgRR

R

rrg

V

V

Input Impedance of a V-V Feedback


229/286

CH 12 Feedback 229

)1( 0 KAR

I

Vin

in

in

A better voltage sensor

Example: V-V Feedback Input Impedance


230/286

CH 12 Feedback 230

Dm

min

in RgRR

RgI

V

21

211

Output Impedance of a V-V Feedback


231/286

CH 12 Feedback 231

01 KAR

I

V out

X

X

A better voltage source

Example: V-V Feedback Output Impedance


232/286

CH 12 Feedback 232

mN

closedoutgR

RR

11

2

1,

Voltage-Current Feedback


233/286

CH 12 Feedback 233O

O

in

out

KR

R

I

V

1

Example: Voltage-Current Feedback


234/286

CH 12 Feedback 234F

DDm

DDm

in

out

R

RRgRRg

IV

212

212

1

Input Impedance of a V-C Feedback


235/286

CH 12 Feedback 235

KR

R

I

V in

X

X

0

1

A better current sensor.

Example: V-C Feedback Input Impedance


236/286

CH 12 Feedback 236F

DDmm

closedin

R

RRggR

2121

,

1

1.1

Output Impedance of a V-C Feedback


237/286

CH 12 Feedback 237

A better voltage source.

KR

R

I

V out

X

X

01

Example: V-C Feedback Output Impedance


238/286

CH 12 Feedback 238F

DDm

Dclosedout

R

RRgRR

212

2,

1

Current-Voltage Feedback


239/286

CH 12 Feedback 239

m

m

in

out

KG

G

V

I

1

Example: Current-Voltage Feedback


240/286

CH 12 Feedback 240

MOOmm

OOmmclosed

in

out

Rrrgg

rrgg

V

I

5331

5331

||1

|||

Laser

Input Impedance of a C-V Feedback


241/286

CH 12 Feedback 241

A better voltage sensor.

)1( min

in

in KGRI

V

Output Impedance of a C-V Feedback


242/286

CH 12 Feedback 242

A better current source.

)1( moutX

X KGR

I

V

Example: Current-Voltage Feedback


243/286

CH 12 Feedback 243

Laser

)1(1

|

)1(

1

|

1|

21

2

211

21

21

MDmm

m

closedout

MDmmm

closedin

MDmm

Dmmclosed

in

out

RRggg

R

RRgggR

RRgg

Rgg

V

I

Wrong Technique for Measuring Output Impedance


244/286

CH 12 Feedback 244

If we want to measure the output impedance of a C-Vclosed-loop feedback topology directly, we have to place VXin series with K and Rout. Otherwise, the feedback will bedisturbed.

Current-Current Feedback


245/286

CH 12 Feedback 245I

I

in

out

KA

A

I

I

1

Input Impedance of C-C Feedback


246/286

CH 12 Feedback 246

A better current sensor.

I

in

X

X

KA

R

I

V

1

Output Impedance of C-C Feedback


247/286

CH 12 Feedback 247

A better current source.

)1( IoutX

X KAR

I

V

Example: Test of Negative Feedback


248/286

CH 12 Feedback 248

inI outD IV ,1 FP IV , outD IV ,1Negative Feedback

Laser

Example: C-C Negative Feedback


249/286

CH 12 Feedback 249

)]/(1[|

)/(11.1|

)/(1|

22

21

2

2

FDmOclosedout

FMDmm

closedin

FMDm

DmclosedI

RRRgrR

RRRggR

RRRg

RgA

M

Laser

How to Break a Loop


250/286

CH 12 Feedback 250

The correct way of breaking a loop is such that the loop

does not know it has been broken. Therefore, we need topresent the feedback network to both the input and theoutput of the feedforward amplifier.


251/286

Intuitive Understanding of these Rules



252/286

CH 12 Feedback 252

Since ideally, the input of the feedback network sees zeroimpedance (Zout of an ideal voltage source), the return

replicate needs to be grounded. Similarly, the output of thefeedback network sees an infinite impedance (Zin of an idealvoltage sensor), the sense replicate needs to be open.

Similar ideas apply to the other types.

Rules for Calculating Feedback Factor


253/286

CH 12 Feedback 253

Intuitive Understanding of these Rules



254/286

CH 12 Feedback 254

Since the feedback senses voltage, the input of thefeedback is a voltage source. Moreover, since the return

quantity is also voltage, the output of the feedback is leftopen (a short means the output is always zero).

Similar ideas apply to the other types.

Breaking the Loop Example I


255/286

CH 12 Feedback 255

21,1,

211,

||

/1

||

RRRR

gR

RRRgA

Dopenout

mopenin

Dmopenv

Feedback Factor Example I


256/286

CH 12 Feedback 256

)1/(

)1(

)1/(

)/(

,,,

,,,

,,,

212

openvclosedoutclosedout

openvopeninclosedin

openvopenvclosedv

KARR

KARR

KAAA

RRRK

Breaking the Loop Example II


257/286

CH 12 Feedback 257

21,

,

21,

||||

||||

RRrrR

R

RRrrgA

OPONopenout

openin

OPONmNopenv

Feedback Factor Example II


258/286

CH 12 Feedback 258

)1/(

)1/(

)/(

,,,

,

,,,

212

openvopenoutclosedout

closedin

openvopenvclosedv

KARR

R

KAAA

RRRK

Breaking the Loop Example IV


259/286

CH 12 Feedback 259

FDopenout

F

m

openin

FDm

m

F

DFopen

in

out

RRR

Rg

R

RRg

gR

RR

I

V

||

||1

||.1

|

2,

1

,

22

1

1

Feedback Factor Example IV


260/286

CH 12 Feedback 260

)|1/(

)|1/(

)|1/(||

/1

,,

,,

open

in

outopenoutclosedout

open

in

outopeninclosedin

open

in

outopen

in

outclosed

in

out

F

I

VKRR

IVKRR

I

VK

I

V

I

V

RK

Breaking the Loop Example V


261/286

CH 12 Feedback 261

MOopenout

openin

MLO

OmOOmopen

in

out

RrR

R

RRr

rgrrg

V

I

1,

,

1

11533 |||

Feedback Factor Example V


262/286

CH 12 Feedback 262

]|)/(1[

]|)/(1/[)|/()|/(

,,

,

openinoutopenoutclosedout

closedin

openinoutopeninoutclosedinout

M

VIKRR

R

VIKVIVI

RK

Breaking the Loop Example VI


263/286

CH 12 Feedback 263Mmopenout

mopenin

mML

Dmopen

in

out

RgR

gRgRR

Rg

V

I

)/1(

/1/1

|

2,

1,

2

1

Feedback Factor Example VI


264/286

CH 12 Feedback 264

]|)/(1[

]|)/(1[]|)/(1/[)|/()|/(

,,

,,


openinoutopeninclosedin


M

VIKRR

VIKRRVIKVIVI

RK

Breaking the Loop Example VII


265/286

CH 12 Feedback 265

MFOopenout

MF

m

openin

FMLO

Om

m

MF

DMFopenI

RRrR

RRg

R

RRRr

rg

gRR

RRRA

||

)(||1

||.

1

)(

2,

1

,

2

22

1

,

Feedback Factor Example VII


266/286

CH 12 Feedback 266)1(

)1/()1/(

)/(

,,,

,,,

,,,

openIopenoutclosedout

openIopeninclosedin

openIopenIclosedI

MFM

KARR

KARRKAAA

RRRK

Breaking the Loop Example VIII


267/286

CH 12 Feedback 267

MFopenout

F

m

openin

MFm

mF

DFopen

in

out

RRR

Rg

R

RRggR

RR

I

V

||

||1

)]||([/1

|

,

1

,

2

1

Feedback Factor Example VIII


268/286

CH 12 Feedback 268

]|)/(1/[

]|)/(1/[

]|)/(1/[|)/(|)/(

/1

,,

,,


openinoutopeninclosedin


F

IVKRR

IVKRR

IVKIVIV

RK

Example: Phase Response


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As it can be seen, the phase of H(j) starts to drop at 1/10of the pole, hits -45o at the pole, and approaches -90o at 10times the pole.

Example: Three-Pole System


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CH 12 Feedback 270

For a three-pole system, a finite frequency produces aphase of -180o, which means an input signal that operatesat this frequency will have its output inverted.

Instability of a Negative Feedback Loop


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Substitute j for s. If for a certain 1

, KH(j1

) reaches

-1, the closed loop gain becomes infinite. This implies for avery small input signal at 1, the output can be very large.Thus the system becomes unstable.

)(1

)()(

sKH

sHs

X

Y

Barkhausens Criteria for Oscillation


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180)(

1|)(|

1

1

jKH

jKH

Time Evolution of Instability


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Oscillation Example


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This system oscillates, since theres a finite frequency atwhich the phase is -180o and the gain is greater than unity.In fact, this system exceeds the minimum oscillationrequirement.

Condition for Oscillation


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Although for both systems above, the frequencies at which

|KH|=1 and KH=-180o are different, the system on the leftis still unstable because at KH=-180o, |KH|>1. Whereasthe system on the right is stable because at KH=-180o,|KH|


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PX, (phase crossover), is the frequency at whichKH=-180o.

GX, (gain crossover), is the frequency at which |KH|=1.

PXGX

Stability Example I


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1

1||

K

Hp

Stability Example II


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5.0

1||5.0

K

Hp

Marginally Stable vs. Stable


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Marginally Stable Stable

Phase Margin

Phase Margin =


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Phase Margin =H(GX)+180

The larger the phasemargin, the more stablethe negative feedbackbecomes

Phase Margin Example


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45PM

Frequency Compensation


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Phase margin can be improved by moving GX closer toorigin while maintaining PX unchanged.

Frequency Compensation Example


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Ccomp is added to lower the dominant pole so that GXoccurs at a lower frequency than before, which meansphase margin increases.

Frequency Compensation Procedure


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1) We identify a PM, then -180o+PM gives us the new GX, or

PM

. 2) On the magnitude plot at PM, we extrapolate up with a

slope of +20dB/dec until we hit the low frequency gain thenwe look down and the frequency we see is our newdominant pole, P.

Example: 45o Phase Margin Compensation


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2pPM

Miller Compensation


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Documents

transformer and its uses