Xilinx. The Leader in Programmable logic.Designers prefer CoolRunner-II CPLDs.

Based upon both supplier and component criteria, designers choose Xilinx as a preferred vendor for low-power CPLD products. Weighing competitors not only by price, but by reputation of product, delivery,quality, and attention to special needs, Xilinx comes out on top.

According to HTC, the device features were what tipped the scale. Not only did the base powerconsumption meet or exceed power budgets, but key low-power enhancements played a large role in part selection. “HTC has received a substantial amount of performance capabilities in Xilinx products,”said Peter Chou, HTC’s president. ”Their combination of leading-edge technologies, complete programmable system design, and full technical service support are essential to the success of HTC.”

TOCThe Benefits of CPLDs . . . . . . . . . . . . . . . . . . . . . . . . .3 Handsets

Pocket PC/Phone with Keyboard . . . . . . . . . . . . . . .4DataGATE Blocking . . . . . . . . . . . . . . . . . . . . . . . .4Cell Phone with Camera Zoom . . . . . . . . . . . . . . .5PocketPC/Phone . . . . . . . . . . . . . . . . . . . . . . . . . . .5Handset Application Note Support . . . . . . . . . . . . .6

Portable ConsumerGPS Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7PDA Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7Portable Satellite Radio and MP3 Player . . . . . . . . .8Alchohol Analyzer . . . . . . . . . . . . . . . . . . . . . . . . . .8

Wired ConsumerDigital Music Box . . . . . . . . . . . . . . . . . . . . . . . . . .9Digital Wireless Interface . . . . . . . . . . . . . . . . . . . . .9Photo Printer . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10Logic Consolidator . . . . . . . . . . . . . . . . . . . . . . . .11

Documented Xilinx CPLD ApplicationsDigital Media Player . . . . . . . . . . . . . . . . . . . . . . .12Digital Camera . . . . . . . . . . . . . . . . . . . . . . . . . . .12

Memory ControlCompact Flash Card Interface and Control . . . . . .13SD Card Interface . . . . . . . . . . . . . . . . . . . . . . . . .13SDRAM Controller . . . . . . . . . . . . . . . . . . . . . . . . .13

Display InterfaceLED Driver Block . . . . . . . . . . . . . . . . . . . . . . . . . .14LCD Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14Level Shifting . . . . . . . . . . . . . . . . . . . . . . . . . . . .15Microcontroller Interface . . . . . . . . . . . . . . . . . . . .15Serial Peripheral Interface Master . . . . . . . . . . . . .15

CoolRunner-II Advance Features . . . . . . . . . . . . . . . .16Industry’s Lowest Power CPLD . . . . . . . . . . . . . . . . .17CoolRunner-II CPLD Selection Guide . . . . . . . . . . . . .18Take the Next Step . . . . . . . . . . . . . . . . . . . . . . . . . . .19

2

3

Why Designers are Using CoolRunner-II CPLDs

The Benefits of Xilinx CoolRunner-II CPLDs

Much more than logic and flip-flops

• Product Differentiation. Separating your product from the competition

• Enhancing technology: adding an innovation to existing chipset features

• Enabling technology: adding entirely new features to open up new markets

• Increase brand awareness: give your product something memorable

• Low Power RealDigital Advantage

• DataGATE: lower power; requires no external devices

• Flexibility

• Easily integrate the components that best meet your needs

• Support modular configurations

• Easy System Customization

• Time-to-Market Advantage

• Free efficient and proven development tools (WebPACK)

• Standard off-the-shelf components

• Free Reference Designs

• Fully Programmable and Re-Programmable

• Reduced exposure to risk, bugs, component shortages, evolving standards

• Field upgradeable hardware

• System Cost Management

• Logic consolidation: reduce the number of devices in your design

• Efficient Life-Cycle Product Management

• Extremely effective at enabling derivative designs

• Exploit market opportunities before your competition

• Expand the market base of your ROI

• Combine Functionality

• Level Shifting and I/O Pin Expansion and Logic Consolidation

• Keypad scanner and other features in one device

4

Pocket PC Phone • DataGATE

• Level Shifter

• I2C to GPIO Expansion

• OTF Configuration

• Interrupt Controller

• CF Bus Switch

• Keypad Scanner

• LCD Timing Controller

• Logic Consolidation

CompactFlash

Microcontroller CF BusSwitch

LCD TimingController

InterruptController

KeypadScanner

Keypad

LCD

OTFConfiguration

LogicConsolidation

LevelShifter

I2C to GPIOExpansion

CoolRunner-IIXC2C128

CP132

DataGATE Blocking • XAPP395 Using DataGATE in CoolRunner-II CPLDs

• WP227 The Real Value of CoolRunner-II DataGATE

CoolRunner-II CPLDI.MX

PROCESSOR

SRAMEPROM

DRAM

I/O

Handsets

00 5 10 15

Frequency (MHz)

Vcc

io C

urr

ent

(mA

)

8 Inputs Switching: Vccio Current Savings w/ DataGATE

20 25

5

10

15

20

25

30

35

40

99%

Iccio (CoolRunner-II with DataGATE)

Iccio (Traditional ZeroPower CPLD)

CoolRunner-IIXC2C128

CP132

CMOS CCD

Camera

Processing

Graphics

MDDI Client

Dual Memory

MSM

EB1 1

Standard Chipset Part

CoolRunner-II

Stepping

Motor

Control

CoolRunner-IIXC2C32

QF32

KEY

PRESS SCAN

CODE

SERIAL

INTERFACE

CoolRunner-II

CPLD

CPU

Key Pad

Pocket PC/Phone • Keypad Scanner

• Logic Consolidation

5

Cell Phone with Camera Zoom• Focus Control for Stepping Motor.

• Chipset Differentiation.

6

Handset ApplicationNote Support• Free HDL Design Files Accompany Application Notes

• Proven Customer Design Use and Support

• www.xilinx.com/support/library.htm

Expander

Port2CI

C2

SMB/I

LCD

Display

Microprocessor

I2C

I2C

XAPP799XAPP387

XAPP349

XAPP385

Bus

MMC/SD

Interface

Compact

Flash

Interface

DDR

Interface

Memory

Interface

Keypad

Scanner

LCD

Controller

XAPP512

XAPP904

XAPP398 XAPP906 XAPP384 XAPP394

Q W E R T Y

D T M F

C U S T O M

MMC/SDCompact

Flash

NAND

Flash

Interface

XAPP354

NAND

Flash

DDR

SDRAM

Mobile

SDRAM

GPS Unit • Hard Disk Control

• GPIO Interface

• Timing Controller

GPIO

Port

CoolRunner-II

Hard

Disk

Controller

Hard

DriveTiming

Controller

Microcontroller

GPIO

Interface

CoolRunner-IIXC2C128

CP132

Portable Consumer

PDA Device • SD Card Interface

Xilinx

XC2C32A

SDRAM

Controller

LCD

Speaker

MMC/SD

Card

Flash

Touch Screen

& Audio Controller

Dragonball

Processor

WiFi

7

CoolRunner XPLA3XCR3032XL

3.3 Volt

Portable Satellite Radio and MP3 Player• Microprocessor Bug Fix

• SDRAM Timing Controller

CoolRunner-II

Microprocessor

Bug Fix

+

SDRAM

Timing

Controller

ARM Processor

Micron

SDRAM

CoolRunner-IIXC2C32A

QF32

8

Alcohol Analyzer • Display Control

• Logic Consolidaton

CoolRunner XPLA3 CPLDUnder

PiggybackDevice

CoolRunner-II

Logic

Display Control Display

XC9572XL

Digital Music Box • Port Expander/Interface

• DAC Interface

Wired Consumer

Digital Wireless Interface • Port Expander/Interface

Analog Sensor Interface

CoolRunner-II CPLD

DIGITAL

IOFIFO

ADC DIRECT

INPUT

BUFFERED

DATA

SIGNAL

CONTROL/PROCESSING

Parallel

INTERFACE

PERIPHERALS

ANALOG

CHANNELS

XC9572XL

9

10

CoolRunner-IIXC2C128

CP132

Photo Printer • High Speed SRAM Controller

CoolRunner-II

XC2C128

Data

Buffer

Controller

High

Speed

Data

Buffer

Logic Consolidator

Xilinx CPLDs Offer More for Less

Get More• Logic• Features and Performance • Security • Flexibility

For Less• Price• Board area • Power • EMI

The Logic Consolidator demonstrates how Xilinx CPLDs can: • Reduce component cost and manufacturing cost • Reduce component count and

PC board space • Decrease time-to-market • Increase reliability

Documentation • WP202: The Advantages of Migrating from Discrete Logic

Devices to CPLDs (PDF) • WP214: TTL Burn Rate for Xilinx CPLDs (PDF)

Download the latest version of the CPLD Logic Consolidator now!

www.xilinx.com/products/silicon_solutions/cplds/cpld_logic_consolidator.htm

11

12

Digital Media Player • XAPP328 Design of an MP3 Player Using a CoolRunner CPLD

Documented XilinxCPLD Applications

Display

Interrupt

Processor

ASSP

Memory

SDRAM

CoolRunner-II

Battery

WiFI

BlueTooth

Digital Tuner

Digital Camera • XAPP390 Design of a Digital Camera with CoolRunner-II CPLDs

CoolRunner-II CPLD

Main

Control

Logic

Image

Grabber

Control

Logic

SRAM

Interface

Logic

LCD

Panel

Inverter

SRAM

SHIP

Interface

Control

LogicCMOS

Image

Sensor

LCD

Interface

Control

Logic

PWM

Logic

13

Memory Control Compact Flash Card Interface and Control

• XAPP398 Compact Flash Interface for CoolRunner-II CPLDs

Control Bus

Expansion Bus

A10:A0

D15:D8

D7:D0

Compact Flash Card

CoolRunner-II

CPLD

CF+Interface

CM Control Bus

CM D15:D8

I/O Control Bus

I/O D7:D0

CM A10:A0

DSP Control Bus

DSP A10:A0

DSP D7:D0

I/O A10:A0

800MHz Clock

Host B

us A

dapter (H

BA)

Common

Memory

(Intel

StrataFlash)

I/O Space

(Analog

Devices

DSP)

Additional

Functions

40MHz

Clock

SD Card Interface

CLK

Data In

Data Out

CS

CLK_Out

CLK_In RECONFIG CONFIG_FAILED

CMD_Out

Data_In

CS_Out

SD Card

CoolRunner-II CPLD

SDRAM Controller

CoolRunner-II CPLD

sys_clk sdram_clk

sys_reset

sys_address [23:0]

sdram_read_en

sdram_w

rit

e_en

sys_cmd [3:0]

sys_data [15:0] sdram_ldqm

sdram_udqm

sdram_dq [15:0]

SDRAM State Machine

CAS_CNT

[UPCNT2]

Mode

Register

WR_BRST_CNT

[UPCNT4]

RD_BRST_CNT

[UPCNT4]

Data Control Logic

SDRAM

• XAPP906 Interfacing to Secure Digital

Cards with CoolRunner-II CPLDs

• XAPP384 Interfacing to DDR SDRAM with

CoolRunner-II CPLDs

• XAPP394 Interfacing to Mobile SDRAM with

CoolRunner-II CPLDs

14

LED Driver Block• XAPP805 Driving LEDs with Xilinx CPLDs

3.3V

2.5V

Segment Select

8

Digit Select

8

CoolRunner-II

CPLD

LCD Module • XAPP904 CoolRunner-II Character LCD Module Interface

CoolRunner-II CPLD

db

Ready

Counter

Done

Ready 16

Data

clk

rest

W lcd_e

lcd_rs

lcd_rw

lcd_db

8

8 8

8

‘0’

C0

Main State

Machine

C

N

T

R

Power_up

C

N

T

R

Display Interface

15

Level Shifting • XAPP785 Level Translation Using Xilinx CPLDs

XILINX CPLD

1.8V 1.8V1.8V

3.3V

2.5V

Microcontroller Interface • XAPP393 CoolRunner-II CPLD 8051 Microcontroller Interface

Address

Data

Control

MicrocontrollerMicrocontroller

Interface

Register

File

Application

Logic

CoolRunner-II CPLD

CoolRunner-II SPI Master

Address

SS_N[7.0]

SS_IN_N

SCK

MOSI

MISO

Data

Control

MicrocontrollerMicrocontroller

Interface

SPI Master

Interface

CoolRunner-II CPLD

Serial Peripheral Interface Master • XAPP386 CoolRunner-II Serial Peripheral Interface Master

• XAPP800 Configuring Xilinx FPGAs with SPI Flash Memories Using CoolRunner-II CPLDs

16

DualEDGE Flip Flops Each flip-flop can switch on the rising,

falling or both edges of the clock

• Higher-resolution PWM

• Motor control

• LCD contrast

• Power conversion

• Position indication

• Increased timer resolution

500mV Input Hysteresis • Improved noise immunity

• Reduced power consumption

(fewer false transitions)

• Superior signal integrity

In System Programming and On The Fly Reconfiguration• Reprogram the design

post-deployment

• Reprogram the CPLD with a

new pattern while the existing

pattern is operational

• Multiple design patterns from

a single CPLD

I/O Banking Multiple I/O banks, each with

independently selectable voltage levels

• System voltage interfacing

• Bridging standards

• Bus multiplexing

1.5VµP

3.3VSRAM

2.5VSRAM

1.8VI/O

Clock Division • Even/Odd clock generation

• Duty cycle correction

• Multiple clock nets

GlobalClock

(GCK2)

ExternalSync

Reset

ClockDivide

By2,4,6,8,10,12, 14,16

DataGATESeries switches on the inputs allow decoupling

of internal logic from external “don’t care”

transitions. Outputs are held at the last

valid state when DataGATE is enabled.

• Reduces power consumption by

eliminating ’don’t care’ internal switching

• Supports hot plugging

• Reduces EMI

• Simplifies system debug

Advanced Security Four levels of design security

• Prevents design theft or

accidental overwrite

• Ideal for mobile phones and

PDAs and other wireless applications

CLOCKIN

DATAIN DIN DOUT

CLK

DataGATEDecoupling

SwitchTo Internal

LogicINPUT

PIN

HystersisBuffer To Internal

LogicINPUT

PIN

•

•

DIV2to FB1

to FB n

DIV4•••

•••DIV16

CoolRunner-IIAdvanced Features

17

Industry’s LowestPower CPLDs.

So low-power, CoolRunner-II CPLDs even run on Apples!

• XAPP381 CoolRunner-II Demo Board

Hours of Dynamic OperationNote: 256 macrocell devices at 100% duty cycle with 2 AA batteries, populated with 16 bit counters at 20 MHz.

0 200 400 600 1000 1200

CoolRunner-II CPLD with DataGATE

CoolRunner-II 1.8V CPLD

Brand L 1.8V ”zero power“ CPLD

Brand L 1.8V CPLD

Brand A 1.8V CPLD

CPLD Battery Life Comparison• CoolRunner-II CPLDs with DataGATE dramatically extends battery life

18

CoolRunner-II CPLD Selection Guide

21QFG32 — — — — —

750System Gates

Device

5x5 mm

XC2C32A

1500

XC2C64A

3000

XC2C128

6000

XC2C256

9000

XC2C384

12000

32Macrocells 64 128 256 384 512

56Product Terms per Macrocell 56 56 56 56 56

33Maximum I/O 64 100 184 240 270

3.8Minimum Pin-to-Pin Logic Delay (ns) 4.6 5.7 5.7 7.1 7.1

YesDualEDGE Registers Yes Yes Yes Yes Yes

YesInput Hysteresis Yes Yes Yes Yes Yes

—DataGATE and Clock Divide — Yes Yes Yes Yes

3Global Clocks 3 3 3 3 3

16Product Term Clocks per Function Block 16 16 16 16 16

XC2C512

33VQ44 33 — — — —12x12 mm

33PC44 33 — — — —17.5x17.5 mm

—QFG48 37 — — — —7x7 mm

33CP56 45 — — — —6x6 mm

—VQ100 64 80 80 — —16x16 mm

—CP132 — 100 106 — —8x8 mm

—TQ144 — 100 118 118 —22x22 mm

—PQ208 — — 173 173 17330.6x30.6 mm

—FT256 — — 184 212 21217x17 mm

—FG324 — — — 240 27023x23 mm

Packages Size Maximum User I/O

QF32 CP56 QF48 CP132 FT2565x5mm 6x6mm 7x7mm 8x8mm 17x17mm25mm2 36mm2 49mm2 64mm2 289mm2

21 45 37 106 212

Package Type:Dimensions:Board Area:

Max. I/O:(Actual Size)

Low-cost Small Form-Factor Packaging

Take the Next StepThe Xilinx CPLD Design Kit contains everything you need to design

and debug your next CPLD design, including:

• ISE WebPACK software

• Prototype board with pre-programmed

CoolRunner-II and XC9500XL CPLDs

• Download cable

• Training material

• Resource CD

www.xilinx.com

Design Faster with CoolRunner Reference Designs.

Xilinx CPLD reference designs make

designing much easier than with

other solutions. These drop-in,

ready-to-use functions are comprised

of HDL design code and application notes that

allow to finish your design faster. You can also increase product

flexibility and user advantages with our comprehensive reference designs.

www.xilinx.com/cpld/ref-designs

CPLD QuickStart Applications.

Xilinx CoolRunner-II CPLDs are shown in a wide range of design examples,

with presentations and demonstrations to show how you can complete

your design faster, with lower power and lower cost.

www.xilinx.com/cpld/quickstart

19

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