Test processes in PIC production chain: challenges and ... · >€ 600 billion by 2025 (expectations Nokia a.o., IPSR-I fall meeting, Boston, Nov 2018) •Involvement of supply chain

27th September 2019

Weiming Yao, Sylwester Latkowski

Salland Test Technology Symposium 2019

Test processes in PIC production chain: challenges and solutions

Outline1. Photonics

The future of Digital Era

2. Integrated photonics ecosystem

Photon Delta, JePPIX, Pilot lines

3. Test and characterization of PICs

Open standard test framework

Automated pre-package die tester

2 Salland Test Technology Symposium 2019

Photonics

The future of Digital Era


What is Photonics?

Electronics

electrons as basic carriers of information or energy

Photonics

photons as basic carriers of information or energy

• Photon energy (𝐸𝑝ℎ = ℎ ∙ 𝑓)

• zero mass (m=0), speed of light (v=c)• Photons excite electrons • carry over (part of) their energy to electrons • Electrons can “relax” exhaust energy as a photon.

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>100 Gb/s transmitter on single chip, fabricated in our powerful MPW platform

Micro electronic device

First Transistor

First solid state laser


Why integrated photonics?Micro electronics approach a ceiling in achievable performance

• Speed limitation – CMOS based micro electronics: 100 Gb/s• Power consumption (>50 pJ/bit) – total communication infrastructures >7% of total

electrical power (Netherlands 2018: >11% of total electrical power consumption*))

Photonics enables future performance requirements

• 2018: micro electronics technology realizes 100 Gb/s/channel• 2018: Photonics technology based demonstrator realizes data transport

159 Tb/s/fiber• 2021: Market demands 1 Tb/s/channel• 2025: Power constraint: <1 pJ/bit

Photonics technologies enable disruptive solutions

• Telecom, Datacom show exponential growth since 1990 (average growth rate: 1.7/year)

• new technologies: Preventive health cure and care, smart mobility, sustainable industry, internet of things, machine-to-machine communication, 5G network, …

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*) State of the Dutch Data Centers, Dutch Data Center Association, 2018


[Cisco]

Data centers

Photonic revolution in micro electronics industry

• Integrated photonics will join electronic devices and systems at demanding niches

• Telecom and datacom industry are forerunner

• Sensing is approaching in big steps

• Estimated total global economic value of Integrated Photonics:

>€ 600 billion by 2025 (expectations Nokia a.o., IPSR-I fall meeting, Boston, Nov 2018)

• Involvement of supply chain

• New production methods

• New business models

• Strong science/industry cooperation


Integrated photonics ecosystem

Photon Delta, JePPIX, Pilot lines


Integrated Photonics Ecosystem – Photon Delta


Research Development End UsersManufacturing

PITC

Knowledge institutions Technology R&D Manufacturing OEM, ODM, systems

One PIC ecosystem

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• A Platform for integrated photonics based solutions

• Funded with EUR 200 Mio+

InP and Triplex technologyFoundry services Packaging and assembly service Domain specific application centres

Knowledge Centres

PIC and PIC-powered modules ODM/vendors

Universities

Assembly/Packaging Foundries

PIC Foundries

Design Services

CITC

Tools providers

Ministerie van Economische Zaken

Sponsors/Investors

industry/technology associations


http://photonicsmanufacturing.org/about-ipsr

http://photonicsmanufacturing.org/about-ipsr

Technology casesEnablers of fastest time-to-market for innovative solutions in multiple markets

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State of the art (5 yrs ahead of competition) highly accurate sub-system for simultaneous high-frequency measurement of force, pressure, temperature and relative spatial position of distributed sensors over one/multiple optics fibre

Fiber Optics Sensing

World’s first subsystem, powered by dedicated proprietary Photonic integrated Circuits (PIC) and hybrid PIC packaging, for single/multiantenna optical-domain beamforming in double-digit GHz range wireless communications (e.g. 5G mobile access points or multi-point broadband satellites)

Photonics Beamforming

Dynamically Tunable Laser

State-of-the-art flexible low-cost low-power highly-integrated dynamically tunable lasers sub-systems with stable and high-resolution tuning in IR C-band

Synchronized multi-parameters bio-photonics sensing subsystem, powered by dedicated proprietary PIC and VCSEL + detector integration for a.o. food safety, precision farming; healthcare screening/monitoring

Bio-photonics sensing


https://photonics.lionix-international.com/worlds-first-integrated-optical-beamforming-network/

https://photonics.lionix-international.com/worlds-first-integrated-optical-beamforming-network/

https://www.phiconference.com/photonics/visible-light-chip-rules-the-waves/

https://www.phiconference.com/photonics/visible-light-chip-rules-the-waves/

JePPIX.eu

• PIC training since 2006• Open access MPW• Roadmap• Testing

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European Pilot Lines


Scaling productionOpen-access InP PICs

pixapp.eu

inpulse.jeppix.eu/

Development of PIC technologyOpen innovation

Assembly and Packaging Pilot lineOpen-access

one-stop-shop Access to photonics technology platforms

https://pixapp.eu/

https://www.inpulse.jeppix.eu/

Test and characterization of PICs

Open standard test framework

Automated pre-package die tester


Test processes in PIC production chain

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JePPIX Roadmap 2018 http://www.jeppix.eu/vision


http://www.jeppix.eu/vision

Role and importance of PIC testing• Identify known-good-die (KDG)

• Push the performance-yield envelope

• Create improved accuracy models for designers

• Testing is often a short-hand for

ValidationVerificationSelectionMeasurementCharacterization

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Chart based on data from a study of Erica R. H. Fuchs in IEEE JLT, vol. 24, No.8, 2006.

Ignazio Piacentini, Ficontec @ ECOC 2019:

„Validation: Do we make a right product?”

„Verification: Do we make a product right?”


Test intensity vs product maturity

Makoto Okano (AIST), Sylwester Latkowski(TU/e), IPSR-I 2019

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Beauty and the beast

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• Characterization is a ‘beauty’

– Delivers lots of data and information

– Good for low volume, MPW

– Essential for prototyping, R&D at a ‘startup-phase’ of a product

– Resource demanding, volume ‘unfriendly’

• Test is ‘the beast’

– Needs to be fast (s/test = $$$)

– Essential at early production stages (WLT)

– A must if volumes are considered seriously


Standard file formats

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• Meta data: both human and machine readable

• Open standards assure data interoperability, exchangeability and traceability

• Adheres to the FAIR data principles: findable, accessible, interoperable, reusable

• Enables an assembly process validation and optimization and feedback to EPDA

Outsourced Semiconductor Test and Assembly


Open standard test framework: openEPDA.org

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Hardware agnostic

• TU/e semi-auto tester

• ficonTEC tool

Open standards

• File formats

• Python implementation

User defined test sequence

High level of abstraction

• Data exchangeability..

• Experiment ↔ Model

S. Latkowski, et al., IEEE Journal of Selected Topics in Quantum Electronics, vol. 25, no. 5, pp. 1-8, Sept.-Oct. 2019,


Every circuit is different – but must we re-define our testing and kit every time?Often a complex sequence of measurements is required to understand performance

InP Tx and Rx PICs under test. Images courtesy of: S.Latkowski, K. Lawniczuk, W. Yao

Testing at the circuit level: does the PIC work?


ConventionsDie orientation

• East West North South

Fiducials

• Die positioning

• Automation

Port naming

• Optical

• Electrical

Allowed port locations

• Assembly

• Testing


Standard layouts: rationale (I)

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Standards can cover• IO locations• IO specifications• Chip dimensions• Pad sizes

Reduced set of parameters

• avoid unnecessary reinvention

Enable

• Automated pre-package die testing

• Standardization of test protocols

• Generic assembly and packaging


Standard layouts: rationale (II)

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Standards can cover• IO locations• IO specifications• Chip dimensions• Pad sizes

Reduced set of parameters

• avoid unnecessary reinvention

Enable

• Automated pre-package die testing

• Standardization of test protocols

• Generic assembly and packaging


Automated pre-package die test (I)

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@ TU/e @ ficonTEC


Automated pre-package die test (II)

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Repeatable < ±0.02 dB →< ±65 nm

• 64 source meters• 4 lensed fibers: 2 straight, 2 angled• 15 axis automated alignment

@ TU/e


SummaryStandardization framework

Standardized file formats

• Enables exchange of data between all stakeholders

• Prevents errors

Standardized circuit layout template

• Enables automated testing

• Prevents errors

• Easy packaging of prototypes

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https://www.inpulse.jeppix.eu/

https://pixapp.eu/

http://openpics.jeppix.eu/


[email protected] , [email protected]

Questions?

Thank you!

Documents

Test processes in PIC production chain: challenges and ... · >€ 600 billion by 2025 (expectations Nokia a.o., IPSR-I fall meeting, Boston, Nov 2018) •Involvement of supply chain