SystemC: IntroductionSystemC: Introduction

SystemCSystemC

A C++ based class library and design A C++ based class library and design environment for system-level design.environment for system-level design.

Suitable for functional description that might Suitable for functional description that might eventually be implemented as either HW or eventually be implemented as either HW or SW.SW.

Open standardOpen standard www.systemc.orgwww.systemc.org

Language ArchitectureLanguage Architecture

C++ Language Standard

Core LanguageModulePortsProcessesEventsInterfacesChannelsEvent-driven simulation kernel

Data types

Bits and bit-vectorsArbitrary precision integersFixed-point numbers4-valued logic types, logic-vectorsC++ user defined types

Elementary ChannelsSignal, Timer, Mutex, Semaphore, FIFO, etc

Channels for MoCsKahn process networks, SDF, etc

Methodology-specific ChannelsMaster/Slave library

GlossaryGlossary ModuleModule

Basic building block for structural partitioningBasic building block for structural partitioning Contains ports, processes, dataContains ports, processes, data Other modulesOther modules

ProcessProcess Basic specification mechanism for functional Basic specification mechanism for functional

descriptiondescription Three typesThree types

• sc_method : sensitive to some ports/signals, no wait sc_method : sensitive to some ports/signals, no wait statementsstatements

• sc_thread: sensitive to some ports/signals with wait sc_thread: sensitive to some ports/signals with wait statementsstatements

• sc_cthread: sensitive to only clocksc_cthread: sensitive to only clock

GlossaryGlossary InterfaceInterface

A set of operations for communicationA set of operations for communication No specification about the actual implementationNo specification about the actual implementation For example, a signal supports read and write For example, a signal supports read and write

operationsoperations PortPort

Explicit objects for inter-module communicationExplicit objects for inter-module communication Each port object specifies the interface for Each port object specifies the interface for

communicationcommunication ChannelChannel

An implementation of the interface operationsAn implementation of the interface operations Performs the actual data transferPerforms the actual data transfer Vary from signals to complex protocols.Vary from signals to complex protocols.

ModuleModule Module is the basic building block in SystemCModule is the basic building block in SystemC SystemC has a macro for convenient module definitionSystemC has a macro for convenient module definition

Macro name : SC_MODULEMacro name : SC_MODULE Macro implements C++ class inheritanceMacro implements C++ class inheritance

SC_MODULE(adder) {// ports, processes, internal data

};

struct adder: SC_MODULE {// ports, processes, internal data

};

Module constructorModule constructor Module constructor also defined with another macroModule constructor also defined with another macro

Macro name : SC_CTORMacro name : SC_CTOR SC_CTOR must have module name as an argumentSC_CTOR must have module name as an argument

SC_MODULE(adder) {// ports, processes, internal dataSC_CTOR(adder) {

// body of constructor// process declaration, sensitivities etc

}};

Module constructorModule constructor User can also define own constructorUser can also define own constructor

Must include SC_HAS_PROCESS macro to define processesMust include SC_HAS_PROCESS macro to define processes

SC_MODULE(adder) {// ports, processes, internal dataSC_HAS_PROCESS(adder);adder(sc_module_name name; int other_param): sc_module(name){

// body of constructor// process declaration, sensitivities etc

}};

InterfaceInterface

Consists of a set of operationsConsists of a set of operations Specifies only the signature of an operationSpecifies only the signature of an operation

name, parameter, return valuename, parameter, return value

All SystemC interfaces derived from sc_interfaceAll SystemC interfaces derived from sc_interface Contains a virtual function called register_port()Contains a virtual function called register_port()

• Connects a port to a channel through the interfaceConnects a port to a channel through the interface• Arguments: port object and type name of the interface that port Arguments: port object and type name of the interface that port

acceptsaccepts

InterfaceInterface

HW signal interfacesHW signal interfaces sc_signal_in_if<T>sc_signal_in_if<T>

• Contains virtual function read()Contains virtual function read()• read() returns a constant reference to T such that value may be read() returns a constant reference to T such that value may be

readread sc_signal_inout_if<T>sc_signal_inout_if<T>

• Derived from sc_signal_in_if<T>Derived from sc_signal_in_if<T>• Contains virtual function write()Contains virtual function write()• write() takes as input a constant reference to T write() takes as input a constant reference to T

HW signal interfaces provide the functions that are HW signal interfaces provide the functions that are implemented by channelimplemented by channel

PortPort

Ports provide the well-defined boundaries Ports provide the well-defined boundaries through which the module interactsthrough which the module interacts Implicit interfaces such a global variable must be Implicit interfaces such a global variable must be

avoidedavoided Ports specify the interface that it uses through Ports specify the interface that it uses through

a template parametera template parameter All ports are derived from sc_port_base classAll ports are derived from sc_port_base class

PortPort

SystemC provides a template class for creating portsSystemC provides a template class for creating ports

template <class IF, int N = 1>class sc_port: ……// class derivation details omitted { public :

IF* operator->();// other member functions and member variables

};

““IF” denotes the interface classIF” denotes the interface class N is the number of interfaces attached to the portN is the number of interfaces attached to the port

Default value of 1 Default value of 1

PortPort

Most prominent member of sc_port is operator->()Most prominent member of sc_port is operator->() Returns a pointer to the interfaceReturns a pointer to the interface Any interface method can be invoked through the portAny interface method can be invoked through the port read() and write() below are interface method callsread() and write() below are interface method calls

sc_port<sc_signal_inout_if<int> > p;……x = p->read();…..p->write(y);

PortPort

User can derive specialized ports from User can derive specialized ports from sc_port classsc_port class Signal ports are provided by SystemCSignal ports are provided by SystemC

template<class T>class sc_in : public sc_port<sc_signal_in_if<T> > …;

template<class T>class sc_inout : public sc_port<sc_signal_inout_if<T> > …;

Port and ModulePort and Module

SC_MODULE(adder) {sc_in<int> a;sc_in<int> b;sc_out<int> c;// processes, etcSC_CTOR(adder) {

// body of constructor// process declaration, sensitivities etcc.initialize(0);

}};

ChannelChannel

Port and Interface describe the functions Port and Interface describe the functions available in the communication packageavailable in the communication package

Channel defines the implementation of the Channel defines the implementation of the communication functionscommunication functions

Channel is derived from the interfaceChannel is derived from the interface It implements the interface if it defines all the interface It implements the interface if it defines all the interface

functionsfunctions More than one Channel might implement that More than one Channel might implement that

same interface in different wayssame interface in different ways A Channel might implement more than one A Channel might implement more than one

interfaceinterface

ChannelChannel

SystemC provides forSystemC provides for Primitive channelsPrimitive channels Hierarchical channelsHierarchical channels

Primitive channelPrimitive channel Examples: sc_signal, sc_mutex, sc_fifoExamples: sc_signal, sc_mutex, sc_fifo

Hierarchical channelHierarchical channel User defined channelsUser defined channels

Channel and InterfaceChannel and Interfacetemplate <class T> class sc_signal_in_if

: virtual public sc_interface{ public:

// get the value changed eventvirtual const sc_event& value_changed_event() const = 0;// read current valuevirtual const T& read const() = 0;

};

template <class T> class sc_signal_inout_if: virtual public sc_signal_in_if

{ public:

// write the new valuevirtual void write(const T&) = 0;

};

Channel and InterfaceChannel and Interfacetemplate <class T> class sc_signaltemplate <class T> class sc_signal

:public sc_signal_inout_if<T>,:public sc_signal_inout_if<T>, public sc_prim_channelpublic sc_prim_channel

{{ public:public:

//get the default event//get the default eventvirtual const sc_event& default_event() constvirtual const sc_event& default_event() const{ return m_value_changed_event;}{ return m_value_changed_event;}

virtual const sc_event& value_changed_event() constvirtual const sc_event& value_changed_event() const{ return m_value_changed_event;}{ return m_value_changed_event;}

virtual const T& read() constvirtual const T& read() const{ return m_cur_val;}{ return m_cur_val;}

virtual void write(const T& value_)virtual void write(const T& value_){{ m_new_value = value_;m_new_value = value_; if ( ! (m_new_val == m_cur_val)) request_update();if ( ! (m_new_val == m_cur_val)) request_update();}}

Channel and InterfaceChannel and Interface protected:protected:

//get the default event//get the default event

virtual void update()virtual void update()

{{

if ( ! (m_new_val == m_cur_value)) {if ( ! (m_new_val == m_cur_value)) {

m_cur_value = m_new_value;m_cur_value = m_new_value;

m_value_changed_event.notify(SC_ZERO_TIME);m_value_changed_event.notify(SC_ZERO_TIME);

}}

}}

T m_cur_valu;T m_cur_valu;

T m_new_val;T m_new_val;

sc_event m_value_changed_event;sc_event m_value_changed_event;

};};

ChannelChannel

Writing process calls write(const &T) method of the Writing process calls write(const &T) method of the channelchannel

write(const &) stores the value in m_new_valuewrite(const &) stores the value in m_new_value Calls request_update() if new value different from previousCalls request_update() if new value different from previous

request_update() informs the SystemC schedulerrequest_update() informs the SystemC scheduler Change the value of the signal once the current cycle is over.Change the value of the signal once the current cycle is over.

At the end of the simulation cycleAt the end of the simulation cycle Schedule calls update() to change the value of the signalSchedule calls update() to change the value of the signal

update() calls m_value_changed_event.notify() if new update() calls m_value_changed_event.notify() if new value different from currentvalue different from current

Event notification causes the read process to be resumed in the Event notification causes the read process to be resumed in the following simulation cyclefollowing simulation cycle

ProcessProcess

Basic unit of functionality in SystemCBasic unit of functionality in SystemC Process is contained in a moduleProcess is contained in a module

Described as a member functionDescribed as a member function Not all member functions are processesNot all member functions are processes

Process member function should be registered Process member function should be registered with the simulation kernelwith the simulation kernel Registration is via a declaration in the module Registration is via a declaration in the module

constructorconstructor

Process and ModuleProcess and Module

SC_MODULE(adder) {sc_in<int> a;sc_in<int> b;sc_out<int> c;

void compute() { c = a + b;}

SC_CTOR(adder) {SC_METHOD(compute);sensitive << a << b;c.initialize(0);

}};

ProcessProcess

Two basic kinds of processesTwo basic kinds of processes SC_METHODSC_METHOD SC_THREADSC_THREAD

• SC_CTHREADSC_CTHREAD

SC_METHODSC_METHOD Always executes its body from beginning to end and Always executes its body from beginning to end and

returnsreturns Does not maintain an implicit execution stateDoes not maintain an implicit execution state States if required is maintained via module variablesStates if required is maintained via module variables