1

GRAPHICS CARDS Radeon R7 240 2GD3 LP © 2020 Micro-Star Int'l Co.Ltd. MSI is a registered trademark of Micro-Star Int'l Co.Ltd. All rights reserved. SPECIFICATIONS Graphics Engine AMD Radeon R7 240 Bus Standard PCI Express x16 3.0 Memory Size(MB) 2048 Memory Interface 128 bits Core Clock Speed(MHz) 730, Boost Clock: 780 Memory Clock Speed(MHz) 1800 Maximum Displays 2 Multi-GPU Technology CrossFire (SW) Power consumption (W) 35 HDCP Support Y Recommended Power Supply (W) 400 DirectX Version Support 11.2 OpenGL Version Support 4.3 Card Dimension(mm) 144x69x33mm Weight 194g FEATURES Generated 2020-12-04, check for the latest version www.msi.com/datasheet. The information provided in this document is intended for informational purposes only and is subject to change without notice.

Radeon R7 240 2GD3 LP · 2020. 12. 4. · Bus Standard PCI Express x16 3.0 Memory Size(MB) 2048 Memory Interface 128 bits Core Clock Speed(MHz) 730, Boost Clock: 780 Memory Clock

Download PDF Report

Upload
others
View
0
Download
0

Embed Size (px)

Citation preview

G R A P H I C S C A R D S

Radeon R7 240 2GD3 LP

© 2020 Micro-Star Int'l Co.Ltd. MSI is a registered trademark of Micro-Star Int'l Co.Ltd. All rights reserved.

SPECIFICATIONSGraphics Engine AMD Radeon R7 240Bus Standard PCI Express x16 3.0Memory Size(MB) 2048Memory Interface 128 bitsCore Clock Speed(MHz) 730, Boost Clock: 780Memory Clock Speed(MHz) 1800Maximum Displays 2Multi-GPU Technology CrossFire (SW)Power consumption (W) 35HDCP Support YRecommended Power Supply (W) 400DirectX Version Support 11.2OpenGL Version Support 4.3Card Dimension(mm) 144x69x33mmWeight 194g

FEATURES

Gene

rate

d 20

20-1

2-04

, che

ck fo

r the

late

st v

ersio

n w

ww

.msi.

com

/dat

ashe

et. T

he in

form

atio

n pr

ovid

ed in

this

docu

men

t is

inte

nded

for i

nfor

mat

iona

l pur

pose

s on

ly a

nd is

sub

ject

to c

hang

e w

ithou

t not

ice.

SenNet - Satel Iberia...RAM memory 512 MB eMMC (SO) memory 2 GB / 4 GB Card slot (micro-SD) form memory expansion Internal battery (up to 45 min) RTC (real time clock) Internal energy

SenNet - Satel Iberia...RAM memory 512 MB eMMC (SO) memory 2 GB / 4 GB Card slot (micro-SD) form memory expansion Internal battery (up to 45 min) RTC (real time clock) Internal energy

Documents

Some downloaded files may be BookSurfing Reinstall battery ... · Memory Card files Memory Card may not be properly formatted. Use 941SH-formatted Memory Cards. Clock settings are

Some downloaded files may be BookSurfing Reinstall battery ... · Memory Card files Memory Card may not be properly formatted. Use 941SH-formatted Memory Cards. Clock settings are

Documents

ECE518 Memory/Clock Synchronization IC Design Integer-N ... Synthesizers.pdf · Department of Electrical and Computer Engineering © Vishal Saxena-1- ECE518 Memory/Clock Synchronization

ECE518 Memory/Clock Synchronization IC Design Integer-N ... Synthesizers.pdf · Department of Electrical and Computer Engineering © Vishal Saxena-1- ECE518 Memory/Clock Synchronization

Documents

The Memory Hierarchy - City University of New YorkC SCI 360 Computer Architecture 3 Prof. Stewart Weiss The Memory Hierarchy The Memory Hierarchy Review of Basics Clocks A clock is

The Memory Hierarchy - City University of New YorkC SCI 360 Computer Architecture 3 Prof. Stewart Weiss The Memory Hierarchy The Memory Hierarchy Review of Basics Clocks A clock is

Documents

Cyclone IV GX Transceiver Starter Board Reference Manual · such as clock select, SMA clock input control, and which image to load from flash memory at power-up. This switch is located

Cyclone IV GX Transceiver Starter Board Reference Manual · such as clock select, SMA clock input control, and which image to load from flash memory at power-up. This switch is located

Documents

Some downloaded files may be BookSurfing Reinstall battery. … · 2016-09-08 · Memory Card files Memory Card may not be properly formatted. Use 932SH-formatted Memory Cards. Clock

Some downloaded files may be BookSurfing Reinstall battery. … · 2016-09-08 · Memory Card files Memory Card may not be properly formatted. Use 932SH-formatted Memory Cards. Clock

Documents

FM25Q08 8M-BIT SERIAL FLASH MEMORY · 2015-05-15 · Datasheet FM25Q08 8M-BIT SERIAL FLASH MEMORY Ver 1.1 5 6. Pin Descriptions Serial Clock (CLK): The SPI Serial Clock Input (CLK)

FM25Q08 8M-BIT SERIAL FLASH MEMORY · 2015-05-15 · Datasheet FM25Q08 8M-BIT SERIAL FLASH MEMORY Ver 1.1 5 6. Pin Descriptions Serial Clock (CLK): The SPI Serial Clock Input (CLK)

Documents

Introducing the EVGA SC17 Gaming, the apex of portable ... · Memory clock: This is the frequency your system RAM is running at. The default speed is 2666MHz Memory Voltage: This

Introducing the EVGA SC17 Gaming, the apex of portable ... · Memory clock: This is the frequency your system RAM is running at. The default speed is 2666MHz Memory Voltage: This

Documents

18: Distributed Coordination 1 DISTRIBUTED COORDINATION Definitions: Tightly coupled systems: Same clock, usually shared memory. Communication is via this

18: Distributed Coordination 1 DISTRIBUTED COORDINATION Definitions: Tightly coupled systems: Same clock, usually shared memory. Communication is via this

Documents

Chapter 5 - Internal Memory - ULisboaweb.ist.utl.pt/.../Chapter5-InternalMemory.pdf• CPU is synchronized by its own clock pulses; • Control signals are employed for memory read

Chapter 5 - Internal Memory - ULisboaweb.ist.utl.pt/.../Chapter5-InternalMemory.pdf• CPU is synchronized by its own clock pulses; • Control signals are employed for memory read

Documents

DSC-H300 | Cyber-shot User GuideEmpty Music Eye-Fi Power Save Memory Card Tool/Internal Memory Tool Format Create REC.Folder Change REC.Folder Delete REC.Folder Copy File Number Clock

DSC-H300 | Cyber-shot User GuideEmpty Music Eye-Fi Power Save Memory Card Tool/Internal Memory Tool Format Create REC.Folder Change REC.Folder Delete REC.Folder Copy File Number Clock

Documents

Data Sheet - Advantechwfcache.advantech.com/.../gfx-n3a1-71fsa1_Datasheet.pdfGraphics Clock (MHz) 810 810 Processor Clock (MHz) 1620 1620 Texture Fill Rate (billion/sec) 6.5 6.5 Memory

Data Sheet - Advantechwfcache.advantech.com/.../gfx-n3a1-71fsa1_Datasheet.pdfGraphics Clock (MHz) 810 810 Processor Clock (MHz) 1620 1620 Texture Fill Rate (billion/sec) 6.5 6.5 Memory

Documents

Memory Techniques - stephengriffin.org · how good is your memory? test 1: words tree time face pipe clock mouse engine planet thunder necklace wardrobe caterpillar garden picture

Memory Techniques - stephengriffin.org · how good is your memory? test 1: words tree time face pipe clock mouse engine planet thunder necklace wardrobe caterpillar garden picture

Documents

OS09: Virtual Memory II · Clock, demand paging is assumed; the arrow shows the pointer position, and * indicates a use-bit of 1. Let's see how Clock works. Consider the 6th page

OS09: Virtual Memory II · Clock, demand paging is assumed; the arrow shows the pointer position, and * indicates a use-bit of 1. Let's see how Clock works. Consider the 6th page

Documents

Memory HierarchyMemory).pdfMemory Hierarchy in Real Computers (2) • Main memory • Good sized: perhaps 232x8 = 4 GB, perhaps more • Access time: 100-1000 clock cycles • However

Memory HierarchyMemory).pdfMemory Hierarchy in Real Computers (2) • Main memory • Good sized: perhaps 232x8 = 4 GB, perhaps more • Access time: 100-1000 clock cycles • However

Documents

CDCE62005 3:5 Clock Generator, Jitter Cleaner with ... · PDF fileSerDes Cleaned Clock Data DSP CDCE62005 Recovered Clock DSP Clock ADC Clock ADC Clock DAC Clock Product Folder Sample

CDCE62005 3:5 Clock Generator, Jitter Cleaner with ... · PDF fileSerDes Cleaned Clock Data DSP CDCE62005 Recovered Clock DSP Clock ADC Clock ADC Clock DAC Clock Product Folder Sample

Documents

MS_uC / dnd / V08 2- 1 ARM966E-Mem-JTAG-Clock Programming Microcontroller ARM966E-S specifications: Memory – JTAG - Clock Autumn term 2007 32K Byte Burst

MS_uC / dnd / V08 2- 1 ARM966E-Mem-JTAG-Clock Programming Microcontroller ARM966E-S specifications: Memory – JTAG - Clock Autumn term 2007 32K Byte Burst

Documents

ECM196 - Embed · 2019. 11. 11. · Microprocessor Infineon Tricore TC1793 Clock Speed 200/260MHz Environmental IP6k9k Compliant Operating Temp -40°C to +105°C Memory Segments Memory

ECM196 - Embed · 2019. 11. 11. · Microprocessor Infineon Tricore TC1793 Clock Speed 200/260MHz Environmental IP6k9k Compliant Operating Temp -40°C to +105°C Memory Segments Memory

Documents

GT 710 2GD3 LPGRAPHICS CARD GT 710 2GD3 LP © 2020 Micro-Star Int'l Co.Ltd. MSI is a registered trademark of Micro-Star Int'l Co.Ltd. All rights reserved. SPECIFICATIONS

GT 710 2GD3 LPGRAPHICS CARD GT 710 2GD3 LP © 2020 Micro-Star Int'l Co.Ltd. MSI is a registered trademark of Micro-Star Int'l Co.Ltd. All rights reserved. SPECIFICATIONS

Documents

MS20 GPS Receiver User Manual - semiconductorstore.comGPS Baseband Processor Main Clock Memory Flash Interface 8MBit GPS IF Interface GPS RF Front End & LNA TCXO MS20 RTC Clock 32

MS20 GPS Receiver User Manual - semiconductorstore.comGPS Baseband Processor Main Clock Memory Flash Interface 8MBit GPS IF Interface GPS RF Front End & LNA TCXO MS20 RTC Clock 32

Documents

Deterministic Concurrency: A Clock-Synchronised Shared ... · Deterministic Concurrency: A Clock-Synchronised Shared Memory Approach

Deterministic Concurrency: A Clock-Synchronised Shared ... · Deterministic Concurrency: A Clock-Synchronised Shared Memory Approach

Documents

Minimum System Requirements Clock Generator Memory Interfacing

Minimum System Requirements Clock Generator Memory Interfacing

Documents

3. Memory Blocks in Cyclone IV Devices · 8,192 memory bits per block ... Two clock-enable control signals for each port (port A and port B) Initialization file to pre-load memory

3. Memory Blocks in Cyclone IV Devices · 8,192 memory bits per block ... Two clock-enable control signals for each port (port A and port B) Initialization file to pre-load memory

Documents

Memory Performance at Reduced CPU Clock Speeds: An ... · Memory Performance at Reduced CPU Clock Speeds: ... this benchmark to determine the read bandwidth ... for Sandy Bridge-HE

Memory Performance at Reduced CPU Clock Speeds: An ... · Memory Performance at Reduced CPU Clock Speeds: ... this benchmark to determine the read bandwidth ... for Sandy Bridge-HE

Documents

VCCI TEST REPORT For ASUSTeK COMPUTER INC ......Graphics ： Integrated Gfx in North bridge: H81 GPU clock range:1100-1250(by CPU) Default clock:200-350(by CPU) Max UMA Memory Size:

VCCI TEST REPORT For ASUSTeK COMPUTER INC ......Graphics ： Integrated Gfx in North bridge: H81 GPU clock range:1100-1250(by CPU) Default clock:200-350(by CPU) Max UMA Memory Size:

Documents

External Memory PHY Interface (ALTMEMPHY) (nonAFI ...€¦ · DQ, DQS, address, and memory clock pins. Memory initialization options—These settings are stored in the memory mode

External Memory PHY Interface (ALTMEMPHY) (nonAFI ...€¦ · DQ, DQS, address, and memory clock pins. Memory initialization options—These settings are stored in the memory mode

Documents

Memory Subsystems, SRAM,DRAM, Memory Compiler,Clock, Latency,Flip Flops, Latches

Memory Subsystems, SRAM,DRAM, Memory Compiler,Clock, Latency,Flip Flops, Latches

Documents

AAbbssoolluuttee SSiilleenntt iinn GGaammiinngg!!!! · OpenGL OpenGL® 4.4 Video Memory 2GB GDDR5 GPU boost Clock OC Mode : 1317 MHz Gaming Mode: 1291 MHz GPU base Clock OC Mode :

AAbbssoolluuttee SSiilleenntt iinn GGaammiinngg!!!! · OpenGL OpenGL® 4.4 Video Memory 2GB GDDR5 GPU boost Clock OC Mode : 1317 MHz Gaming Mode: 1291 MHz GPU base Clock OC Mode :

Documents

Memory; Sequential & Clocked Circuits; Finite State Machines...(aka Clocked Sequential Circuit) CLOCK INPUTS Combinational Circuit Memory (flip flops) Shorthand Combinational Circuit

Memory; Sequential & Clocked Circuits; Finite State Machines...(aka Clocked Sequential Circuit) CLOCK INPUTS Combinational Circuit Memory (flip flops) Shorthand Combinational Circuit

Documents

PM0059 Programming manual - st.com · Flash memory interface PM0059 8/29 DocID15687 Rev 5 2.4 Read interface 2.4.1 Relation between CPU clock frequency and Flash memory read time

PM0059 Programming manual - st.com · Flash memory interface PM0059 8/29 DocID15687 Rev 5 2.4 Read interface 2.4.1 Relation between CPU clock frequency and Flash memory read time

Documents