On-Chip Inductance Extraction

- Concept & Formulae –

2002. 3

Hyungsuk Kim

hyungsuk@cae.wisc.edu

OutLine Introduction – On-Chip Inductance Loop Inductance and Partial Inductance Closed Forms of Inductance Formulae

Self Inductance Formulae- Hoer, FastHenry, Ruehli, Grover

Mutual Inductance Formulae- Hoer (FastHenry), Ruehli, Grover

Computational Results Conclusion

Introduction – On-Chip Inductance As the clock frequency grows fast, the reactance becomes

larger for on-chip interconnectionsZ = R + jwL w is determined not by clock frequency itself but by clock

edge

w ~ 1/(rising time)

More layers are applied, wider conductors are used Wide conductor => low resistance

Multiple layer interconnections make complex return loops Inductance is defined in the closed loop in EM

Loop Inductance

jkifIforI

L kj

ijij 0

i a

iiiji

ij

i

dadlAa1

Loop inductance is defined as the induced magnetic flux in the loop by the unit current in other loop

where, represents the magnetic flux

in loop i due to a current Ij in loop j

ijLoop i Loop j

Ij

ij

The average magnetic flux can be calculated by magnetic vector potential Aij

ij

where, ai represents a cross section of loop i

Loop Inductance (cont’d)

j a ij

jj

j

jij

jrdadl

aI

A4

jconductorofareacrossa

jconductorofelementdl

rrrwhere

j

j

jiij

:

:

,

i a j a

jiij

ji

jiij

i j

dadar

dldlaa

L 14

The magnetic vector potential A, defined by B = A, has an integral form

So, loop inductance is

Partial Inductance Problems of loop inductance

The loops (called return paths) are hardly defined explicitly in VLSI

In most cases, the return paths are multiple

Partial inductance proposed by A. Ruehli The return path is assumed at infinite

for each conductor segment It can be directly appliable to circuit simulator like SPICE

1

2

3

4

5

Partial Inductance (cont’d)

K

k

c

bi

k

k1

K

k

M

m a a

c

b

c

bmk

km

mk

mkij

k m

k

k

m

m

dadar

dldlaa

L1 1

14

M

m

c

bj

m

m1

(assume loop i consists of K segments and loop j does M segments)So, loop inductance is

i a j a

jiij

ji

jiij

i j

dadar

dldlaa

L 14

Loop inductance between loop i and j is

Partial Inductance (cont’d)

k m

k

k

m

m

km

a a

c

b

c

bmk

km

mk

mkP dada

rdldl

aaL ||1

4

K

k

M

mPkmij km

LSL1 1

Definition of partial inductance

The sign of partial inductance is not considered So, partial inductance is solely dependent of conductor geometry

Sign rule for partial inductance

where, Skm = +1 or –1

The sign depends on the direction of current flow in the conductors

Geometry and Formulae Conductor Geometry

Inductance Formulae Self Inductance : Grover(1962), Hoer(1965), Ruehli(1972),

FastHenry(1994) Mutual Inductance : Grover(1962), Hoer(FastHenry)(1965), Ruehli(1972)

x z

Dx

Dy

Dz

y

Conductor 1 Conductor 2

T

W

l

(a) Single Conductor (b) Two Parallel Conductors

Self Inductance Grover’s Formula

e

TWl

lL

ei

ii log212ln002.0

l

TWTW

llL

i

ii )(2235.0212ln002.0

T/W logee T/W logee T/W logee T/W logee

0 0 0.2 0.00249 0.5 0.00211 0.8 0.00181

0.05 0.00146 0.3 0.00244 0.6 0.00197 0.9 0.00178

0.1 0.00210 0.4 0.00228 0.7 0.00187 1.0 0.00177

Grover 2(without table)

Self Inductance (cont’d)

Hoer’s Formula

)()()(tan6

tan6

tan6

333601ln

24244

ln24244

ln24244

008.0

000

222

13

222

13

222

13

222222222444

22

2224422

22

2224422

22

2224422

22

zyxzyxx

yzyzx

zyxy

xzzxy

zyxz

xyxyz

zyxxzzyyxzyxyx

zyxzzyxyx

xz

zyxyyzxxz

zy

zyxxxzyzy

TWL

lTW

ii

2

1

2

1

2

1

1 ),,()1()()()(),,(1

2

1

2

1

2i j k

kjikji

s

s

r

r

qq srqfzyxzyxfwhere

Self Inductance (cont’d)

Ruehli’s Formula

3142

3

63

3

51

2

3

4314222412712

4

17

4

16

4

12

542

2

2

73

2

34

2

6252

2

60ln

24

1ln242060

11601

20ln

241

tan61

4tan

64tan

64201

60ln

2460ln

2411ln

242

AuAAuAu

Au

Au

AuAAuAAu

Au

AAuAAu

AuA

AuAu

uAuAuAA

u

Au

AAuAAu

AAu

AAul

L

i

ii

2

47

1

46

3

45

224

223

22

21

lnln1ln1

11

AAuA

AAA

AAAuA

uAAuAWT

Wlu

.1111ln311ln36

23

32

34

222

uu

uuu

uuuu

lL

i

ii

where

If T/W < 0.01

Self Inductance (cont’d)

FastHenry’s Formula

aratarawarraratatawawaratawar

arawawwwrrarwawwrar

aratatttrrartattrar

arwt

tw

artw

wt

artw

tw

aratawwt

wtarawattw

twarawrwt

tw

aratrtw

wt

arrawwt

tw

arrattw

wt

rawt

tatw

wLii

111201

))(1)(1)(()1(

))()()(()(

))()()(()(

601tantantan1

61

)(sinh1

)(sinh1

)(sinh

)(sinh

)(sinh

)(sinh

2411sinhsinh1sinh1

412

2

2111

21

2

21

2

21

2

221

2

2

12

12

111

111 2222

22

twartatwaw

twrlTt

lWwwhere

Comparisons of Self Inductance

Formula Short Conductor(l/W < 10)

Medium Conductor

(10 < l/W < 1000)

Long Conductor(l/W > 1000)

Hoer O O X

FastHenry O O O

Ruehli X O X

Ruehli (T=0) O (30% larger)(T/W < 0.01)

O(T/W < 0.01)

O(T/W < 0.01)

Grover X O O

Grover2 X O O

Mutual Inductance Ruehli’s Formula

Grover’s Formula (single filament)

4

1

22221 ln14 m

mmmmm

i

ij rgrggglL

22222222

1111 sinhsinhsinhsinh001.0

dddd

ddddLij

where pgvpgvpgpgl

DyDxr

lDzp

ll

viii

j

4321

22

11

mlmlxxx 1lnsinh 21where

Mutual Inductance (cont’d)

Hoer’s Formula (multiple filaments)

)()()(tan6

tan6

tan6

333601ln

24244

ln24244

ln24244

001.0

21

12

21

12

21

12

,

,

,

,

,

,

222

13

222

13

222

13

222222222444

22

2224422

22

2224422

22

2224422

2121

zyxzyxx

yzyzx

zyxy

xzzxy

zyxz

xyxyz

zyxxzzyyxzyxyx

zyxzzyxyx

xz

zyxyyzxxz

zy

zyxxxzyzy

TTWWL

lDlD

DllD

TDTD

DTTD

WDWD

DWWD

ij

zz

zz

xx

xx

yy

yy

where

4

1

4

1

4

1

1,

,

,

,

,, ),,()1()()()(),,(

31

42

31

42

31

42i j k

kjikji

ss

ss

rr

rr

qqqq srqfzyxzyxf

Conclusion On-Chip inductance becomes a troublemaker in high-

performance VLSI design Higher clock frequency, wide interconnections, complex

return paths The concept of partial inductance is useful in VLSI area

Not related to the return path Only dependent of geometry

Several inductance formulae are in hand but they have Different computational complexities Different applicable ranges according to the geometry