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Characterizing Flash Memory:
Beyond the Datasheet
Laura M. Grupp*, Adrian M. Caulfield*, Joel Coburn*, Eitan Yaakobi†, Steven Swanson*, Paul H. Siegel†
*Non-volatile Systems Laboratory, Department of Computer Science and Engineering†Center for Magnetic Recording ResearchJacob’s School of EngineeringUniversity of California, San Diego
2
Possible Applications
• Flash Translation Layers (FTLs)
• Operating System control
• Data encodings
• Heterogeneous SSD
• Data retention time
3
Test Setup
• Custom-Built Daughter Board
• Xilinx XUP Board
• Full-fledge Linux
• Kernel module
EraseRead
ProgramRead
Repeat 10x Lifetime
4
The Test Subjects
Chip Name
Manufacturer Capacity(GB)
Page Size (B)
Pages/Block
Block/Plane
Planes/Die
Dies
A-SLC2 A 2 2048 64 1024 2 1
A-SLC4 A 4 2048 64 4096 1 1
A-SLC8 A 8 2048 64 4096 2 1
B-SLC2 B 2 2048 64 2048 1 1
B-SLC4 B 4 2048 64 2048 2 1
E-SLC8 E 8 2048 64 4096 1 2
B-MLC8 B 8 2048 128 4096 1 1
B-MLC32 B 32 4096 128 2048 2 2
C-MLC64 C 64 8192 128 4096 1 2
D-MLC32 D 32 4096 128 4096 1 2
E-MLC8 E 8 4096 128 1024 1 2
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The Tests
Quantify known complexities, look for new ones
• Performance
• Energy Efficiency
• Reliability
6
The Tests
Quantify known complexities, look for new ones
• Performance
• Energy Efficiency
• Reliability
7
Operation Latency
0
20
40
60
80
100
120
140
A-S
LC2
A-S
LC4
A-S
LC8
B-S
LC2
B-S
LC4
E-SL
C8
B-M
LC8
B-M
LC3
2
C-M
LC6
4
D-M
LC3
2
E-M
LC8
Re
ad T
ime
(µs)
-500
1,000 1,500 2,000 2,500 3,000 3,500 4,000 4,500
A-S
LC2
A-S
LC4
A-S
LC8
B-S
LC2
B-S
LC4
E-SL
C8
B-M
LC8
B-M
LC3
2
C-M
LC6
4
D-M
LC3
2
E-M
LC8
Eras
e T
ime
(µs)
-
500
1,000
1,500
2,000
2,500
A-S
LC2
A-S
LC4
A-S
LC8
B-S
LC2
B-S
LC4
E-SL
C8
B-M
LC8
B-M
LC3
2
C-M
LC6
4
D-M
LC3
2
E-M
LC8
Pro
gram
Tim
e(µ
s)
8
Program Speed Anomaly
0 1 2 3 4 5 6 7 8 9 … 118 119 120 121 122 123 124 125 126 127
…
Page #:
-
500
1,000
1,500
2,000
2,500
Pro
gram
Tim
e (
s)
Fast 50% of Pages
Slow 50% of Pages
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Variation-Aware FTLs
• Can now embellish existing FTLs
• Page based FTL from MSR [Birrell et. al., 2005]
– “High priority” == write to fast page
– “Low priority” == any page
• Effects of Skipping slow pages
– Lower latency when it matters
– Increased wear
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Improving Paging Latency
• Paging out Virtual Memory
– 5-20% of total accesses
– High Priority
• Goal: reduce swap latency
• Side effect: Increased Wear
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Results
• Swap Writes: 1.5x faster
• Wear increased by only 3%
0
0.2
0.4
0.6
0.8
1
1.2
1.4
Build DeskDev Financial Average
No
rmal
ize
d R
esp
on
se T
ime
Baseline Writes Swap Writes
12
The Tests
Quantify known complexities, look for new ones
• Performance
• Energy Efficiency
• Reliability
13
Power
Operation SLC MLC
Read 15.8 – 54.5 mW 10.6 – 123.5 mW
Program 32.8 – 88.5 mW 15.2 – 141.3 mW
Erase 18.3 – 50.3 mW 26.7 – 112.3 mW
Idle 1.9 – 17.7 mW 8.2 – 27.5 mW
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Programming Energy
0
20
40
60
80
100
120
140
160
180
200
B-MLC32 B-MLC8 C-MLC64 D-MLC32 E-MLC8
Pro
gram
En
erg
y (μ
J)
Fast 50% of Pages
Slow 50% of Pages
Pages have
• Similar power
• Dissimilar latencies
15
The Tests
Quantify known complexities, look for new ones
• Performance
• Energy Efficiency
• Reliability
16
0.0E+00
1.0E-07
2.0E-07
3.0E-07
4.0E-07
0 2000 4000 6000 8000 10000 12000 14000
Bit
Err
or
Rat
e (
%)
Program/Erase Cycles
C-MLC64
D-MLC32
B-MLC32
E-MLC8
B-MLC8
Error Rates
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Program Disturb - Procedure
Procedure:
Erase Block
Repeat:
Program Each Page
Use 0’s on half of one page
11111111111111111
11111111111111111
11111111111111111
00000000111111111
11111111111111111
11111111111111111
11111111111111111
11111111111111111
11111111111111111
11111111111111111
11111111111111111
00000000111111111
11111111111111111
11111111111111111
11111111111111111
11111111111111111
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Program Disturb - Results
• SLC: no errors for at least one reprogram
• MLC: errors for reprograms of certain pages
0 1 2 3 4 5 6 7 …
…
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Write-Once Memory (WOM) Codes
Reprogram
Write-Once Memory
1. 01110110
2. 10000111
Logical Bits
First Generation
SecondGeneration
00 111 000
01 110 001
10 101 010
11 011 100
Physical 110 011 110 101 1st Gen.
Physical 010 000 110 100 2nd Gen.
Program: 01 11 01 10
Reprogram: 10 00 01 11
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WOM Codes and Flash
Procedure: Erase, Program, Reprogram, Repeat
WOM-safe: use WOM encoding
WOM-unsafe: use the same un-encoded data both times
…
…
21
0.0E+00
1.0E-07
2.0E-07
3.0E-07
4.0E-07
0 2000 4000 6000 8000 10000 12000 14000
Bit
Err
or
Rat
e (
%)
Program/Erase Cycles
C-MLC64
D-MLC32
B-MLC32
E-MLC8
B-MLC8
Error Rates
Fatal Error Rate
22
WOM Codes – Lifetime Extension
Fatal Error Rate: error rate at quoted lifetime
0
1
2
3
4
5
6
B-MLC8 B-MLC32 C-MLC64 D-MLC32 E-MLC8
Logi
cal B
yte
s W
ritt
en
Baseline WOM
23
WOM Codes – Energy Reduction
Fewer erases per written bit
0
0.5
1
1.5
2
2.5
3
Re
qu
ire
d P
rogr
am E
ne
rgy
(nJ/
bit
)
Baseline WOM
24
Conclusion
• Aim: how to make the best use of flash
• Wealth of data beyond the data sheet
• Tune the interface or application
25
???
Thank You
