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1
Transmission GateLogic Circuits
Adapted from CMOS Logic Circuit Design by John P. Uyemura, 2002
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NMOS Pass Transistor
V max=V DD�V Tn
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PMOS Pass Transistor
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CMOS Transmission Gate (TG)
X
X
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TG 2:1 Multiplexor
f =P0.S�P
1. �S
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TG 4:1 Multiplexor
Click to add text
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XOR and XNOR Gates
f =A . �B��A . B f =A .B��A . �B
f =P0.S�P
1. �S
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Alternative XOR / XNOR Circuits
Operation of the Alternative TG XOR Circuit
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TG Adder - Equations
sn=an xor bn xor cn=�an xor b� . �cn��an xor bn� . cn
cn�1=an . bn�cn�an xor bn�=�an xor bn� . cn��an xor bn� . an
a xor b .a=�a.b��a .�b�a=a.b
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TG Adder
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TG-based Latch
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TG-based M/S Flip-Flop
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SN74HC74