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THIS ARTICLE EXAMINESthe use of nanomaterials in thearea of electronic packaging.This includes capacitors andresistors as embedded passives,low-k materials, electrically con-ducting adhesives (ECAs) asinterconnects, thermal interfacematerials (TIMs), etc.
Nanomaterials can providehigh capacitance densities,
ranging from 10 to 100 nF/in2, de-pending on composition, particle size,and film thickness. The electrical prop-erties of capacitors fabricated frombarium titanate (BaTiO3)–epoxy nano-composites show a stable capacitanceand low loss over a temperature rangefrom 25 to 100 �C. Various discreteresistors with different sheet resistances,ranging from ohms to megaohms, havebeen fabricated on large panels (19.5 3
24 in2). Low resistivity materials, withvolume resistivities in the range of 10�4
to 10�6 ohm cm, depending on compo-sition, particle size, and loading, can beused as conductive joints for high-frequency and high-density intercon-nect applications. Polymers modifiedwith ceramics can produce low-k dielec-trics with k values in the range between5.41 and 2.03.
Similarly, low loss dielectric materialscan be produced by mixing epoxy withsilica or other low loss fillers. The articlealso describes a nanoparticle dispersionapproach to prepare nanogels and nano-fluids as TIMs.
The demand for high-performance,lightweight, portable computing power isdriving the industry toward miniaturiza-tion at a rate not seen before. Electronicpackaging is evolving to meet thedemands of higher functionality in eversmaller packages. To accomplish this,new packaging needs to be able to inte-grate more dies with greater function,higher I/O counts, smaller pitches, andgreater heat densities, while being pushedinto smaller and smaller footprints.
Traditionally, greater wiring densitiesare achieved by reducing the dimensionsof vias, lines, and spaces, increasing thenumber of wiring layers, and using blind
and buried vias. However, each of theseapproaches possesses inherent limita-tions, e.g., those related to drilling andplating of high-aspect ratio vias, reducedconductance of narrow circuit lines, andincreased cost of fabrication related toadditional wiring layers.
As a result, the microelectronicsindustry is moving toward alternative,innovative approaches as solutions forsqueezing more function into smallerpackages. Assembly and packaging arebridging the gap by enabling economicuse of the third-dimensional (3-D) pack-aging. System-level integration is emerg-ing. These approaches include system-in-package (SiP), stacked die, or packagestacking solutions. In addition to thetrend toward miniaturization, new mate-rials and structures are required to keeppace with more demanding packagingperformance requirements.
Nanomaterials provide the greatestpotential benefit for high-density, high-speed, miniaturized advanced packaging.The small dimensions, strength, and theremarkable physical and electrical proper-ties of these structures make them veryunique materials with a range of promisingapplications [1]–[3]. Semiconductor devi-ces based on nanocomposites are consid-ered to be very promising for electronicapplications since they may potentially befabricated entirely using similar polymertechnologies where different active nano-fillers can be introduced within the samefunctional polymer system.
In this work, we report novel poly-mer nanocomposites that have the
potential to surpass conventional com-posites to produce materials, structures,manufacturing, and circuit applicationscompatible with laminated organic sub-strates. Specifically, we discuss the elec-tronic applications of nanocomposites(Figure 1) such as conductive adhesives,interlayer dielectrics (low-k and low lossdielectrics), and embedded passives(capacitors and resistors). Here we haveused epoxies as the typical polymermatrix and a range of metal/ceramic fill-ers with particle size ranging from 10 nmto 10 lm. The addition of different fill-ers into the epoxy matrix controls theoverall electrical properties of the com-posites. For example, the addition ofsilver nanoparticles into epoxy providesconducting behavior and addition ofBaTiO3 nanoparticles results in highcapacitance. Epoxy resins having advan-tages in terms of manufacturability,processing temperatures, low moistureabsorption, high glass transition tempera-ture (Tg), and versatility make them quitepromising for advanced packaging. How-ever, homogeneous dispersion of ceramicparticles in the epoxy matrix is a criticalstep to achieve uniform property films.
EMBEDDED CAPACITORSAND RESISTORSEmbedded capacitors deserve special at-tention, as they provide the greatestpotential benefit for high-density, high-speed, and low-voltage IC packaging.Capacitors can be embedded into theinterconnect substrates (printed wiringboard, flex, multichip module on
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Digital Object Identifier 10.1109/MNANO.2010.938653
Nanomaterials for ElectronicPackaging: Toward Extreme
Miniaturization
RABINDRA N. DAS AND VOYA R. MARKOVICH
18 | IEEE NANOTECHNOLOGY MAGAZINE | DECEMBER 2010 1932-4510/10/$26.00©2010IEEE
laminated substrates, and interposer) toprovide decoupling, bypass, termination,and frequency determining functions [4],[5]. In order for embedded capacitors tobe useful, the capacitive densities must behigh enough to make layout areas reason-able. Available commercial polymer com-posite technology is not adequate for highcapacitance density thin film embeddedpassives. Several polymer nanocompositestudies so far have been focused onprocessing of high capacitance densitythin films within small substrates/wafers[6]–[9]. One of the important processingissues in thin film polymer nanocompo-site-based capacitors is to achieve highcapacitance density with large coatings.
We report novel ferroelectric-epoxy-based polymer nanocomposites that havethe potential to surpass conventionalcomposites to produce thin film layercapacitors over large surface areas, havinghigh capacitance density and low loss.Specifically, a novel crack resistant andeasy to handle resin-coated copper ca-pacitive (RC3) nanocomposite capableof providing bulk decoupling capacitancefor a conventional power–power core, orfor a three layer voltage–ground–voltagetype power core, is described.
Figure 2(a) shows the surface mor-phology of a nanocomposite preparedfrom 10 and 120 nm particles as a typicalrepresentative example. Here, small par-ticles are well distributed throughout thethin film; 10-nm particles producetransparent films. The electrical propertiesof approximately 2–100 mm2 capacitorsfabricated from nanocomposite thin filmsshow high capacitance densities rangingfrom 10 to 100 nF/in2, depending oncomposition, particle size, and thickness ofthe coatings. Embedded discrete nanoca-pacitors are stable after pressure cooker testand solder shock. Capacitance change isless than 5% after infrared (IR) reflow(assembly) preconditioning (3 3, 245 �C),and 1,400 cycles deep thermal cycle(DTC). Detailed electrical characterizationand reliability evaluations are in progress.
RC3 nanocomposites were used tofabricate multilayer embedded capacitancein the core of a thin-core build-up packagesubstrate [10]. A test vehicle (TV) wasdesigned with various sizes, thickness, andvalues of embedded capacitors. Individual
35-mm substrates with a 2 3 2 array of15-mm square isolated epoxy-based regionswere designed, each having six RC3-basedembedded capacitance layers. The total TVcore consists of eight metal layers. Designfeatures, including antipad diameters, inter-nal plane pickups for vias, and core via pitch,were varied within each 15-mm squareregion. Probe pads were added for testingcapability.Thedesign incorporated fourcorevia pitches (200, 300, 400, and 500 lm)and three possible plane pickups that includeexternal plus one internal, external plus twointernals, and external plus three internals.Antipads of 162and250lm were used.
Figure 2(b) shows cross-sectional viewsof multilayer embedded capacitors. It ispossible to make a wide variety of capaci-tance layers with different thicknesses.Desired thickness of the film can beachieved by controlling the viscosity of thecoatings, composition, and the number oflayers deposited. The electrical propertiesof multilayer-embedded capacitors fabri-cated from RC3 nanocomposite thin filmsshowed high capacitance ranging from 16to 28 nF, depending on Cu area, composi-tion, and thickness of the capacitors.
We have used a network analyzerfor high-frequency measurements of print-able embedded capacitors. The measure-ments were carried out from 45 MHz to26 GHz. Figure 2(c) shows a high-
frequency capacitance profile of 15-mmsquare capacitors. The curve fitting indi-cates that these capacitors are equivalent to23 nF bulk capacitance. When the capacitoris embedded in the substrate, the imped-ance from the active device to the support-ing capacitor can be much lower than witha discrete surface mount technology(SMT) capacitor. Embedded capacitancetends to be most effective at higher fre-quencies. At higher frequencies, theinductive parasitic associated with SMTdevices and their termination become lim-iting. For this reason, large quantities ofSMT decaps are often populated toreduce the effective inductance. This iscounterproductive to system miniaturiza-tion. Because of the distributed nature ofembedded capacitance, the inherentimpedance and that associated with con-nection are significantly lower than SMTdevices. Therefore, replacing SMT decapswith embedded capacitance at 40:1 or agreater capacitor value ratio improveshigh-frequency performance and minia-turizes the part at the same time.
Nanomaterials are also attractive forresistor applications because variable resis-tor materials can be formed simply bychanging the metal insulator ratio. Thesecompositions, however, have a practicaladvantage only when they are capable ofbeing printed in the internal layers of
Lid
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Capacitor
Resistor
Ball Grid Array Connection
Resistor
ECA joint
Capacitor
Substrate
Printed Circuit Board
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FIGURE 1 Overview of some of the potential applications of nanomaterials in microelectronics.
DECEMBER 2010 | IEEE NANOTECHNOLOGY MAGAZINE | 19
circuit boards. We have developed variousdiscrete resistors with sheet resistanceranging from 1 X to 120 MX per square.Resistors in various ranges offer low-temperature processing, and differentresistor materials can be printed in thesame internal layer. The electrical proper-ties of resistors fabricated from nanomate-rials show a stable resistance over thistemperature range.
As a case study, we have designed andfabricated an eight-layer high-densityinternal core and three subsequent finegeometry buildup layers to form a 3–8–3structure. The eight-layer internal corehas two resistance layers in the middle andsix capacitance layers sequentially appliedon the surface. Two basic building blockswere used for this case study. One was aneight-layer core. The silica-filled epoxy/
aramid paper base substrate with tworesistor layers is sandwiched between sixlayers of RC3 nanocomposites. Thecapacitor fabrication is based on a sequen-tial buildup technology employing a firstetched Cu electrode. After patterning ofthe electrode, the RC3 nanocompositecan be laminated within the substrate.
The second building block in this casestudy is the use of buildup layers to gen-erate signal layers. The signal (S) layersare comprised of copper features gener-ated using a semiadditive (pattern plat-ing) process. A line thickness of 12 lmwas achieved with minimum dimensionsfor line width and space of 35–45 lmeach. A structure with six signal layers, sixcapacitance layers, and two resistancelayers is shown schematically in Fig-ure 3(a). This allows multiple capacitancelayers in a thin total structure. The RC3nanocomposite layer does not need tosupply any structural support; it can bevery thin and achieve high values ofcapacitance per unit area. Also, since it isnot structural, the material choicesexpand significantly. The structure withsmall vias allows the vias to threadthrough the legs of the serpentine resis-tors and significantly improves z-direc-tional communication. This is especiallyimportant when there are multiple vol-tages that are supported by the capacitorlayers. The overall approach lends itselfto package miniaturization becausecapacitance can be increased throughmultiple layers and reduced thickness togive the desired values in a smaller area.These layers can be accessed because thelaser-drilled small holes (about 50 lmdiameter) do not consume large amountsof capacitive area. It has been estimatedthat this kind of SiP with embedded pas-sives core can reduce package area toapproximately 1 in2, which is about a26 3 area reduction of that of the origi-nal printed wiring board (PWB) [11][Figure 3(b)]. Also, embedding passiveswithin the SiP can eliminate 70 0.01 lFdiscrete caps and 150 discrete resistors.
CONDUCTING ADHESIVESFOR INTERCONNECTSGreater I/O density at the die level,coupled with more demanding perform-ance requirements, is driving the need for
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FIGURE 2 (a) SEM image of composite specimens: 120 and 10 nm particles. Inset: displays largermagnification. (b) Photograph of multilayer (six) embedded capacitor formation shown in cross-section, and (c) capacitance and impedance profile of embedded capacitors.
20 | IEEE NANOTECHNOLOGY MAGAZINE | DECEMBER 2010
improved wiring density and a concomi-tant reduction in feature sizes for electronicpackages, and alternatives to the traditionalplated through hole are required for high-frequency and high-density interconnectapplications. One method of extendingwiring density is a strategy that allows formetal-to-metal z-axis interconnection ofsubcomposites during lamination to forma composite structure [12]. There has beenincreasing interest in using electrically con-ductive adhesives as interconnecting mate-rials in the electronics industry. Conductiveadhesives are composites of polymer resinand conductive fillers. Metal-to-metalbonding between conductive fillers pro-vides electrical conductivity, whereas apolymer resin provides better processabil-ity and mechanical robustness. Conduc-tive adhesives have been used to fill vias insubcomposite structures and form con-ductive joints to metal planes during lami-nation to adjoining circuitized cores.Typically, adhesives formulated usingcontrolled-sized microparticles have beenused to fill small diameter holes forZ-interconnect applications.
In the present study, adhesives formu-lated using controlled-sized particles,
ranging from nanometer to micrometerscales, were used to fill small holes havingdiameters ranging from 50 to 250 lm forZ-interconnect applications. For example,holes of 50–75 lm diameter are suitablefor chip carrier interconnects, whereas 100–250 lm is suitable for board-level intercon-nects. Various metals, including Cu, Ag,
and low melting point (LMP) alloys, havebeen used to make the conductiveadhesive.
‘‘Nanoparticle’’ generally refers to theclass of ultrafine metal particles with aphysical structure or crystalline form thatmeasures less than 100 nm in size. Theycan be 3-D (block), two-dimensional(2-D) (plate), or one-dimensional (1-D)(tube or wire) structures. In general, nano-particle-filled conductive adhesives aredefined as containing at least somepercentage of nanostructures (1-D, 2-D,and/or 3-D) that enhance the overallelectrical conductivity or sintering behaviorof the adhesives. Sintering temperaturescan be greatly reduced when the size ofparticles is decreased to 10–15 nm.Because of the decrease of size, diffusionand growth of the nanoparticles is mucheasier, and large grains (hundreds/thou-sands of nanometers) can be producedefficiently. These nanoparticles diffusetoward each other and are gradually sin-tered by neck-formation [Figure 4(a)–(c)] between the adjacent particles dur-ing the thermal anneal process on thesubstrate. The neck can be smoothedaway gradually [Figure 4(b) and (c)].
(a)
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FIGURE 3 (a) Photographs of n–8–n (n¼ 1–4)structure shown in cross section and (b) PWBversus SiP (Inset: displays SiP).
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FIGURE 4 SEM micrographs of nanoparticle sintering at (a) 100 �C, (b) 150 �C, and (c) 200 �C. SEM micrographs for the nano–microparticles filledsilver-based conducting adhesives; (d) 15-nm particle sintered at 240 �C; and (e) and (f) 80 nm particles sintered at 265� 10 �C.
DECEMBER 2010 | IEEE NANOTECHNOLOGY MAGAZINE | 21
The grains of nanoparticles convert intoa continuous surface. A high-surface areaof silver nanoparticles needs an excessamount of solvent to make high loadingsilver paste. Figure 4(d)–(f) shows scanningelectron micrograph (SEM) images of thespecimens collected from nano- to micro-composites with different sintering temper-atures, from lower temperature [Figure4(d)] to higher [Figure 4(e) and (f)]. Vari-ous nanoparticles ranging from 10 to80 nm were used to modify microadhesivecomposites. Particle size has a direct impacton particle diffusion/sintering. SEM im-ages indicate that sintering of a system con-taining 10–15 nm particles completes at240 �C (all particles are sintered). Forcomparison, 80 nm particles have beenshown to sinter around 265 �C.
In the nano–microcomposites, the maincomponents are a mixture of nanoparticlesand microparticles. The nanoparticles maycontact with the adjacent ones, but thenanoaggregation lengths are short, less thantenfold of the microparticle diameter onaverage (Figure 4). As the sintering temper-ature increases, particle diffusion becomesmore and more obvious. The aggregationlength becomes much longer, resulting inthe formation of 1-D jointed particleassemblies developing into a smoothcontinuous network [Figure 4(d)–(f)].
Silver nano–microcomposites show aresistivity of about 10�4 to 10�6 ohmcm. Resistance decreases with increasingcuring temperature due to sintering ofmetal particles. There is a significantresistance drop with increasing curingtemperature from 150 to 200 �C fornanoparticles. Resistance of nano–microadhesives cured at 200 and 240 �Cwere 22 and 8 mX, respectively.
Integral to the methodology describedin this article is the use of core buildingblocks that can be laminated in a mannersuch that electrical interconnection betweenadjacent cores is achieved. The cores can bestructured to contain a variety of arrange-ments of signal, voltage, and ground planes.In addition, signal, voltage, and ground fea-tures can reside on the same plane.
As a case study, this Z-interconnec-tion methodology was used to fabricatea package for a flip chip device having apad pitch of 150 lm. Two basic buildingblocks were used for this case study.
One is a 2S/1P core. The power plane(P) is sandwiched between two layers ofa dielectric. The dielectric is usedbecause of its favorable electrical,mechanical, and thermal properties. Theinternal signal (S) layers are comprisedof copper features generated using asemiadditive (pattern plating) process. Aline thickness of 12 lm was achievedwith minimum dimensions for linewidth and space of 25 lm each.
The second building block in this casestudy was a 0S/1P core. This core is con-structed using a copper power plane,35 lm thick, sandwiched between layersof a dielectric material. Through holes inthe core are filled with an electrically con-ductive adhesive. By alternating 2S/1Pand 0S/1P cores in the lay-up before lami-nation, the conductive paste electricallyconnects copper pads on the 2S/1P coresthat reside on either side of the 0S/1Pcore. Two signal layers are added to thecomposite structure each time one adds anadditional 2S/1P core and an additional0S/1P core. A 19-layer structure with tensignal layers composed of nine subcompo-sites (five 2S/1P cores and four 0S/1Pcores) is shown in Figure 5. Although thisparticular construction comprises alternat-ing 2S/1P and 0S/1P cores, it is possibleto place multiple 0S/1P cores adjacent toeach other in the stack.
THERMAL INTERFACE MATERIALSTIMs are critical packaging materialsthat are intended to fill gaps betweenmating surfaces to enable efficient heattransfer. TIMs are used in a variety offorms like silicone and epoxy adhesives,gels, greases, phase change materials,and metal alloys, such as solders. Forexample, nanoparticle–aqueous ethyleneglycol-based nanofluids are proposed as
the next-generation heat transfer fluidsbecause of their significantly higherthermal transport capacities comparedwith the base liquids [13], [14].
Parallel significant research work hasfocused on nanopastes for Z-axis intercon-nections, die attachments, and TIMs.Nanogels have the potential to combine theadvantages of both nanofluids and nano-pastes. The combination of high thermalconductivity and stability makes nanogelsvery attractive candidates for TIMs.
Nanogels and nanopastes formulatedusing nanoparticles, ranging from 5 to 100nm, were used to fabricate TIMs formicroelectronics. Motivated by the extra-ordinary performance of nanostructures innanocomposites design, we search forinorganic nanoparticles that can displaysimilar multifunctional qualities in thenanometer length scale by dispersion in anappropriate organic matrix. We found afew good TIM candidates among nano-gels. However, accommodation of theseadvantages into TIM applications requiresa collective analysis of both heat transferand gelation properties. Nanoparticlesincrease overall thermal conductivity,whereas the polymer matrix provides bet-ter processability and mechanical robust-ness. However, homogeneous dispersionof nanoparticles in the polymer gel matrixis a critical step to achieve high-quality gels.
Figure 6 shows a series of nanogels andnanofluids. Nanogels are best formed withliquidlike materials having low viscosity, inthe range of 100–200 Pa � s. Low viscosityhelps generation of thin bond lines. Nano-pastes are best formed with similar viscos-ity pastes (100–300 Pa � s) and generateapproximately 50–100-lm-thick bondlines. Figure 6(a)–(d) represents differentviscosity nanogels and nanofluids. Lowerviscosity can produce low flow liquidlikematerials. Bond lines can be reducedfurther for oil-based nanofluids.
Figure 6(e) shows the surfacemorphology of the nanogel. SEM clearlyindicates individual or few agglomeratednanoparticles distributed within the poly-mer matrix. Nanoparticles (observed fromSEM) are wrapped by the polymer in sucha way that they maintain their individualidentity even after heat treatment. Nano-particle slurries sinter very easily at100 �C/4 h in the absence of polymer
FIGURE 5 Optical photographs of cross-sectionsof a Z-interconnect construction having 19 metallayers, with five 2S/1P cores and four 0S/1P cores.
22 | IEEE NANOTECHNOLOGY MAGAZINE | DECEMBER 2010
[Figure 4(a)]. SEM study suggests thatthe nanoparticles are well dispersed andthermally stable within the gel.
LOW-K AND LOWLOSS MATERIALSLow loss materials are important for high-frequency and high-speed applications.Low-k materials are useful to reduce thedielectric thickness of the resulting circuitsubstrate. The rapidly growing wirelessindustry requires high-performance materi-als to build low-loss, high-density, ther-mally stable integrated packages. Thegigahertz operating frequency systemsrequire substrate materials with low loss(Df), low dielectric constant (Dk), and thegood power handling characteristics, whichare important in many of these applications.
Low loss is a critical requirement forlightweight portable devices for long bat-tery life. Low-k dielectrics not only lowerline-to-line capacitance but also reducecross-talk problems between traces.Organic polymers such as divinyl siloxanebenzocyclobutene, a silicon-based polymer
with high organic content and poly(aryle-ne)ethers, are some examples of low-kmaterials. Fluoropolymers, fluorinated pol-yimides, polyimide-silica hybrid, and bis-maleimide-triazine in combination withepoxies have been used as low loss andlow-k dielectric materials. We introducedceramic filled polymer systems whereceramic fillers and content dictate theproperty of composites. Pure silica and
multicomponent silica, boron nitride, alu-mina, and several other fillers were used aslow-k and low-loss composites. Figure 7shows variation of Dk with frequency fordifferent fillers as a representative example.Alumina composites show Dk approxi-mately 5.41; boron nitride and silica have asimilar trend. Zinc borate modified alu-mina composites and a silica-modifiedboron nitride composite show low loss.
CONCLUSIONSNanomaterials can be used to enhancethe conductivity of ECAs, form inte-grated resistors with controlled sheetresistance, and form capacitors withhigh capacitance density. Mixing silvernanoparticles has been shown toimprove the sintering behavior, andhence the conductivity, of the ECAs. Avariety of nanomaterials well suited tofabrication of embedded passive compo-nents has been developed. These materi-als enable fine-feature definition with
(a) (b)
(c) (d) (e)
FIGURE 6 Photographs and flow characteristics of (a) liquidlike materials, (b) nanogel, (c) oil-based nanofluids, and (d) solvent-based nanofluids.(e) SEM micrograph of the nanogel at room temperature.
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FIGURE 7 Dielectric constant as a function offrequency for epoxy–ceramic-based system.
(continued on page 26)
DECEMBER 2010 | IEEE NANOTECHNOLOGY MAGAZINE | 23
PROF. CHENNUPATIJagadish of Australian NationalUniversity and past presidentof the IEEE NanotechnologyCouncil was awarded the IEEEPhotonics Society 2010 Dis-tinguished Service Award for
dedicated serv-ice to the Pho-tonics Society indiverse areas, in-cluding ex-ceptional con-tributions tomembership ac-tivities in Asiaand significantcontributions
to conferences and publications. He washonored at the awards banquet at thePhotonics Society 2010 Annual (Nov-ember 2010), in Denver, Colorado.
He was also awarded the 2010 Inter-national Symposium on CompoundSemiconductors (ISCS) QuantumDevice Award for pioneering and sus-tained contributions to compoundsemiconductor quantum structures andoptoelectronic devices. He received theaward at the 37th ISCS held in Taka-matsu, Kagawa, Japan, during an awardsceremony on 3 June 2010.
The Quantum Device Award wasestablished in 2000 by Fujitsu QuantumDevices, Ltd; the recipients were selected
by the ISCS Award Committee forpioneering contributions to the fields ofcompound semiconductor devices andquantum nanostructure devices, whichhave made a major scientific or technologi-cal impact in the past 20 years. The fields ofthe award cover the invention of newdevice concepts and structures, devicephysics and modeling, device realization,and characterization. This award is cur-rently sponsored by the ISCS JapaneseCommittee and consists of a US$3,000cash prize and a certificate.
AW
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Prof. Jagadish Honoredwith Two Awards
Digital Object Identifier 10.1109/MNANO.2010.938656
(continued from page 23)
excellent control of layer thick-ness. The materials can producevariable resistance, ranging frommilliohm to megaohm.
Polymer nanocomposite-basedcapacitors show high capacitanceand low loss and are reliable afterIR-reflow and DTC. Low-k andlow-loss materials can also be fab-ricated from nanocomposites.
Overall, this is an integrated approach cen-tering on three interrelated fronts: 1) mate-rials development and characterization, 2)fabrication, and 3) design and electricalcharacterization at the substrate level.
ABOUT THE AUTHORSRabindra N. Das ([email protected]) is an R&D engineer/scientist atEndicott Interconnect Technologies. Hepreviously worked as a visiting scientist inthe Materials Science and EngineeringDepartment at Cornell University. Hisresearch interest is in the area of nano-technology where he has more than 14years of experience. He has publishedapproximately 70 nanobased technicalpapers and several issued/filed patents.
Voya R. Markovich ([email protected]) is a senior vice president
and chief technology officer at EndicottInterconnect Technologies. He was pre-viously an IBM senior technical staffmember and senior manager of the WWmaterials, processes, and assembly devel-opment group for organic laminate prod-ucts. He was elected to the IBMAcademy of Technology in 1997 andholds 218 U.S. patents. His interests arein the development of new processes andmaterials for integrated actives, passives,optical, and RF for advanced systemsintegrated electronic packaging.
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Zacharakis, M. Psyllaki, S. H. Anastasiadis, R. A.Vaia, and E. P. Giannelis, ‘‘Random laser actionin organic/inorganic nanocomposites,’’ J. Opt.Soc. Amer. B, vol. 21, no. 1, pp. 208–213, 2004.
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[6] Y. Rao, S. Ogitani, P. Kohl, and C. P. Wong,‘‘Novel polymer-ceramic nanocomposite based
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[9] S. Ramesh, B. A. Shutzberg, C. Haung, J. Gao,and E. P. Giannelis, ‘‘Dielectric nanocompositesfor integral thin film capacitors: Materials design,fabrication, and integration issues,’’ IEEE Trans.Adv. Packag., vol. 26, no. 1, pp. 17–24, 2003.
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[12] F. D. Egitto, S. R. Krasniak, K. J. Blackwell,and S. G. Rosser, ‘‘Z-axis interconnection forenhanced wiring in organic laminate electronicpackages,’’ Proc. 55th Electronic Componentsand Technology Conf., Lake Buena Vista, FL,Piscataway, NJ, IEEE, pp. 1132–1138May 31,June 3, 20052005.
[13] K. B. Anoop, S. Kabelac, T. Sundararajan,and S. K. Das, ‘‘Rheological and flow charac-teristics of nanofluids: Influence electroviscouseffects and particle agglomeration,’’ J. Appl.Phys., vol. 106, no. 1–2, p. 034909, 2009.
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