Click here to load reader

MPC8555E Configurable Development System Reference · PDF file 2010. 4. 30. · MPC8555E Configurable Development System Reference Manual, Rev. 1 Freescale Semiconductor vii Contents

  • View
    0

  • Download
    0

Embed Size (px)

Text of MPC8555E Configurable Development System Reference · PDF file 2010. 4. 30. ·...

  • MPC8555E Configurable Development System

    Reference Manual

    Supports MPC8555E MPC8541E

    MPC8555CDSx3RM Rev. 1, 11/2006

  • MPC8555E Configurable Development System Reference Manual, Rev. 1

    Freescale Semiconductor iii

    Contents Paragraph Number Title

    Page Number

    Contents

    About This Book

    Audience .......................................................................................................................... xiii Organization..................................................................................................................... xiii Suggested Reading........................................................................................................... xiv

    General Information..................................................................................................... xiv Signal Conventions .......................................................................................................... xiv Acronyms and Abbreviations .......................................................................................... xiv

    Chapter 1 Introduction

    1.1 Background...................................................................................................................... 1-1 1.2 Scope................................................................................................................................ 1-1 1.3 Overview.......................................................................................................................... 1-1 1.3.1 Features........................................................................................................................ 1-2 1.3.2 Diagrams...................................................................................................................... 1-4

    Chapter 2 Quick Start-Up Guide

    2.1 Hardware List .................................................................................................................. 2-1 2.2 Hardware Installation....................................................................................................... 2-1 2.3 Quick Start-Up ................................................................................................................. 2-5 2.4 How to Re-Flash U-Boot/Linux Image Using U-Boot .................................................... 2-6 2.5 Default Switch Configuration Table ................................................................................ 2-7

    Chapter 3 CDS Carrier Architecture

    3.1 Overview.......................................................................................................................... 3-1 3.1.1 Board Measurements ................................................................................................... 3-1 3.1.2 Block Diagrams ........................................................................................................... 3-1 3.2 Carrier Pinouts ................................................................................................................. 3-3 3.3 System Logic ................................................................................................................... 3-3 3.3.1 System Address Map ................................................................................................... 3-4 3.3.2 System Logic Registers ............................................................................................... 3-5 3.3.2.1 Version Register (CM_VER)................................................................................... 3-5 3.3.2.2 General Control Register (CM_CSR)...................................................................... 3-6

  • MPC8555E Configurable Development System Reference Manual, Rev. 1

    iv Freescale Semiconductor

    Contents Paragraph Number Title

    Page Number

    3.3.2.3 Reset Control Register (CM_RST).......................................................................... 3-6 3.3.2.4 LED Data Register................................................................................................... 3-7 3.3.2.5 PCI Control/Status Register..................................................................................... 3-7 3.3.2.6 DMA Control Register ............................................................................................ 3-8 3.4 CPM Connections ............................................................................................................ 3-9 3.5 ATM Interfaces .............................................................................................................. 3-12 3.6 Ethernet Ports................................................................................................................. 3-12 3.7 Local Bus ....................................................................................................................... 3-15 3.7.1 NCDS Local Bus Signals........................................................................................... 3-17 3.8 Clock.............................................................................................................................. 3-18 3.9 PCI-X ............................................................................................................................. 3-19 3.9.1 PCI Arbitration .......................................................................................................... 3-20 3.9.2 PCI-X System Control ............................................................................................... 3-21 3.10 Exceptions...................................................................................................................... 3-21 3.10.1 Software Triggered Exceptions.................................................................................. 3-23 3.11 Reset............................................................................................................................... 3-23 3.11.1 Software Triggered Resets ......................................................................................... 3-24 3.12 I2C ................................................................................................................................. 3-25 3.13 Configuration ................................................................................................................. 3-26 3.14 Power ............................................................................................................................. 3-28 3.14.1 +2.5-V Power............................................................................................................. 3-29 3.14.2 Power Management ................................................................................................... 3-29 3.15 Diagnostic Features........................................................................................................ 3-29 3.15.1 Analyzer Headers....................................................................................................... 3-29 3.15.2 Remote Debug Header............................................................................................... 3-33 3.15.3 Monitoring LEDs....................................................................................................... 3-33

    Chapter 4 CDS Daughtercard Architecture

    4.1 Mechanical Architecture.................................................................................................. 4-1 4.2 CDS Daughtercard (CDC) Block Diagram ..................................................................... 4-4 4.3 Processor .......................................................................................................................... 4-4 4.4 DDR Memory .................................................................................................................. 4-4 4.4.1 DDR Interface Termination ......................................................................................... 4-7 4.4.2 Recommended Part Numbers ...................................................................................... 4-8 4.5 Local Bus Interface .......................................................................................................... 4-8 4.5.1 Local Bus SDRAM Memory ..................................................................................... 4-10 4.6 Passive Connections ...................................................................................................... 4-10 4.7 Carrier Pinouts ............................................................................................................... 4-12 4.8 Clock.............................................................................................................................. 4-12

  • MPC8555E Configurable Development System Reference Manual, Rev. 1

    Freescale Semiconductor v

    Contents Paragraph Number Title

    Page Number

    4.9 PCI/PCI-X...................................................................................................................... 4-13 4.10 Reset............................................................................................................................... 4-13 4.11 Exceptions...................................................................................................................... 4-14 4.12 I2C ................................................................................................................................. 4-15 4.13 Configuration ................................................................................................................. 4-16 4.14 Power ......................................................................................................

Search related