Microprocessors - Meppayil Narayanan

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    INTRODUCTION TO

    MICROPROCESSORS

    Meppayil Narayanan

    Sir Syed CollegeTaliparambaKannur

    E-mail : [email protected]

    INTRODUCTION TO

    MICROPROCESSORS

    Meppayil Narayanan

    Sir Syed CollegeTaliparambaKannur

    E-mail : [email protected]

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    A Microprocessor is a multipurpose,programmable, clock driven, registerbased electronic device that reads binaryinstructions from a storage device called

    memory, accepts binary data as input andprocesses data according to thoseinstructions, and provides results as

    output.

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    EVOLUTIONS OF MICROPROCESSORS

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    Microprocessor is a semiconductor deviceconsisting of electronic logic circuits. It is a

    programmable device. A set of instructionswritten for the microprocessor to perform a taskis called a program.

    Microprocessor used systems are of two types

    1.Reprogrammable e.g.:- Microcomputers

    (general purpose)

    2.Embedded e.g. :- Xerox machine, Washingmachine, Traffic light controller

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    Microcomputers

    P(CPU)

    Input Output

    Bus

    Memory

    SYSTEM BUS

    This is comprised of the control bus, data bus and address bus. It is used forconnections between the processor, memory and peripherals, and transferralof data between the various parts.

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    Microcomputer system consists offour sections

    1.Microprocessor (CPU)

    2.Memory (ROM and RAM)

    3.Input

    4.Output

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    1. The Microprocessor1. The Microprocessor

    The silicon chip that contains the CPU where mostcalculations take place

    Microprocessors are distinguished by 3characteristics

    Instruction set: the set of instructions that themicroprocessor can execute

    Bandwidth: the number of bits processed in eachinstruction

    Clock speed: (MHz) It determines how many

    instructions/second the processor can execute

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    Microprocessor used as CPU.

    It is a single chip IC capable of performing computing and making decisionsduring program execution.

    It can be divided in to three sections

    i. ALU

    Performs computing functions such as arithmetic operations and logicaloperations on data

    ii. Register Unit

    Used to store data temporarily.

    iii. Control UnitProvides the necessary timing and control signals to all the operations.

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    CPUThe part of the central processing unit thatdeals with operations such as addition,

    subtraction, and multiplication of integersand Boolean operations. It receives controlsignals from the control unit telling it tocarry out these operations.

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    2. Memory2. Memory

    Stores the program and data and provides thatinformation to the microprocessor whenever necessary.

    The memory is not an actual part of the CPUitself, and is instead housed elsewhere on the

    motherboard. However, it is here that the programbeing executed is stored, and as such is a crucial part ofthe overall structure involved in program execution.

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    3. Input3. InputIt is required to get data and Instructions in binary form

    from the outside to the microprocessor.

    E.g. :- Keyboard, ADC, Webcam, CD, Pen drive, Floppy discetc.

    4. Output4. Output

    Output unit transfers the processed data from themicroprocessor to the output devices such as LED, CRTs, Video

    Monitor, Line printers, LCD projectors etc.

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    INTEL 8085

    40 pin dual in - line package (DIP).Pin 1 & 2

    Crystal at a required frequency (500 KHz to 3.125 MHz)Pin 3

    When we switch on the system, the peripheral chips are being reset.Pin 4

    SOD converts Acc data in to a Serial data streamPins 12 to 19 & 21 to 28

    Pins 12 to 18 carry the lower order 8 address bits or 8 data bits.Pins 21 to 28contain the rest of the address bus.Pin 20

    Ground

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    Pin 30The Memory Address Register (MAR) in each memory chip is called Address

    latch. It stores the address from the Address bus and Address data bus. The falling edgeof ALE signal loads the address on the Address bus and Address data bus in to the MARof the memory chips.

    Pin 36If = 0, the processor resets the whole system and sends a high RESET OUT to

    pin 3.Pin 35

    Some of the peripheral devices are unable to run at the same speed at the 8085,because of the low speed operation. If the device is not ready, the device will send a low

    READY bit to the 8085. Then 8085 is in WAIT state.Pin 37Carries a clock out signal which obtained from the on-chip oscillator. This

    signal goes to the peripheral chips to synchronize their timings.Pin 38, 39

    In order to speedup data transfer between memory and a peripheral device, theprocessor need not be involved. The solution for this is direct memory access operation,

    with HOLD and HLDA control signals.

    FUNCTIONAL BLOCK DIAGRAM OF 8085

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    INTERRUPTCONTROL

    GP

    R

    REGISTE

    RARRA Y

    SERIAL I/OCONTROL

    8 BIT INTERNAL DATA BUS

    A

    ACCUMULATOR

    (ACC)

    Temp.reg.

    Flagregister

    Instruction

    register

    B C

    D E

    H L

    STACK POINTER

    PROGRAM COUNTER

    INCREMENTER / DECREMENTERADDRESS LATCH

    ADDRESSBUFFER

    ADDRESS DATABUFFER

    TIMING & CONTROL

    ArithmeticLogic Unit

    (ALU)

    Instructiondecoder &Machine

    cycleencoding

    (8) (8) (5) (8)

    (8)

    (8) (8)

    (8)(8)

    (8)(8)

    (16)

    (16)

    (16)

    (8)(8)

    INTR

    INTA

    RST 5.5

    RST 6.5

    RST 7.5

    TRAP SID SOD

    X2 X1 GND +5V

    CLKgen.Ready

    RD WR ALE S0 S1 IO/MHOLD

    HOLDAIN

    OUT

    FUNCTIONAL BLOCK DIAGRAM OF 8085

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    Internal Data Bus (8 bit): Carries instructions and data between the CPU registers

    Serial I/O control : The mode of transmission from the I/O devices is either in serialform or in parallel form. In certain cases, I/O devices operate with serial data rather

    than parallel. Hence before the computer operation, the serial data stream from anoutput device must be converted to 8 bit parallel data. the SID input is where serialdata enters and the SOD output is where the serial data leaves.

    Interrupt control : It is necessary to interrupt the execution of the main programmeto service an I/O device. For example, let an I/O device may send an interrupt signal

    to this interrupt control unit to indicate that data is ready for input. Then thecomputer temporarily stops, takes data and then returns to previous position

    ALU : Performs addition, subtraction, logical AND,OR, EXOR, complement,increment, decrement, shifting and clearing on 8 bit quantities. Arithmetic logic groupof circuits includes Accumulator, flag flip-flops and temporary register

    Timing and Control : It is a part of CPU. It generates timing and control signals forthe execution of instructions. The control signal of this unit controls dataflowbetween CPU and peripherals. It controls the entire operations of the Microprocessorand the peripherals connected to it.

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    Sl. No. Name of the register Quantity Capacity

    1 Accumulator ( Acc or A) 1 8 bit

    2 Temporary register 1 8 bit

    3 General Purpose registers (B,C,D,E,H & L) 6 8 bit each

    4 Stack Pointer (SP) 1 16 bit

    5 Program Counter (PC) 1 16 bit

    6 Instruction Register 1 8 bit

    7 Incrementer / Decrementer address latch 1 16 bit

    8 Status Flag registers 5 FF 1 bit each

    Registers in the 8085 and their functions

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    The registers are used for temporary storage, manipulation of data and instructions,and during the execution of a program

    1.Accumulator : 8 bit register- It can send or receive data via internal data bus.

    During the execution of a program, this is generally used fortemporary storageand for theplacement of final result of Arithmetic/ Logical operations. The twostate output of this drives ALU.

    This register that holds one of the quantities to be operated on by the ALUand receives the result of an operation done by the ALU.

    2.Temporary register :8 bit- receives data from the internal data bus and holds it

    for ALU. This registerstores the operands of Arithmetic- logic operations.4.General Purpose Registers: This is an array of CPU registers, containing six

    number of 8 bit registers arranged in pairs. The pairs are B&C,D&E, and H&L.These BC,DE and HL registers are known as Scratch Pad registers. Basicallythis register array is like a small on chip RAM with addressable memorylocations. By using proper control signals, the CPU can either load a registerfrom the internal data bus or the output of these registers to the bus.Note that each register of this array alone, can be used to store a byte of data andwith its combination, used to store a 16 bit data word or 16 bit address.

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    4.Stack pointer (SP): This 16 bit register controls a portion of a memory knownas Stack and it holds then address of this stack top. This stack is used to savethe content of a register during the execution of a program.

    5.Program Counter (PC): This 16 bitcounter can be viewed as a register or

    parallel load counter. It store the memory address currently being read from orwritten into the memory, by the CPU. After each instruction, it is incrementedautomatically so that it points out to the location of the next instruction.

    6. Instruction Register and Decoder : During the operation; the op-code of aninstruction is stored in the instruction register and then drives the instruction

    decoder and machine cycle encoder. However the instruction register simplyholds instructions which are coming on the data bus. The decoder interprets theinstruction and producing the proper signals to carry it out.

    7. Incrementer / Decrementer : It allows the contents of any of the 16 bitregisters to be incremented or decremented, by logic 1.

    8. Status Flags : It is a set of five flip flops; in which each holds 1 bit flag thatindicates certain condition during arithmetic and logic operations. These fiveconditional flags are zero, sign, carry, auxiliary carry and parity.

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    7 6 5 4 3 2 1 0 BIT NO.

    S Z X AC X P X CY STATUS FLAGS

    UNDEFINED BITS

    FLAG REGISTER

    a)Zero (Z) : If a result of an instruction has a value zero, this flag is set, otherwise it isreset.

    b)Sign (S) : If the MSB of the result of the operation has value 1, this flag is set, otherwiseit is reset.

    c)Carry (CY) : If the instruction resulted in a carry (from addition) or a borrow (fromeither the subtraction or comparison), out of the higher order bit, this flag is set,otherwise it is reset.

    d)Auxiliary carry (AC) : This flag holds carry out of bit three to bit four resulting from

    the execution of an arithmetic operation, it can set or reset.e)Parity (P) : This flag is set, when the result of the operation contains even number of 1sand is reset when there is odd number of 1s.

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    Bus means a group of lines on which bit appear in parallel at a time.

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    PROM RAM

    I/OPorts

    DATA BUS (8)

    Input devices

    Output devices

    1. DATA BUS

    These are the lines through which instruction, data oraddress of data transfer takes place between microprocessor,memory or I/O devices.

    For the 8 bit microprocessors like Intel 8085, data bus is8 bit wide.

    Bidirectional bus

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    P

    Input devices

    Output devices

    Address Bus (16)

    ROM RAMI / OPorts

    3. ADDRESS BUS

    As the internal memory (GPR) is very small, external

    memory is needed. Each memory location must have a distinctaddress. Here, 216 = 65,536 (64K) memory locations can beidentified.

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    AD0 AD7

    8085

    (CPU)

    ALE

    74LS373

    8 bit

    D Latch

    EN

    D0 D7

    A0 A7

    DEMULTIPLEXING THE AD BUS

    To demultiplex the address / data lines (of the P), the processor provides a signalcalled ALE (Address Latch Enable). The ALE is asserted High and then Low by the processor atthe beginning of every machine cycle. At the same time, the low byte address is given outthrough AD0 AD7 lines. The demultiplexing of address / data lines using 8 bit D latch

    74LS373 is shown in figure.

    The ALE is connected to the Enable pin EN of an external 8 bit Latch. When ALE isasserted high and then low, the addresses are latched in to the output lines of the latch. It holdsthe low byte of the address until next mission cycle. After latching the address, the AD0 - AD7

    lines are free for data transfer. The first T - state of every machine cycle is used for addresslatching in 8085 and the remaining T states are used for reading or writing operation.

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    IO/M S1 S0 Operation performed by the 8085

    0 0 1 Memory WRITE

    0 1 0 Memory READ

    1 0 1 I/O WRITE

    1 1 0 I/O READ

    0 1 1 Opcode fetch

    1 1 1 Interrupt acknowledge

    GENERATNG CONTROL SIGNALS

    The RD signal is asserted low by the 8085 during a memory or I/O READ operation.Similarly the WR pin signal is asserted low during a memory or I/O WRITE operation.

    The IO/M, S0, S1 are output by the 8085 during its internal operations, which can beinterpreted as shown in the table below.

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    ARCHITECTURE OF 8085

    Functional Block diagram

    Description ofALUTiming and control UnitInstruction Register and DecoderRegister ArrayInterrupt controlSerial I/O Control

    Description ofALUFlag RegisterSPPC

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    Once the opcode is known, the execution cycle can occur. However, there are generally

    four groups of different actions that can occur:

    qTransfer of data between the CPU and memory.

    qTransfer of data between the CPU and an input or output devices.

    qProcessing of data, possibly involving the use of the arithmetic and logic unit.

    qA control operation, in order to change the sequence of subsequent operations. These canpossibly be conditional, based on the values stored at that point within the flag register.

    DECODING AND EXECUTING AN INSTRUCTION

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    ALU

    Instruction

    Decoder

    GeneralPurpose

    reg.BCDE

    Memory

    F800

    F801F802

    F803

    F804

    F805

    ControlLogic

    Internal Data Bus

    P

    3E

    05

    RD

    IO/M

    Address Bus

    Data Bus

    3E3E

    F800

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    The program instructions are stored in memory which is an external device (See thefig. before). For executing a program in 8085, the starting address of the program should beloaded in PC. The 8085 output the content of PC in address bus and asserts read control signallow. Also, the PC is incremented.

    Let us assume that the instruction MVI A is the first instruction of a program and that

    the program is stored starting from the location F800 H. Therefore the location F800 H containsMVI A.Step 1 : In order to run a program the CPU first loads the starting address of the program intoone of its registers called PC. The contents of the PC are sent out through the address bus. In thiscase the address would be F800 H .Step 2 : The relevant memory locations enabled and its contents are placed in the data bus. The

    content in this case is the op-code of the instruction MVI A.Step3: The CPU reads the content of the data bus and sends it to the block called instructiondecoder. It is in this block that the instruction is identified and the sequence of events that has tofollow is decided. This process is called decoding the instruction and therefore the block is calledso.Step 4 : As part of the follow up sequence, the instruction decoder enables the CONTROL andTIMING unit to send out control signals.Step5 : The instruction decoder completes the execution by setting the ALU to add the contentsof B register and A register.

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    After sending out the content of the PC as in step 1 above, its content isincremented so that it contains the address of the next instruction. Thus at anyinstant, the counter stores the address of the next instruction to be executed. That iswhy it is called the Program counter.

    Reference:

    1.Microprocessor Architecture, Programming, and applications with the 8085-- Ramesh Gaonkar ( 5thedn.) www penram.com