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May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

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Page 1: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation
Page 2: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 2

USB 2.0 Electrical Overview

USB 2.0 Electrical Overview

Jon LuekerJon LuekerIntel CorporationIntel Corporation

Page 3: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 3

Highlights of the USB 2.0 Electrical SpecificationHighlights of the USB 2.0 Electrical Specification

High-speed signaling mode – 480 Mb/sHigh-speed signaling mode – 480 Mb/s Existing cables and connectorsExisting cables and connectors Seamless forward/backward compatibilitySeamless forward/backward compatibility High-speed functionality smoothly “layered”High-speed functionality smoothly “layered”

over existing USB 1.1over existing USB 1.1 Specifications for each element testable through Specifications for each element testable through

the use of required test modesthe use of required test modes

Page 4: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 4

USB 2.0 - An Extensionof USB 1.1USB 2.0 - An Extensionof USB 1.1

All the functionality of USB 1.1All the functionality of USB 1.1 High-speed signaling modeHigh-speed signaling mode Protocol for detecting high-speed capabilityProtocol for detecting high-speed capability Protocols for entering/exiting high-speedProtocols for entering/exiting high-speed Mechanism for disconnect detectionMechanism for disconnect detection Low-/full-speed specifications tightened, but only Low-/full-speed specifications tightened, but only

for high-speed capable portsfor high-speed capable ports Section 7.2 (“Power Distribution”)Section 7.2 (“Power Distribution”)

specifications unchangedspecifications unchanged

Page 5: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 5

USB 2.0 is Interoperable with USB 1.1USB 2.0 is Interoperable with USB 1.1

All compliant USB 1.1 devices, hubs, and cables All compliant USB 1.1 devices, hubs, and cables will work with new 2.0 host controllerswill work with new 2.0 host controllers

USB 2.0 devices and hubs will work with 1.1 host USB 2.0 devices and hubs will work with 1.1 host controllers (but not at 480 Mb/s!)controllers (but not at 480 Mb/s!)

High-speed signaling is supported over compliant High-speed signaling is supported over compliant USB 1.1 cables and connectorsUSB 1.1 cables and connectors

Page 6: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 6

Legacy USB Devices(Other than Hubs)Legacy USB Devices(Other than Hubs)

Compliant USB 1.1 devices will generally beCompliant USB 1.1 devices will generally beUSB 2.0 compliantUSB 2.0 compliant

Exception: Low-speed devices with unshielded, Exception: Low-speed devices with unshielded, captive cablescaptive cables

USB 2.0 requires foil and drain wire in low-speed USB 2.0 requires foil and drain wire in low-speed captive cablescaptive cables

This Is a Compliance Issue –This Is a Compliance Issue –It Doesn’t Affect 1.1/2.0 Interoperability!It Doesn’t Affect 1.1/2.0 Interoperability!

Page 7: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 7

USB 2.0 High-speed Capable DevicesUSB 2.0 High-speed Capable Devices

Required to support full-speed signaling Required to support full-speed signaling Required to at least enumerate in full-speedRequired to at least enumerate in full-speed Required to meet tightened full-speedRequired to meet tightened full-speed

electrical specificationselectrical specifications Must not support low-speed modeMust not support low-speed mode

It’s Likely That Vendors of High-Speed Capable It’s Likely That Vendors of High-Speed Capable Devices Will Support Full-Speed Operating Devices Will Support Full-Speed Operating

Modes ( 250 Million Existing USB 1.1 Ports! )Modes ( 250 Million Existing USB 1.1 Ports! )

Page 8: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 8

USB 2.0 Hubs andHost Controllers USB 2.0 Hubs andHost Controllers

Required to support low, full, and high-speed Required to support low, full, and high-speed modes on downstream facing portsmodes on downstream facing ports

Required to support full-/high-speed on upstream Required to support full-/high-speed on upstream facing portsfacing ports

Required to support tightened low-/full-speed Required to support tightened low-/full-speed electrical specificationselectrical specifications

Page 9: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 9

USB 1.1/2.0Interoperability MatrixUSB 1.1/2.0Interoperability Matrix

12 Mb/s12 Mb/s

12 Mb/s12 Mb/s

1.5 Mb/s1.5 Mb/s

USB 2.0 USB 2.0 HubHub

12 Mb/s12 Mb/s

12 Mb/s12 Mb/s

1.5 Mb/s1.5 Mb/s

USB 1.1 USB 1.1 HubHub

480 Mb/s480 Mb/s

12 Mb/s12 Mb/s

1.5 Mb/s1.5 Mb/s

No HubNo Hub

USB 2.0 Host ControllerUSB 2.0 Host ControllerUSB 1.1 Host ControllerUSB 1.1 Host Controller

12 Mb/s12 Mb/s

12 Mb/s12 Mb/s

1.5 Mb/s1.5 Mb/s

USB 1.1 USB 1.1 HubHub

480 Mb/s480 Mb/s12 Mb/s12 Mb/sHigh-High-Speed Speed

Capable Capable DeviceDevice

12 Mb/s12 Mb/s12 Mb/s12 Mb/sFull-Speed Full-Speed DeviceDevice

1.5 Mb/s1.5 Mb/s1.5 Mb/s1.5 Mb/sLow-Low-Speed Speed DeviceDevice

USB 2.0 USB 2.0 HubHub

No HubNo Hub

Page 10: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 10

High-Speed Electrical LayerHigh-Speed Electrical Layer

New signalingNew signaling

New transceiver elementsNew transceiver elements

New bus statesNew bus states

New low-level protocolsNew low-level protocols

New test modesNew test modes

Page 11: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 11

Differential Current DriveDifferential Current Drive

RRTERMTERMRRTERMTERM

High SpeedHigh SpeedSignalingSignalingCurrentCurrent

High SpeedHigh SpeedSignalingSignalingCurrentCurrent

High SpeedHigh SpeedDifferentialDifferentialReceiverReceiver

High SpeedHigh SpeedDifferentialDifferentialReceiverReceiver

High SpeedHigh SpeedSignalingSignalingCurrentCurrent

High SpeedHigh SpeedSignalingSignalingCurrentCurrent

RRTERMTERMRRTERMTERM

RRTERMTERMRRTERMTERM

RRTERMTERMRRTERMTERM

Data+Data+Data+Data+

Data-Data-Data-Data-

High SpeedHigh SpeedDifferentialDifferentialReceiverReceiver

High SpeedHigh SpeedDifferentialDifferentialReceiverReceiver

Page 12: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 12

Source/Load TerminationsSource/Load Terminations

Use of terminations at source and load enable Use of terminations at source and load enable high signal integrityhigh signal integrity

Reflection coefficient = (RT - Z0) / (RT + Z0)Reflection coefficient = (RT - Z0) / (RT + Z0)Example: For ZExample: For Z00 = 52 Ohms and R = 52 Ohms and RTT = 40 Ohms, reflection = 40 Ohms, reflection

coefficient is -13%coefficient is -13%

In the case of a source terminated link, there is a 13% In the case of a source terminated link, there is a 13% additive/subtractive inter-symbol interferenceadditive/subtractive inter-symbol interference

With source and load terminations of 40 Ohms, the effect is With source and load terminations of 40 Ohms, the effect is reduced to (13%)reduced to (13%)22, or 1.7%, or 1.7%

Double terminations have a similar benefit in reducing the effects Double terminations have a similar benefit in reducing the effects of connector and board related discontinuitiesof connector and board related discontinuities

Page 13: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 13

Dual Termination Makes USB 2.0 Speeds PossibleDual Termination Makes USB 2.0 Speeds Possibleon USB 1.X Cable Assemblieson USB 1.X Cable Assemblies

USB 2.0 Dual TerminationsUSB 2.0 Dual Terminations

Simulation assumes ideal transceivers and terminationsSimulation assumes ideal transceivers and terminations Typical imperfections are modeled for cable, connectors, Typical imperfections are modeled for cable, connectors,

bond wires, etc.bond wires, etc. 2.7X increase in eye opening, 2.7X decrease in jitter2.7X increase in eye opening, 2.7X decrease in jitter

Single TerminationSingle Termination Dual TerminationDual Termination

Page 14: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 14

Full-Speed DriversProvide TerminationsFull-Speed DriversProvide Terminations

Full-speed drivers asserting SE0 look like Full-speed drivers asserting SE0 look like resistance to groundresistance to ground

ZZDRVDRV + R + RSS = 45 Ohms, +/- 10% = 45 Ohms, +/- 10% RRSS may be integrated on-die or placed off-chip may be integrated on-die or placed off-chip

High SpeedHigh SpeedSignalingSignalingCurrentCurrent

High SpeedHigh SpeedSignalingSignalingCurrentCurrent

Data+Data+Data+Data+

Data-Data-Data-Data-

RRSSRRSS

Full SpeedFull SpeedDrivers ProvideDrivers Provide

Termination LevelsTermination Levels

Full SpeedFull SpeedDrivers ProvideDrivers Provide

Termination LevelsTermination Levels

High SpeedHigh SpeedDifferentialDifferentialReceiverReceiver

High SpeedHigh SpeedDifferentialDifferentialReceiverReceiver

ZZ DRV DRVZZ DRV DRV

ZZ DRV DRVZZ DRV DRV RRSSRRSS

Page 15: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 15

Existing Cablesand ConnectorsExisting Cablesand Connectors

No changes to connector specifications No changes to connector specifications Cable specs added to USB 1.1 guarantee performance, Cable specs added to USB 1.1 guarantee performance,

but pre-ECN cables will support high-speedbut pre-ECN cables will support high-speed

V(Vsaw)

0V 0.2V 0.4V 0.6V 0.8V 1.0Vv(vout) 1-v(vout)

0V

0.5V

1.0V

250ps

200mV

(Worst-Case Simulation)

Page 16: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 16

DC CoupledDC Coupled

Low-/full-speed modes require DC couplingLow-/full-speed modes require DC coupling DC coupling for high-speed simplifies board DC coupling for high-speed simplifies board

design and minimizes costdesign and minimizes cost Worst case skin-effect losses still leaveWorst case skin-effect losses still leave

reliable eye openingreliable eye opening Use of individual ferrite beads on D+ and D- lines Use of individual ferrite beads on D+ and D- lines

no longer possible, but shielded low-speed cable no longer possible, but shielded low-speed cable requirement helps a lotrequirement helps a lot

No New Magnetics Required for USB 2.0No New Magnetics Required for USB 2.0

Page 17: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 17

High-Speed Signaling Is Only Sensed DifferentiallyHigh-Speed Signaling Is Only Sensed Differentially

DifferentialDifferential

+ Common Mode+ Common Mode

= Total Signal= Total Signal

High-Speed Driver Generates Differential and Common Mode High-Speed Driver Generates Differential and Common Mode Components, but Receiver Only Senses Differential PortionComponents, but Receiver Only Senses Differential Portion

Page 18: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 18

High-Speed Timing Regenerated in RepeaterHigh-Speed Timing Regenerated in Repeater

High-speed signaling incurs no cumulative jitterHigh-speed signaling incurs no cumulative jitteror degradationor degradation

Bit errors and non-compliant behavior are easilyBit errors and non-compliant behavior are easilyisolated to a single linkisolated to a single link

Low-/full-speedLow-/full-speed

ClockClockAnd DataAnd DataRecoveryRecovery

ClockClockAnd DataAnd DataRecoveryRecovery

ElasticityElasticityBufferBuffer

ElasticityElasticityBufferBuffer

DataDataTransmissionTransmission

DataDataTransmissionTransmission

High-speedHigh-speed

Page 19: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 19

High-Speed Bus States/LevelsHigh-Speed Bus States/Levels

Amplitude of differential voltage is above Amplitude of differential voltage is above Disconnect threshold, due to device Disconnect threshold, due to device terminations being removedterminations being removed

Disconnect Disconnect

Current driven to D+ or D- with device Current driven to D+ or D- with device terminations absent and D+ pullup terminations absent and D+ pullup enabledenabled

ChIRP J, KChIRP J, K

High-speed signaling levels. Current High-speed signaling levels. Current driven into D+ or D- with terminations driven into D+ or D- with terminations presentpresent

J, K StateJ, K State

Amplitude of differential voltage is below Amplitude of differential voltage is below Squelch thresholdSquelch threshold

Squelch StateSquelch State

Terminations present, but no signaling Terminations present, but no signaling current being drivencurrent being driven

Idle StateIdle State

Page 20: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 20

USB 2.0 Transceiver FunctionalityUSB 2.0 Transceiver Functionality

Legacy DriverLegacy Driver

Disconnection Envelope DetectorDisconnection Envelope Detector

Single Ended ReceiversSingle Ended Receivers

Legacy Data ReceiverLegacy Data Receiver

LS/FS_Data_Driver_InputLS/FS_Data_Driver_InputAssert_Single_Ended_ZeroAssert_Single_Ended_Zero

HS_Differential_Receiver_OutputHS_Differential_Receiver_Output

SE_Data+_Receiver_OutputSE_Data+_Receiver_Output

SE_Data-_Receiver_OutputSE_Data-_Receiver_Output

Rpu_EnableRpu_Enable

HS_Drive_EnableHS_Drive_EnableHS_Data_Driver_InputHS_Data_Driver_Input

FS_Edge_Mode_SelFS_Edge_Mode_SelLS/FS_Driver_Output_EnableLS/FS_Driver_Output_Enable

HS_Current_Source_EnableHS_Current_Source_Enable

Differential_Receiver_EnabledDifferential_Receiver_Enabled

HS_Disconnect_DetectedHS_Disconnect_Detected

Legacy_Differential_Receiver_OutputLegacy_Differential_Receiver_Output

RsRs

RsRs

High Speed Current DriverHigh Speed Current Driver

Transmission Envelope DetectorTransmission Envelope Detector

HS Differential Data ReceiverHS Differential Data Receiver

+3.3V+3.3V

Data+Data+

Data-Data-

RpuRpu

Page 21: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 21

High-Speed Current DriverHigh-Speed Current Driver

Directing current to ground is fast but wastes powerDirecting current to ground is fast but wastes power Turning current on/off saves power but requires settling timeTurning current on/off saves power but requires settling time Use of these two options is left to the designerUse of these two options is left to the designer

Data +Data -Data +Data -

V+

Current Source Enable

Current Steering Select

17.78ma

Page 22: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 22

RPU SwitchRPU Switch

When device enters high-speed mode, RWhen device enters high-speed mode, RPUPU is is disconnected disconnected

It is recommended that switching elements be attached It is recommended that switching elements be attached to both lines to achieve balanced parasiticsto both lines to achieve balanced parasitics

+3.3V

Rpu_Enable

1.5K

D+

D-

Page 23: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 23

High-Speed DifferentialData ReceiverHigh-Speed DifferentialData Receiver

Required to receive differential signaling with Required to receive differential signaling with amplitude as small as +/- 200mVamplitude as small as +/- 200mV

Guideline: Tolerant of common mode voltages Guideline: Tolerant of common mode voltages from –50mV to +600mVfrom –50mV to +600mV

Reception of data is qualified by envelope Reception of data is qualified by envelope detectiondetection

Data+Data+Data+Data+

Data-Data-Data-Data-

Page 24: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 24

Transmission Envelope DetectorTransmission Envelope Detector

Must indicate Squelch when differential amplitudeMust indicate Squelch when differential amplitudeis < 100mVis < 100mV

Must indicate !Squelch when differential amplitudeMust indicate !Squelch when differential amplitudeis > 150mVis > 150mV

Must incorporate filtering to prevent indication ofMust incorporate filtering to prevent indication ofSquelch during crossoverSquelch during crossover

Should react in less than 4 bit timesShould react in less than 4 bit times

DifferentialDifferential

!Squelch!Squelch

Page 25: May 8, 20012 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

May 8, 2001 25

Disconnection Envelope DetectorDisconnection Envelope Detector

Disconnect threshold detector goes high when signals Disconnect threshold detector goes high when signals above disconnect threshold are detectedabove disconnect threshold are detected

Output is sampled during last 8 bits of 40 bit uSOF EOPOutput is sampled during last 8 bits of 40 bit uSOF EOP This prevents spurious disconnect detection in the This prevents spurious disconnect detection in the

presence of allowable signaling overshootpresence of allowable signaling overshoot

DisconnectionDisconnectionThresholdThresholdDetectorDetector

DisconnectionDisconnectionThresholdThresholdDetectorDetector

QQDisconnectDisconnectDetectionDetection

DisconnectDisconnectDetectionDetection DD

Clocked During LastClocked During LastByte of uSOF EOPByte of uSOF EOPClocked During LastClocked During LastByte of uSOF EOPByte of uSOF EOP